Changeset 18e1e5b in rtems for cpukit/score/cpu/arm/cpu_asm.S

Timestamp:

May 23, 2013, 7:04:19 AM (8 years ago)

Author:

Sebastian Huber <sebastian.huber@…>

Branches:

4.11, 5, master

Children:

d9bd5cd6

Parents:

e67025e

git-author:

Sebastian Huber <sebastian.huber@…> (05/23/13 07:04:19)

git-committer:

Sebastian Huber <sebastian.huber@…> (05/27/13 10:49:13)

Message:

arm: Fix CPSR and SPSR access

The GNU assembler translates for example a

msr spsr, rN

into

msr SPSR_fc, rN

This would update only a subset of the register and leads to an
incomplete exceptions restore sequence resulting in system corruption.
Correct is this:

msr SPSR_fsxc, rN

File:

• cpukit/score/cpu/arm/cpu_asm.S (modified) (2 diffs)

cpukit/score/cpu/arm/cpu_asm.S

@@ -55 +55 @@
 DEFINE_FUNCTION_ARM(_CPU_Context_switch)
 /* Start saving context */
-        mrs     r2, cpsr
+        mrs     r2, CPSR
         stmia   r0,  {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
 
@@ -72 +72 @@
 
         ldmia   r1,  {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
-        msr     cpsr, r2
+        msr     CPSR_fsxc, r2
 #ifdef __thumb__
         bx      lr