Changeset 18e1e5b in rtems
- Timestamp:
- May 23, 2013, 7:04:19 AM (8 years ago)
- Branches:
- 4.11, 5, master
- Children:
- d9bd5cd6
- Parents:
- e67025e
- git-author:
- Sebastian Huber <sebastian.huber@…> (05/23/13 07:04:19)
- git-committer:
- Sebastian Huber <sebastian.huber@…> (05/27/13 10:49:13)
- Location:
- cpukit/score/cpu/arm
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
cpukit/score/cpu/arm/arm_exc_interrupt.S
re67025e r18e1e5b 64 64 /* Set exchange registers */ 65 65 mov EXCHANGE_LR, lr 66 mrs EXCHANGE_SPSR, spsr67 mrs EXCHANGE_CPSR, cpsr66 mrs EXCHANGE_SPSR, SPSR 67 mrs EXCHANGE_CPSR, CPSR 68 68 sub EXCHANGE_INT_SP, sp, #EXCHANGE_SIZE 69 69 70 70 /* Switch to SVC mode */ 71 71 orr EXCHANGE_CPSR, EXCHANGE_CPSR, #0x1 72 msr cpsr, EXCHANGE_CPSR72 msr CPSR_c, EXCHANGE_CPSR 73 73 74 74 /* … … 184 184 185 185 /* Get INT mode program status register */ 186 mrs r1, cpsr186 mrs r1, CPSR 187 187 bic r1, r1, #0x1 188 188 189 189 /* Switch to INT mode */ 190 msr cpsr, r1190 msr CPSR_c, r1 191 191 192 192 /* Save EXCHANGE_LR and EXCHANGE_SPSR registers to exchange area */ … … 198 198 /* Set return address and program status */ 199 199 mov lr, EXCHANGE_LR 200 msr spsr, EXCHANGE_SPSR200 msr SPSR_fsxc, EXCHANGE_SPSR 201 201 202 202 /* Restore EXCHANGE_LR and EXCHANGE_SPSR registers from exchange area */ -
cpukit/score/cpu/arm/cpu_asm.S
re67025e r18e1e5b 55 55 DEFINE_FUNCTION_ARM(_CPU_Context_switch) 56 56 /* Start saving context */ 57 mrs r2, cpsr57 mrs r2, CPSR 58 58 stmia r0, {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14} 59 59 … … 72 72 73 73 ldmia r1, {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14} 74 msr cpsr, r274 msr CPSR_fsxc, r2 75 75 #ifdef __thumb__ 76 76 bx lr
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