Changeset 18e1e5b in rtems


Ignore:
Timestamp:
May 23, 2013, 7:04:19 AM (8 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
d9bd5cd6
Parents:
e67025e
git-author:
Sebastian Huber <sebastian.huber@…> (05/23/13 07:04:19)
git-committer:
Sebastian Huber <sebastian.huber@…> (05/27/13 10:49:13)
Message:

arm: Fix CPSR and SPSR access

The GNU assembler translates for example a

msr spsr, rN

into

msr SPSR_fc, rN

This would update only a subset of the register and leads to an
incomplete exceptions restore sequence resulting in system corruption.
Correct is this:

msr SPSR_fsxc, rN

Location:
cpukit/score/cpu/arm
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/arm/arm_exc_interrupt.S

    re67025e r18e1e5b  
    6464        /* Set exchange registers */
    6565        mov     EXCHANGE_LR, lr
    66         mrs     EXCHANGE_SPSR, spsr
    67         mrs     EXCHANGE_CPSR, cpsr
     66        mrs     EXCHANGE_SPSR, SPSR
     67        mrs     EXCHANGE_CPSR, CPSR
    6868        sub     EXCHANGE_INT_SP, sp, #EXCHANGE_SIZE
    6969
    7070        /* Switch to SVC mode */
    7171        orr     EXCHANGE_CPSR, EXCHANGE_CPSR, #0x1
    72         msr     cpsr, EXCHANGE_CPSR
     72        msr     CPSR_c, EXCHANGE_CPSR
    7373
    7474        /*
     
    184184
    185185        /* Get INT mode program status register */
    186         mrs     r1, cpsr
     186        mrs     r1, CPSR
    187187        bic     r1, r1, #0x1
    188188
    189189        /* Switch to INT mode */
    190         msr     cpsr, r1
     190        msr     CPSR_c, r1
    191191
    192192        /* Save EXCHANGE_LR and EXCHANGE_SPSR registers to exchange area */
     
    198198        /* Set return address and program status */
    199199        mov     lr, EXCHANGE_LR
    200         msr     spsr, EXCHANGE_SPSR
     200        msr     SPSR_fsxc, EXCHANGE_SPSR
    201201
    202202        /* Restore EXCHANGE_LR and EXCHANGE_SPSR registers from exchange area */
  • cpukit/score/cpu/arm/cpu_asm.S

    re67025e r18e1e5b  
    5555DEFINE_FUNCTION_ARM(_CPU_Context_switch)
    5656/* Start saving context */
    57         mrs     r2, cpsr
     57        mrs     r2, CPSR
    5858        stmia   r0,  {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
    5959
     
    7272
    7373        ldmia   r1,  {r2, r4, r5, r6, r7, r8, r9, r10, r11, r13, r14}
    74         msr     cpsr, r2
     74        msr     CPSR_fsxc, r2
    7575#ifdef __thumb__
    7676        bx      lr
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