Changeset 1883c87 in rtems


Ignore:
Timestamp:
Sep 11, 2006, 9:43:45 PM (14 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
da2fc6c0
Parents:
0b1cb769
Message:

2006-09-11 Joel Sherrill <joel@…>

  • console/console.c, startup/init5235.c: Convert C++ style comments to C style.
Location:
c/src/lib/libbsp/m68k/mcf5235
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/mcf5235/ChangeLog

    r0b1cb769 r1883c87  
     12006-09-11      Joel Sherrill <joel@OARcorp.com>
     2
     3        * console/console.c, startup/init5235.c: Convert C++ style comments to
     4        C style.
     5
    162006-06-23      Worth Burruss <worth@motioncontrol.org>
    27
  • c/src/lib/libbsp/m68k/mcf5235/console/console.c

    r0b1cb769 r1883c87  
    373373                info->stopbits = -1;
    374374                info->hwflow   = -1;
    375                 info->iomode   = TERMIOS_POLLED; //polled console io
     375                info->iomode   = TERMIOS_POLLED; /*polled console io */
    376376
    377377                MCF5235_UART_UACR(chan) = 0;
  • c/src/lib/libbsp/m68k/mcf5235/startup/init5235.c

    r0b1cb769 r1883c87  
    3333    int *address_of_MCF5235_BSP_START_FROM_FLASH;
    3434   
    35     //Setup the GPIO Registers
     35    /*Setup the GPIO Registers */
    3636    MCF5235_GPIO_UART=0x3FFF;
    3737    MCF5235_GPIO_PAR_AD=0xE1;
    3838   
    39     //Setup the Chip Selects so CS0 is flash
     39    /*Setup the Chip Selects so CS0 is flash */
    4040    MCF5235_CS_CSAR0 =(0xFFE00000 & 0xffff0000)>>16;
    4141    MCF5235_CS_CSMR0 = 0x001f0001;
     
    4444    address_of_MCF5235_BSP_START_FROM_FLASH = (int *) & MCF5235_BSP_START_FROM_FLASH;
    4545    if ( (int)address_of_MCF5235_BSP_START_FROM_FLASH == 1) {
    46         //Setup the SDRAM
     46        /*Setup the SDRAM  */
    4747        for(x=0; x<20000; x++)
    4848        {
     
    5656                temp +=1;
    5757        }
    58         // set ip ( bit 3 ) in dacr
     58        /* set ip ( bit 3 ) in dacr */
    5959        MCF5235_SDRAMC_DACR0 |= (0x00000008) ;
    60         // init precharge
     60        /* init precharge */
    6161        *((unsigned long *)MM_SDRAM_BASE) = 0xDEADBEEF;
    62         // set RE in dacr
     62        /* set RE in dacr */
    6363        MCF5235_SDRAMC_DACR0 |= (0x00008000); 
    64         // wait
     64        /* wait */
    6565        for(x=0; x<20000; x++)
    6666        {
    6767                temp +=1;
    6868        }
    69         // issue IMRS
     69        /* issue IMRS */
    7070        MCF5235_SDRAMC_DACR0 |= (0x00000040);
    7171        *((short *)MM_SDRAM_BASE) = 0;
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