Changeset 1822649 in rtems


Ignore:
Timestamp:
Oct 15, 2018, 6:44:52 AM (6 months ago)
Author:
Pavel Pisa <pisa@…>
Branches:
master
Children:
186a0b1
Parents:
fb12215
Message:

bsp/tms570: Simple fix to resolve macro redefinitions.

closes #3347

File:
1 edited

Legend:

Unmodified
Added
Removed
  • bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h

    rfb12215 r1822649  
    112112
    113113/*---------------------TMS570_SYS1_CSDIS---------------------*/
    114 /* field: CLKSROFF - Clock source[7-3] off. */
    115 #define TMS570_SYS1_CSDIS_CLKSROFF(val) BSP_FLD32(val,3, 7)
    116 #define TMS570_SYS1_CSDIS_CLKSROFF_GET(reg) BSP_FLD32GET(reg,3, 7)
    117 #define TMS570_SYS1_CSDIS_CLKSROFF_SET(reg,val) BSP_FLD32SET(reg, val,3, 7)
    118 
    119 /* field: CLKSROFF - Clock source[1-0] off. */
    120 #define TMS570_SYS1_CSDIS_CLKSROFF(val) BSP_FLD32(val,0, 1)
    121 #define TMS570_SYS1_CSDIS_CLKSROFF_GET(reg) BSP_FLD32GET(reg,0, 1)
    122 #define TMS570_SYS1_CSDIS_CLKSROFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
    123 
     114/* field: CLKSROFF - Clock source[7-0] off. 2 reserved */
     115#define TMS570_SYS1_CSDIS_CLKSROFF(val) BSP_FLD32(val,0, 7)
     116#define TMS570_SYS1_CSDIS_CLKSROFF_GET(reg) BSP_FLD32GET(reg,0, 7)
     117#define TMS570_SYS1_CSDIS_CLKSROFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
     118
     119/* Clock Source 0                    Oscillator */
     120#define TMS570_SYS1_CSDIS_CLKSR_OSC_NUM       0
     121#define TMS570_SYS1_CSDIS_CLKSROFF_OSC        BSP_BIT32(0)
     122
     123/* Clock Source 1                      PLL1 */
     124#define TMS570_SYS1_CSDIS_CLKSR_PLL1_NUM      1
     125#define TMS570_SYS1_CSDIS_CLKSROFF_PLL1       BSP_BIT32(1)
     126
     127/* Clock Source 3                  EXTCLKIN */
     128#define TMS570_SYS1_CSDIS_CLKSR_EXTCLKIN_NUM  3
     129#define TMS570_SYS1_CSDIS_CLKSROFF_EXTCLKIN   BSP_BIT32(3)
     130
     131/* Clock Source 4 Low Frequency LPO (Low Power Oscillator) clock */
     132#define TMS570_SYS1_CSDIS_CLKSR_LPO_NUM       4
     133#define TMS570_SYS1_CSDIS_CLKSROFF_LPO        BSP_BIT32(4)
     134
     135/* Clock Source 5 High Frequency LPO (Low Power Oscillator) clock */
     136#define TMS570_SYS1_CSDIS_CLKSR_HPO_NUM       5
     137#define TMS570_SYS1_CSDIS_CLKSROFF_HPO        BSP_BIT32(5)
     138
     139/* Clock Source 6                      PLL2 */
     140#define TMS570_SYS1_CSDIS_CLKSR_PLL2_NUM      6
     141#define TMS570_SYS1_CSDIS_CLKSROFF_PLL2       BSP_BIT32(6)
     142
     143/* Clock Source 7                  EXTCLKIN2 */
     144#define TMS570_SYS1_CSDIS_CLKSR_EXTCLKIN2_NUM 7
     145#define TMS570_SYS1_CSDIS_CLKSROFF_EXTCLKIN2  BSP_BIT32(7)
    124146
    125147/*--------------------TMS570_SYS1_CSDISSET--------------------*/
    126 /* field: SETCLKSR_OFF - Set clock source[7-3] to the disabled state. */
    127 #define TMS570_SYS1_CSDISSET_SETCLKSR_OFF(val) BSP_FLD32(val,3, 7)
    128 #define TMS570_SYS1_CSDISSET_SETCLKSR_OFF_GET(reg) BSP_FLD32GET(reg,3, 7)
    129 #define TMS570_SYS1_CSDISSET_SETCLKSR_OFF_SET(reg,val) BSP_FLD32SET(reg, val,3, 7)
    130 
    131 /* field: SETCLKSR_OFF - Set clock source[1-0] to the disabled state. */
    132 #define TMS570_SYS1_CSDISSET_SETCLKSR_OFF(val) BSP_FLD32(val,0, 1)
    133 #define TMS570_SYS1_CSDISSET_SETCLKSR_OFF_GET(reg) BSP_FLD32GET(reg,0, 1)
    134 #define TMS570_SYS1_CSDISSET_SETCLKSR_OFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
    135 
     148/* field: SETCLKSR_OFF - Set clock source[7-0] to the disabled state. */
     149#define TMS570_SYS1_CSDISSET_SETCLKSR_OFF(val) BSP_FLD32(val,0, 7)
     150#define TMS570_SYS1_CSDISSET_SETCLKSR_OFF_GET(reg) BSP_FLD32GET(reg,0, 7)
     151#define TMS570_SYS1_CSDISSET_SETCLKSR_OFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
    136152
    137153/*--------------------TMS570_SYS1_CSDISCLR--------------------*/
    138 /* field: CLRCLKSR_OFF - Enables clock source[7-3]. */
    139 #define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF(val) BSP_FLD32(val,3, 7)
    140 #define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF_GET(reg) BSP_FLD32GET(reg,3, 7)
    141 #define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF_SET(reg,val) BSP_FLD32SET(reg, val,3, 7)
    142 
    143 /* field: CLRCLKSR_OFF - Enables clock source[1-0]. */
    144 #define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF(val) BSP_FLD32(val,0, 1)
    145 #define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF_GET(reg) BSP_FLD32GET(reg,0, 1)
    146 #define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
    147 
     154/* field: CLRCLKSR_OFF - Enables clock source[7-0] */
     155#define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF(val) BSP_FLD32(val,0, 7)
     156#define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF_GET(reg) BSP_FLD32GET(reg,0, 7)
     157#define TMS570_SYS1_CSDISCLR_CLRCLKSR_OFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
    148158
    149159/*---------------------TMS570_SYS1_CDDIS---------------------*/
    150 /* field: VCLKAOFF - VCLKA[4-3] domain off. */
    151 #define TMS570_SYS1_CDDIS_VCLKAOFF(val) BSP_FLD32(val,10, 11)
    152 #define TMS570_SYS1_CDDIS_VCLKAOFF_GET(reg) BSP_FLD32GET(reg,10, 11)
    153 #define TMS570_SYS1_CDDIS_VCLKAOFF_SET(reg,val) BSP_FLD32SET(reg, val,10, 11)
     160/* field: VCLKAOFF - VCLKA4 domain off. */
     161#define TMS570_SYS1_CDDIS_VCLKAOFF4 BSP_BIT32(11)
     162
     163/* field: VCLKAOFF - VCLKA3 domain off. */
     164#define TMS570_SYS1_CDDIS_VCLKAOFF3 BSP_BIT32(10)
    154165
    155166/* field: VCLK3OFF - VCLK3 domain off. */
     
    159170#define TMS570_SYS1_CDDIS_RTICLK1OFF BSP_BIT32(6)
    160171
    161 /* field: VCLKAOFF - VCLKA[2-1] domain off. */
    162 #define TMS570_SYS1_CDDIS_VCLKAOFF(val) BSP_FLD32(val,4, 5)
    163 #define TMS570_SYS1_CDDIS_VCLKAOFF_GET(reg) BSP_FLD32GET(reg,4, 5)
    164 #define TMS570_SYS1_CDDIS_VCLKAOFF_SET(reg,val) BSP_FLD32SET(reg, val,4, 5)
     172/* field: VCLKAOFF - VCLKA2 domain off. */
     173#define TMS570_SYS1_CDDIS_VCLKAOFF2 BSP_BIT32(5)
     174
     175/* field: VCLKAOFF - VCLKA1 domain off. */
     176#define TMS570_SYS1_CDDIS_VCLKAOFF1 BSP_BIT32(4)
    165177
    166178/* field: VCLK2OFF - VCLK2 domain off. */
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