Changeset 1800f717 in rtems


Ignore:
Timestamp:
Jan 8, 2001, 6:16:51 PM (21 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
82e2265
Parents:
f8b891d
Message:

2001-01-08 Joel Sherrill <joel@…>

  • idtcpu.h: Commented out definition of "wait". It was stupid to use such a common word as a macro.
  • rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
  • rtems/score/mips.h: Added include of <idtcpu.h>.
  • rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/mips/ChangeLog

    rf8b891d r1800f717  
     12001-01-08      Joel Sherrill <joel@OARcorp.com>
     2
     3        * idtcpu.h: Commented out definition of "wait".  It was stupid to
     4        use such a common word as a macro.
     5        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
     6        * rtems/score/mips.h: Added include of <idtcpu.h>.
     7        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
     8
    192001-01-03      Joel Sherrill <joel@OARcorp.com>
    210
  • c/src/exec/score/cpu/mips/idtcpu.h

    rf8b891d r1800f717  
    177177#endif WAIT
    178178
     179/* Disabled by joel -- horrible overload of common word.
    179180#ifndef wait
    180181#define wait .word 0x42000020
    181182#endif wait
     183*/
    182184
    183185#endif
  • c/src/exec/score/cpu/mips/rtems/score/cpu.h

    rf8b891d r1800f717  
    4141#include <rtems/score/mips.h>       /* pick up machine definitions */
    4242#ifndef ASM
    43 #include <idtcpu.h>
    4443#include <rtems/score/mipstypes.h>
    4544#endif
     
    601600  do { \
    602601    mips_get_sr( _level ); \
    603     mips_set_sr( (_level) & ~SR_IEC ); \
     602    mips_set_sr( (_level) & ~SR_IMASK ); \
    604603  } while(0)
    605604
  • c/src/exec/score/cpu/mips/rtems/score/mips.h

    rf8b891d r1800f717  
    1717#ifdef __cplusplus
    1818extern "C" {
     19#endif
     20
     21#ifndef ASM
     22#include <idtcpu.h>
    1923#endif
    2024
     
    9094    unsigned int _sr; \
    9195    mips_get_sr( _sr ); \
    92     _sr |= (_mask) | SR_IEC; \
     96    _sr |= (_mask); \
    9397    mips_set_sr( _sr ); \
    9498  } while (0)
  • cpukit/score/cpu/mips/ChangeLog

    rf8b891d r1800f717  
     12001-01-08      Joel Sherrill <joel@OARcorp.com>
     2
     3        * idtcpu.h: Commented out definition of "wait".  It was stupid to
     4        use such a common word as a macro.
     5        * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
     6        * rtems/score/mips.h: Added include of <idtcpu.h>.
     7        * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
     8
    192001-01-03      Joel Sherrill <joel@OARcorp.com>
    210
  • cpukit/score/cpu/mips/idtcpu.h

    rf8b891d r1800f717  
    177177#endif WAIT
    178178
     179/* Disabled by joel -- horrible overload of common word.
    179180#ifndef wait
    180181#define wait .word 0x42000020
    181182#endif wait
     183*/
    182184
    183185#endif
  • cpukit/score/cpu/mips/rtems/mips/idtcpu.h

    rf8b891d r1800f717  
    177177#endif WAIT
    178178
     179/* Disabled by joel -- horrible overload of common word.
    179180#ifndef wait
    180181#define wait .word 0x42000020
    181182#endif wait
     183*/
    182184
    183185#endif
  • cpukit/score/cpu/mips/rtems/score/cpu.h

    rf8b891d r1800f717  
    4141#include <rtems/score/mips.h>       /* pick up machine definitions */
    4242#ifndef ASM
    43 #include <idtcpu.h>
    4443#include <rtems/score/mipstypes.h>
    4544#endif
     
    601600  do { \
    602601    mips_get_sr( _level ); \
    603     mips_set_sr( (_level) & ~SR_IEC ); \
     602    mips_set_sr( (_level) & ~SR_IMASK ); \
    604603  } while(0)
    605604
  • cpukit/score/cpu/mips/rtems/score/mips.h

    rf8b891d r1800f717  
    1717#ifdef __cplusplus
    1818extern "C" {
     19#endif
     20
     21#ifndef ASM
     22#include <idtcpu.h>
    1923#endif
    2024
     
    9094    unsigned int _sr; \
    9195    mips_get_sr( _sr ); \
    92     _sr |= (_mask) | SR_IEC; \
     96    _sr |= (_mask); \
    9397    mips_set_sr( _sr ); \
    9498  } while (0)
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