Changeset 16d6e42 in rtems

Timestamp:

Jun 19, 2012, 6:34:37 AM (7 years ago)

Author:

Daniel Hellstrom <daniel@…>

Branches:

4.11, master

Children:

0f49c0e

Parents:

f00fee8e

git-author:

Daniel Hellstrom <daniel@…> (06/19/12 06:34:37)

git-committer:

Daniel Hellstrom <daniel@…> (04/16/15 23:10:18)

Message:

LEON3: fixed nano seconds support in TLIB

The _Watchdog_Nanoseconds_since_tick_handler() function caller does
not take into account that the timer counter may wrap, underflow or
overflow. Instead, the driver must take that into account. This
GPTIMER DrvMgr? driver patch makes use of the IRQ-Pending bit to
determine if a underflow has happened. In that case a greater time
than one tick is returned (even considering the function name..).

The TLIB clock layer must also ACK the interrupt pending bit,
otherwise we couldn't determine whether an IRQ is pending or if
belongs to un old already handled tick IRQ.

Note that this patch only fixes the DrvMgr? GPTIMER driver and TLIB,
the standard LEON3 GPTIMER driver still needs a fix.

Location:

c/src/lib/libbsp/sparc/shared

Files:

• include/tlib.h (modified) (2 diffs)
• timer/gptimer.c (modified) (5 diffs)
• timer/tlib_ckinit.c (modified) (4 diffs)

c/src/lib/libbsp/sparc/shared/include/tlib.h

@@ -36 +36 @@
         void    (*get_counter)(struct tlib_dev *hand, unsigned int *counter);
         int     (*custom)(struct tlib_dev *hand, int cmd, void *arg);
+        int     (*int_pend)(struct tlib_dev *hand, int ack);
 };
 
@@ -168 +169 @@
         dev->drv->custom(dev, cmd, arg);
 }
+
+static inline int tlib_interrupt_pending(void *hand, int ack)
+{
+        struct tlib_dev *dev = hand;
+
+        return dev->drv->int_pend(dev, ack);
+}

c/src/lib/libbsp/sparc/shared/timer/gptimer.c

@@ -85 +85 @@
         char index; /* Timer Index in this driver */
         char tindex; /* Timer Index In Hardware */
+        unsigned char irq_ack_mask;
 };
 
@@ -275 +276 @@
                 timer->tdev.drv = &gptimer_tlib_drv;
 
-                /* Stop Timer */
-                timer->tregs->ctrl = 0;
+                /* Stop Timer and probe Pending bit. In newer hardware the
+                 * timer has pending bit is cleared by writing a one to it,
+                 * whereas older versions it is cleared with a zero.
+                 */
+                timer->tregs->ctrl = GPTIMER_CTRL_IP;
+                if ((timer->tregs->ctrl & GPTIMER_CTRL_IP) != 0)
+                        timer->irq_ack_mask = ~GPTIMER_CTRL_IP;
+                else
+                        timer->irq_ack_mask = ~0;
 
                 /* Register Timer at Timer Library */
@@ -301 +309 @@
                         priv);
         }
+
+        /* Older HW */
+        
+        
 
         /* If the user request a certain Timer to be the RTEMS Clock Timer,
@@ -365 +377 @@
 }
 
+int gptimer_tlib_int_pend(struct tlib_dev *hand, int ack)
+{
+        struct gptimer_timer *timer = (struct gptimer_timer *)hand;
+        unsigned int ctrl = timer->tregs->ctrl;
+
+        if ((ctrl & (GPTIMER_CTRL_IP | GPTIMER_CTRL_IE)) ==
+                (GPTIMER_CTRL_IP | GPTIMER_CTRL_IE)) {
+                /* clear Pending IRQ ? */
+                if (ack)
+                        timer->tregs->ctrl = ctrl & timer->irq_ack_mask;
+                return 1; /* timer generated IRQ */
+        } else
+                return 0; /* was not timer causing IRQ */
+}
+
 void gptimer_isr(void *data)
 {
         struct gptimer_priv *priv = data;
-        struct gptimer_timer_regs *tregs;
         int i;
-        unsigned int ctrl;
 
         /* Check all timers for IRQ */
         for (i=0;i<priv->timer_cnt; i++) {
-                tregs = priv->timers[i].tregs;
-                ctrl = tregs->ctrl;
-                if ( ctrl & GPTIMER_CTRL_IP ) {
-                        /* IRQ Was generated by Timer, Clear Pending flag
-                         * call ISR registered
+                if (gptimer_tlib_int_pend((void *)&priv->timers[i], 1)) {
+                        /* IRQ Was generated by Timer and Pending flag has been
+                         * cleared. Call ISR registered
                          */
-                        tregs->ctrl = ctrl | GPTIMER_CTRL_IP;
-                        if ( priv->timers[i].tdev.isr_func ) {
+                        if (priv->timers[i].tdev.isr_func) {
                                 priv->timers[i].tdev.isr_func(
                                         priv->timers[i].tdev.isr_data);
@@ -501 +523 @@
         .get_counter = gptimer_tlib_get_counter,
         .custom = NULL,
+        .int_pend = gptimer_tlib_int_pend,
 };

c/src/lib/libbsp/sparc/shared/timer/tlib_ckinit.c

@@ -76 +76 @@
 {
   /*
+   * Support for shared interrupts. Ack IRQ at source, only handle 
+   * interrupts generated from the tick-timer. Clearing pending bit
+   * is also needed for Clock_nanoseconds_since_last_tick() to work.
+   */
+  if ( tlib_interrupt_pending(Clock_handle, 1) == 0 )
+    return;
+
+  /*
    *  Accurate count of ISRs
    */
@@ -148 +156 @@
 {
   uint32_t clicks;
+  int ip;
+
   if ( !Clock_handle )
     return 0;
 
   tlib_get_counter(Clock_handle, (unsigned int *)&clicks);
+  /* protect against timer counter underflow/overflow */
+  ip = tlib_interrupt_pending(Clock_handle, 0);
+  if (ip)
+    tlib_get_counter(Clock_handle, (unsigned int *)&clicks);
 
 #ifdef CLOCK_DRIVER_DONT_ASSUME_PRESCALER_1MHZ
@@ -157 +171 @@
     /* Down counter. Calc from BaseFreq. */
     uint64_t tmp;
+    if (ip)
+      clicks += Clock_basefreq;
     tmp = ((uint64_t)clicks * 1000000000) / ((uint64_t)Clock_basefreq);
     return (uint32_t)tmp;
@@ -163 +179 @@
   /* Down counter. Timer base frequency is initialized to 1 MHz */
   return (uint32_t)
-     (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
+     ((rtems_configuration_get_microseconds_per_tick() << ip) - clicks) * 1000;
 #endif
 }