Ignore:
Timestamp:
01/09/01 16:48:26 (22 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
026f4aa
Parents:
96e34e0
Message:

2001-01-09 Joel Sherrill <joel@…>

  • cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants to make it easier to conditionalize the code for various ISA levels.
File:
1 edited

Legend:

Unmodified
Added
Removed

  • c/src/exec/score/cpu/mips/rtems/score/mips.h

    r96e34e0 r16ad7ea  
    2121#ifndef ASM
    2222#include <idtcpu.h>
     23#endif
     24
     25/*
     26 *  SR bits that enable/disable interrupts
     27 *
     28 *  NOTE: XXX what about SR_ERL?
     29 */
     30
     31#if __mips == 3
     32#ifdef ASM
     33#define SR_INTERRUPT_ENABLE_BITS 0x03
     34#else
     35#define SR_INTERRUPT_ENABLE_BITS SR_IE|SR_EXL
     36#endif
     37#else
     38#define SR_INTERRUPT_ENABLE_BITS SR_IEC
    2339#endif
    2440
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