- Timestamp:
- 06/17/11 13:24:47 (13 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 3203e09
- Parents:
- feb940f7
- Location:
- c/src/lib/libbsp/powerpc/mvme5500
- Files:
-
- 14 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
rfeb940f7 r169480b 1 2011-04-10 Kate Feng <feng@bnl.gov> 2 3 PR 1786/bsps 4 * Makefile.am: Add support for Altivec. 5 * startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead. 6 * make/custom/mvme5500.cfg: Change CPU_CFLAGS to 7 "-mcpu=7450 -mtune=7450 -Dmpc7455" 8 * irq/BSP_irq.c, pci/detect_host_bridge.c, pci.c, pcifinddevice.c: 9 Remove warnings. 10 * vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers. 11 * network/if_100MHz/GT64260eth.c: Recycle the Rx mbuf if there 12 is any Rx error. 13 1 14 2011-06-07 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 15 -
c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
rfeb940f7 r169480b 35 35 ../../powerpc/shared/startup/pgtbl_setup.c startup/pgtbl_activate.c \ 36 36 ../../powerpc/shared/startup/pretaskinghook.c \ 37 ../../powerpc/shared/startup/zerobss.c \ 37 38 ../../powerpc/shared/startup/bspgetworkarea.c \ 38 39 ../../powerpc/shared/startup/sbrk.c ../../shared/bootcard.c \ … … 122 123 ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \ 123 124 ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \ 124 ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel 125 ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel\ 126 ../../../libcpu/@RTEMS_CPU@/mpc6xx/altivec.rel 127 125 128 if HAS_NETWORKING 126 129 libbsp_a_LIBADD += network.rel -
c/src/lib/libbsp/powerpc/mvme5500/bsp_specs
rfeb940f7 r169480b 5 5 *startfile: 6 6 %{!qrtems: %(old_startfile)} \ 7 %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \ 8 mvme5500start.o%s -e __rtems_entry_point -u __vectors}} 7 %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s -e __rtems_entry_point -u __vectors mvme5500start.o%s}} 9 8 10 9 *link: -
c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h
rfeb940f7 r169480b 104 104 /* The glues to Till's vmeUniverse, although the name does not 105 105 * actually reflect the relevant architect of the MVME5500. 106 * Till TODO ? : BSP_PCI_DO_EOI instead ?107 * BSP_EXT_IRQ0 instead of BSP_PCI_IRQ0 ?108 *109 106 */ 110 #define BSP_PIC_DO_EOI inl(0xc34) /* PCI IACK */111 107 #define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET 112 108 -
c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
rfeb940f7 r169480b 382 382 * MOTload default is set as level sensitive(1). Set it agin to make sure. 383 383 */ 384 out_le32(GT_CommUnitArb_Ctrl, (in_le32(GT_CommUnitArb_Ctrl)| (1<<10))); 384 out_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl, 385 (in_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl)| (1<<10))); 385 386 386 387 #if 0 -
c/src/lib/libbsp/powerpc/mvme5500/make/custom/mvme5500.cfg
rfeb940f7 r169480b 10 10 RTEMS_CPU_MODEL=mpc7455 11 11 12 # This is the actual bsp directory used during the build process. 13 RTEMS_BSP_FAMILY=mvme5500 14 12 15 # This contains the compiler options necessary to select the CPU model 13 16 # and (hopefully) optimize for it. 14 # if gcc does not regonize 7450 then change -mcpu=750 15 # 16 CPU_CFLAGS = -fno-strict-aliasing -mcpu=7450 -Dmpc7455 -mno-altivec -mabi=altivec -mvrsave=no -mmultiple -mstring -mstrict-align 17 #T. Straumann; disable sdata=eabi for now until CEXP supports it -meabi -msdata=eabi 17 CPU_CFLAGS = -mcpu=7450 -mtune=7450 -Dmpc7455 18 18 19 19 # optimize flag: typically -O2 … … 24 24 $(OBJCOPY) -O binary $(basename $@).exe $(basename $@)$(DOWNEXT) 25 25 endef 26 27 # 28 START_BASE=mvme5500start -
c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c
rfeb940f7 r169480b 746 746 if ((cmdsts & RX_STS_LC) || (cmdsts & RX_STS_COL)) 747 747 ifp->if_collisions++; 748 goto give_it_back; 748 /* recycle the buffer */ 749 m->m_len=sc->rx_buf_sz; 750 } 751 else { 752 m = sc->rxq_mbuf[sc->rxq_fi]; 753 m->m_len = m->m_pkthdr.len = byteCount - sizeof(struct ether_header); 754 eh = mtod (m, struct ether_header *); 755 m->m_data += sizeof(struct ether_header); 756 ether_input (ifp, eh, m); 757 758 ifp->if_ipackets++; 759 ifp->if_ibytes+=byteCount; 760 --sc->rxq_active; 761 MGETHDR (m, M_WAIT, MT_DATA); 762 MCLGET (m, M_WAIT); 749 763 } 750 m = sc->rxq_mbuf[sc->rxq_fi];751 m->m_len = m->m_pkthdr.len = byteCount - sizeof(struct ether_header);752 eh = mtod (m, struct ether_header *);753 m->m_data += sizeof(struct ether_header);754 ether_input (ifp, eh, m);755 756 ifp->if_ipackets++;757 ifp->if_ibytes+=byteCount;758 --sc->rxq_active;759 760 give_it_back:761 MGETHDR (m, M_WAIT, MT_DATA);762 MCLGET (m, M_WAIT);763 764 m->m_pkthdr.rcvif = ifp; 764 765 sc->rxq_mbuf[sc->rxq_fi]= m; -
c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
rfeb940f7 r169480b 1731 1731 sc->sc_flags |= WM_F_HAS_MII; 1732 1732 1733 #if 11733 #if 0 1734 1734 /* <skf> May 2009 : The value that should be programmed into IPGT is 10 */ 1735 1735 sc->sc_tipg = TIPG_IPGT(10)+TIPG_IPGR1(8)+TIPG_IPGR2(6); -
c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c
rfeb940f7 r169480b 28 28 unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet) 29 29 { 30 u nsigned int pcidata, pcidata1;30 uint32_t pcidata, pcidata1; 31 31 int PciLocal, busNumber=0; 32 32 -
c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
rfeb940f7 r169480b 109 109 #endif 110 110 111 out_be32( BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));111 out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset)); 112 112 *val = in_8(BSP_pci[n].pci_config_data + (offset&3)); 113 113 return PCIBIOS_SUCCESSFUL; … … 130 130 config_data,pciConfigPack(bus,dev,func,offset)); 131 131 #endif 132 out_be32( BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));133 *val = in_le16( BSP_pci[n].pci_config_data + (offset&2));132 out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset)); 133 *val = in_le16((volatile unsigned short *) (BSP_pci[n].pci_config_data + (offset&2))); 134 134 return PCIBIOS_SUCCESSFUL; 135 135 } … … 148 148 if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER; 149 149 150 out_be32( BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));151 *val = in_le32( BSP_pci[n].pci_config_data);150 out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset)); 151 *val = in_le32((volatile unsigned int *)BSP_pci[n].pci_config_data); 152 152 return PCIBIOS_SUCCESSFUL; 153 153 } … … 164 164 if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER; 165 165 166 out_be32( BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));167 out_8( BSP_pci[n].pci_config_data + (offset&3), val);166 out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset)); 167 out_8((volatile unsigned char *) (BSP_pci[n].pci_config_data + (offset&3)), val); 168 168 return PCIBIOS_SUCCESSFUL; 169 169 } … … 180 180 if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER; 181 181 182 out_be32( BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));183 out_le16( BSP_pci[n].pci_config_data + (offset&3), val);182 out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset)); 183 out_le16((volatile unsigned short *)(BSP_pci[n].pci_config_data + (offset&3)), val); 184 184 return PCIBIOS_SUCCESSFUL; 185 185 } … … 196 196 if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER; 197 197 198 out_be32( BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));199 out_le32( BSP_pci[n].pci_config_data, val);198 out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset)); 199 out_le32((volatile unsigned int *)BSP_pci[n].pci_config_data, val); 200 200 return PCIBIOS_SUCCESSFUL; 201 201 } -
c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c
rfeb940f7 r169480b 36 36 int instance, int *pbus, int *pdev, int *pfun ) 37 37 { 38 u nsigned int d;38 uint32_t d; 39 39 unsigned short s; 40 40 unsigned char bus,dev,fun,hd; -
c/src/lib/libbsp/powerpc/mvme5500/start/start.S
rfeb940f7 r169480b 5 5 * 6 6 * S. Kate Feng <feng1@bnl.gov>, April 2004 7 * Mapped the 2nd 256MB of RAM to support the MVME5500 boards.8 * 7 * Mapped the 2nd 256MB of RAM to support the MVME5500/MVME6100 boards 8 * 9 9 * The license and distribution terms for this file may be 10 10 * found in the file LICENSE in this distribution or at 11 11 * http://www.rtems.com/license/LICENSE. 12 12 * 13 <<<<<<< start.S 14 * $Id$ 15 ======= 16 * $Id$ 17 >>>>>>> 1.25 13 18 * 14 19 */ … … 17 22 #include <rtems/score/cpu.h> 18 23 #include <rtems/powerpc/powerpc.h> 24 19 25 #include <libcpu/io.h> 20 26 #include <libcpu/bat.h> 27 #include <bspopts.h> 21 28 22 29 #define SYNC \ … … 33 40 li r10,0x63 ; \ 34 41 sc 35 36 42 37 43 .text … … 63 69 mr r28,r6 64 70 mr r27,r7 71 72 #ifdef __ALTIVEC__ 73 /* enable altivec; gcc may use it! */ 74 mfmsr r0 75 oris r0, r0, (1<<(31-16-6)) 76 mtmsr r0 77 /* 78 * set vscr and vrsave to known values 79 */ 80 li r0, 0 81 mtvrsave r0 82 vxor 0,0,0 83 mtvscr 0 84 #endif 85 65 86 /* 66 87 * Make sure we have nothing in BATS and TLB … … 73 94 */ 74 95 lis r11,KERNELBASE@h 75 ori r11,r11,0x1ffe /* set up BAT0 registers for 604+ */ 96 /* set up BAT registers for 604 */ 97 ori r11,r11,0x1ffe 76 98 li r8,2 /* R/W access */ 77 99 isync … … 82 104 isync 83 105 /* 84 * Use the 2nd pair of BAT registers to map the 2nd 256MB85 * of RAM to 0x10000000. <SKF>106 * <skf> Use the 2nd pair of BAT registers to map the 2nd 256MB 107 * of RAM to 0x10000000. 86 108 */ 87 109 lis r11,MEM256MB@h … … 107 129 enter_C_code: 108 130 bl MMUon 109 bl __eabi /* setup EABI and SYSV environment */131 bl __eabi /* setup EABI and SYSV environment */ 110 132 bl zero_bss 111 133 /* … … 122 144 */ 123 145 addis r9,r0, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@ha 124 addi r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l 125 mr r1, r9 126 /* 127 * We are know in a environment that is totally independent from bootloader setup. 146 addi r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l 147 /* 148 * align initial stack 149 * (we hope that the bootloader stack was 16-byte aligned 150 * or we haven't used altivec yet...) 151 */ 152 li r0, (CPU_STACK_ALIGNMENT-1) 153 andc r1, r9, r0 154 /* 155 * We are now in a environment that is totally independent from 156 * bootloader setup. 128 157 */ 129 158 /* pass result of 'save_boot_params' to 'boot_card' in R3 */ … … 162 191 .type _return_to_ppcbug,@function 163 192 164 165 193 _return_to_ppcbug: 166 194 mflr r30 -
c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c
rfeb940f7 r169480b 53 53 */ 54 54 55 /* there is no public Workspace_Free() variant :-( */56 #include <rtems/score/wkspace.h>57 58 55 extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */ 59 60 56 61 57 BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial; … … 72 68 extern unsigned char ReadConfVPD_buff(int offset); 73 69 74 extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];75 extern unsigned long __SBSS2_START__[], __SBSS2_END__[];76 77 70 uint32_t bsp_clicks_per_usec; 78 79 SPR_RW(SPRG1)80 71 81 72 typedef struct CmdLineRec_ { … … 133 124 printk("%s PANIC ERROR %x\n",_RTEMS_version, v); 134 125 __asm__ __volatile ("sc"); 135 }136 137 void zero_bss(void)138 {139 memset(140 __SBSS_START__,141 0,142 ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)143 );144 memset(145 __SBSS2_START__,146 0,147 ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)148 );149 memset(150 __bss_start,151 0,152 ((unsigned) __rtems_end) - ((unsigned)__bss_start)153 );154 126 } 155 127 … … 295 267 296 268 BSP_mem_size = probeMemoryEnd(); 269 297 270 /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit 298 271 * of System Status register … … 303 276 /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */ 304 277 BSP_time_base_divisor = 4000; 305 306 278 307 279 /* Maybe not setup yet becuase of the warning message */ -
c/src/lib/libbsp/powerpc/mvme5500/vme/VMEConfig.h
rfeb940f7 r169480b 1 1 #ifndef RTEMS_BSP_VME_CONFIG_H 2 2 #define RTEMS_BSP_VME_CONFIG_H 3 /* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04 */ 3 /* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04 4 * 5 * May 2011 : Use the VME shared IRQ handlers. 6 * 7 * It seems that the implementation of VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND 8 * is not fully developed. The UNIV_REGOFF_VCSR_BS is defined for VME64 9 * specification, which does not apply to a VME32 crate. In order to avoid 10 * spurious VME interrupts, a better and more universal solution is 11 * to flush the vmeUniverse FIFO by reading a register back within the 12 * users' Interrupt Service Routine (ISR) before returning. 13 * 14 * Some devices might require the ISR to issue an interrupt status READ 15 * after its IRQ is cleared, but before its corresponding interrupt 16 * is enabled again. 17 * 18 */ 4 19 /* BSP specific address space configuration parameters */ 5 20 6 /* 21 /* 7 22 * The BSP maps VME address ranges into 8 23 * one BAT. … … 12 27 */ 13 28 #define _VME_A32_WIN0_ON_PCI 0x90000000 29 /* If _VME_CSR_ON_PCI is defined then the A32 window is reduced to accommodate 30 * CSR for space. 31 */ 32 #define _VME_CSR_ON_PCI 0x9e000000 14 33 #define _VME_A24_ON_PCI 0x9f000000 15 34 #define _VME_A16_ON_PCI 0x9fff0000 … … 31 50 #define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \ 32 51 do { \ 33 err = vmeUniverseInstallIrqMgr(0,64+12,1,64+13); \ 52 err = vmeUniverseInstallIrqMgrAlt(VMEUNIVERSE_IRQ_MGR_FLAG_SHARED,\ 53 0, BSP_GPP_VME_VLINT0, \ 54 1, BSP_GPP_VME_VLINT1, \ 55 2, BSP_GPP_VME_VLINT2, \ 56 3, BSP_GPP_VME_VLINT3, \ 57 -1 /* terminate list */); \ 34 58 } while (0) 35 59
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