Changeset 14ec2d4 in rtems

Timestamp:

Jun 13, 2003, 1:41:05 PM (18 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

9274ea7

Parents:

c5c2122

Message:

2003-06-13 Till Straumann <strauman@…>

PR 415/bsps

• include/bsp.h, pci/detect_raven_bridge.c, startup/bspstart.c: Support enabling MCP exceptions on the host bridge. This can be used for memory probing on the VME bus.

Location:

c/src/lib/libbsp/powerpc/shared

Files:

• ChangeLog (modified) (1 diff)
• include/bsp.h (modified) (1 diff)
• pci/detect_raven_bridge.c (modified) (3 diffs)
• startup/bspstart.c (modified) (1 diff)

c/src/lib/libbsp/powerpc/shared/ChangeLog

@@ +1 @@
+2003-06-13  Till Straumann <strauman@slac.stanford.edu>
+
+        PR 415/bsps
+        * include/bsp.h, pci/detect_raven_bridge.c, startup/bspstart.c:
+        Support enabling MCP exceptions on the host bridge. This can
+        be used for memory probing on the VME bus.
+
 2003-04-15      Joel Sherrill <joel@OARcorp.com>
 

c/src/lib/libbsp/powerpc/shared/include/bsp.h

@@ -92 +92 @@
 extern int BSP_connect_clock_handler (void);
 
+/* clear hostbridge errors
+ *
+ * enableMCP: whether to enable MCP checkstop / machine check interrupts
+ *            on the hostbridge and in HID0.
+ *
+ *            NOTE: HID0 and MEREN are left alone if this flag is 0
+ *
+ * quiet    : be silent
+ *
+ * RETURNS  : raven MERST register contents (lowermost 16 bits), 0 if
+ *            there were no errors
+ */
+extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
+
+
 /*
  *  TM27 stuff

c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c

@@ -4 +4 @@
 
 #include <libcpu/io.h>
+#include <libcpu/spr.h>
 
 #include <bsp.h>
@@ -13 +14 @@
 #include <rtems/bspIo.h>
 
+SPR_RW(HID0)
+
 #define RAVEN_MPIC_IOSPACE_ENABLE       0x1
 #define RAVEN_MPIC_MEMSPACE_ENABLE      0x2
@@ -20 +23 @@
 #define RAVEN_CLEAR_EVENTS_MASK         0xf9000000
 
+#define RAVEN_MPIC_MEREN                0xfeff0020
+#define RAVEN_MPIC_MERST                0xfeff0024
+/* enable machine check on all conditions
+ * EXCEPT for signalled master abort (which
+ * can be caused by PCI configuration space
+ * accesses to non-present devices)
+ * - of course, this is sort of a hack :-(
+ */
+#define MEREN_VAL                               0x2d00
+
 #define pci BSP_pci_configuration
 
 extern const pci_config_access_functions pci_direct_functions;
 extern const pci_config_access_functions pci_indirect_functions;
+
+unsigned long
+_BSP_clear_hostbridge_errors(int enableMCP, int quiet)
+{
+unsigned merst;
+
+                merst = in_be32(RAVEN_MPIC_MERST);
+                /* write back value to clear status */
+                out_be32(RAVEN_MPIC_MERST, merst);
+
+                if (enableMCP) {
+                        if (!quiet)
+                                printk("Enabling MCP generation on hostbridge errors\n");
+                        out_be32(RAVEN_MPIC_MEREN, MEREN_VAL);
+                        _write_HID0(_read_HID0() | HID0_EMCP );
+                } else {
+                        if ( !quiet && enableMCP ) {
+                                printk("leaving MCP interrupt disabled\n");
+                        }
+                }
+                return (merst & 0xffff);
+}
 
 void detect_host_bridge()

c/src/lib/libbsp/powerpc/shared/startup/bspstart.c

@@ -324 +324 @@
                                            residualCopy.VitalProductData.TimeBaseDivisor : 4000);
 
+  /* clear hostbridge errors and enable MCP */
+  _BSP_clear_hostbridge_errors(1/*enableMCP*/, 0/*quiet*/);
+
   /* Allocate and set up the page table mappings
    * This is only available on >604 CPUs.