Changeset 14de20f in rtems


Ignore:
Timestamp:
Jun 24, 2016, 9:22:43 AM (3 years ago)
Author:
Pavel Pisa <pisa@…>
Branches:
master
Children:
50a56dff
Parents:
8dcb8837
git-author:
Pavel Pisa <pisa@…> (06/24/16 09:22:43)
git-committer:
Pavel Pisa <pisa@…> (06/24/16 09:24:09)
Message:

arm/raspberrypi: Force VC mail box buffer to be synchronized through cache.

This solution is quick fix until CPU_DATA_CACHE_ALIGNMENT is defined
and cache manager is checked on all Raspberry Pi variants.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/raspberrypi/misc/vc.c

    r8dcb8837 r14de20f  
    3535bcm2835_mailbox_buffer_suceeded(const bcm2835_mbox_buf_hdr *hdr)
    3636{
     37  RTEMS_COMPILER_MEMORY_BARRIER();
    3738  return (hdr->buf_code == BCM2835_MBOX_BUF_CODE_REQUEST_SUCCEED);
    3839}
     
    5960  sctlr_val = arm_cp15_get_control();
    6061
     62  RTEMS_COMPILER_MEMORY_BARRIER();
    6163  arm_cp15_drain_write_buffer();
    6264  if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
    63     arm_cp15_drain_write_buffer();
     65#if 0
     66    /*
     67    These architecture independent RTEMS API functions should be
     68    used there but CPU_DATA_CACHE_ALIGNMENT is not defined
     69    for ARM architecture version used on RPi and functions
     70    are dummy for now and do not provide required synchronization
     71    */
    6472    rtems_cache_flush_multiple_data_lines(buf, size);
    6573    rtems_cache_invalidate_multiple_data_lines(buf, size);
     74#else
     75    /* Flush complete data cache */
     76    arm_cp15_data_cache_clean_and_invalidate();
     77#endif
    6678  }
    6779}
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