Changeset 129b4a79 in rtems


Ignore:
Timestamp:
Jul 23, 2003, 5:40:02 PM (17 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
1e4d4f85
Parents:
1ede24c
Message:

2003-07-18 Till Straumann <strauman@…>

PR 288/rtems

  • support/new_exception_processing/cpu.c: _ISR_Nest_level is now properly maintained and does not reside in SPRG0.
Location:
c/src/lib
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/ChangeLog

    r1ede24c r129b4a79  
     12003-07-18      Till Straumann <strauman@slac.stanford.edu>
     2
     3        PR 288/rtems
     4        * support/new_exception_processing/cpu.c: _ISR_Nest_level is now
     5        properly maintained and does not reside in SPRG0.
     6
    172003-03-06      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    28
  • c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c

    r1ede24c r129b4a79  
    5151{
    5252  _CPU_Table = *cpu_table;
     53
     54  { unsigned hasFixed = 0;
     55  /* assert that our BSP has fixed PR288 */
     56  __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
     57  if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
     58    BSP_panic("This BSP needs to fix PR#288");
     59  }
     60  }
    5361}
    5462
     
    144152}
    145153
    146 /*PAGE
    147  *
    148  *  This is the PowerPC specific implementation of the routine which
    149  *  returns TRUE if an interrupt is in progress.
    150  */
    151 
    152 boolean _ISR_Is_in_progress( void )
    153 {
    154   /*
    155    *  Until the patch on PR288 is in all new exception BSPs, this is
    156    *  the safest thing to do.
    157    */
    158 #ifdef mpc8260
    159   return (_ISR_Nest_level != 0);
    160 #else
    161   register unsigned int isr_nesting_level;
    162   /*
    163    * Move from special purpose register 0 (mfspr SPRG0, r3)
    164    */
    165   asm volatile ("mfspr  %0, 272" : "=r" (isr_nesting_level));
    166   return isr_nesting_level;
    167 #endif
    168 }
    169 
  • c/src/lib/libcpu/powerpc/new-exceptions/cpu.c

    r1ede24c r129b4a79  
    5151{
    5252  _CPU_Table = *cpu_table;
     53
     54  { unsigned hasFixed = 0;
     55  /* assert that our BSP has fixed PR288 */
     56  __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
     57  if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
     58    BSP_panic("This BSP needs to fix PR#288");
     59  }
     60  }
    5361}
    5462
     
    144152}
    145153
    146 /*PAGE
    147  *
    148  *  This is the PowerPC specific implementation of the routine which
    149  *  returns TRUE if an interrupt is in progress.
    150  */
    151 
    152 boolean _ISR_Is_in_progress( void )
    153 {
    154   /*
    155    *  Until the patch on PR288 is in all new exception BSPs, this is
    156    *  the safest thing to do.
    157    */
    158 #ifdef mpc8260
    159   return (_ISR_Nest_level != 0);
    160 #else
    161   register unsigned int isr_nesting_level;
    162   /*
    163    * Move from special purpose register 0 (mfspr SPRG0, r3)
    164    */
    165   asm volatile ("mfspr  %0, 272" : "=r" (isr_nesting_level));
    166   return isr_nesting_level;
    167 #endif
    168 }
    169 
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