Changeset 12718134 in rtems
- Timestamp:
- Apr 24, 2017, 1:10:41 PM (3 years ago)
- Branches:
- master
- Children:
- e6fbd26
- Parents:
- a9859d1
- git-author:
- Daniel Hellstrom <daniel@…> (04/24/17 13:10:41)
- git-committer:
- Daniel Hellstrom <daniel@…> (05/14/17 10:31:56)
- Location:
- c/src/lib/libbsp/sparc/shared
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/sparc/shared/include/greth.h
ra9859d1 r12718134 83 83 #define GRETH_CTRL_RST 0x00000040 /* Reset MAC */ 84 84 #define GRETH_CTRL_DD 0x00001000 /* Disable EDCL Duplex Detection */ 85 #define GRETH_CTRL_ED 0x00004000 /* EDCL Disable */ 85 86 86 87 /* Status Register */ -
c/src/lib/libbsp/sparc/shared/net/greth.c
ra9859d1 r12718134 155 155 int minor; 156 156 int phyaddr; /* PHY Address configured by user (or -1 to autodetect) */ 157 unsigned int edcl_dis; 157 158 158 159 int acceptBroadcast; … … 351 352 int tmp2; 352 353 struct timespec tstart, tnow; 353 354 354 greth_regs *regs; 355 355 356 356 regs = sc->regs; 357 357 358 358 /* Reset the controller. */ 359 359 sc->rxInterrupts = 0; 360 360 sc->rxPackets = 0; 361 361 362 regs->ctrl = GRETH_CTRL_RST ;/* Reset ON */362 regs->ctrl = GRETH_CTRL_RST | GRETH_CTRL_DD | GRETH_CTRL_ED; /* Reset ON */ 363 363 for (i = 0; i<100 && (regs->ctrl & GRETH_CTRL_RST); i++) 364 364 ; 365 regs->ctrl = GRETH_CTRL_DD ;/* Reset OFF. SW do PHY Init */365 regs->ctrl = GRETH_CTRL_DD | GRETH_CTRL_ED; /* Reset OFF. SW do PHY Init */ 366 366 367 367 /* Check if mac is gbit capable*/ … … 505 505 while ((read_mii(sc, phyaddr, 0)) & 0x8000) {} 506 506 507 regs->ctrl = GRETH_CTRL_RST ;/* Reset ON */507 regs->ctrl = GRETH_CTRL_RST | GRETH_CTRL_DD | GRETH_CTRL_ED; /* Reset ON */ 508 508 for (i = 0; i < 100 && (regs->ctrl & GRETH_CTRL_RST); i++) 509 509 ; 510 regs->ctrl = GRETH_CTRL_DD ;510 regs->ctrl = GRETH_CTRL_DD | sc->edcl_dis; /* Reset OFF. SW do PHY Init */ 511 511 512 512 /* Initialize rx/tx descriptor table pointers. Due to alignment we … … 585 585 } 586 586 sc->next_tx_mbuf = NULL; 587 587 588 588 if ( !sc->gbit_mac ) 589 589 sc->max_fragsize = 1; … … 1161 1161 ifp->if_flags &= ~IFF_RUNNING; 1162 1162 1163 sc->regs->ctrl = 0; /* RX/TX OFF */ 1164 sc->regs->ctrl = GRETH_CTRL_RST; /* Reset ON */ 1165 sc->regs->ctrl = 0; /* Reset OFF */ 1163 /* RX/TX OFF */ 1164 sc->regs->ctrl = GRETH_CTRL_DD | GRETH_CTRL_ED; 1165 /* Reset ON */ 1166 sc->regs->ctrl = GRETH_CTRL_RST | GRETH_CTRL_DD | GRETH_CTRL_ED; 1167 /* Reset OFF and restore link settings previously detected if any */ 1168 sc->regs->ctrl = GRETH_CTRL_DD | sc->edcl_dis | 1169 (sc->gb << 8) | (sc->sp << 7) | (sc->fd << 4); 1166 1170 SPIN_UNLOCK_IRQ(&sc->devlock, flags); 1167 1171 … … 1425 1429 struct ambapp_core *pnpinfo; 1426 1430 union drvmgr_key_value *value; 1431 unsigned int speed; 1427 1432 1428 1433 /* Get device information from AMBA PnP information */ … … 1435 1440 sc->minor = sc->dev->minor_drv; 1436 1441 1437 /* clear control register and reset NIC 1442 /* Remember EDCL enabled/disable state before reset */ 1443 sc->edcl_dis = sc->regs->ctrl & GRETH_CTRL_ED; 1444 1445 /* Default is to inherit EDCL Disable bit from HW. User can force En/Dis */ 1446 value = drvmgr_dev_key_get(sc->dev, "edclDis", DRVMGR_KT_INT); 1447 if ( value ) { 1448 /* Force EDCL mode. Has an effect later when GRETH+PHY is initialized */ 1449 if (value->i > 0) 1450 sc->edcl_dis = GRETH_CTRL_ED; 1451 else 1452 sc->edcl_dis = 0; 1453 } 1454 1455 /* clear control register and reset NIC and keep current speed modes. 1438 1456 * This should be done as quick as possible during startup, this is to 1439 1457 * stop DMA transfers after a reboot. 1440 1458 */ 1441 sc->regs->ctrl = 0; 1442 sc->regs->ctrl = GRETH_CTRL_RST; 1443 sc->regs->ctrl = 0; 1459 speed = sc->regs->ctrl & (GRETH_CTRL_GB | GRETH_CTRL_SP | GRETH_CTRL_FULLD); 1460 sc->regs->ctrl = GRETH_CTRL_DD | GRETH_CTRL_ED; 1461 sc->regs->ctrl = GRETH_CTRL_RST | GRETH_CTRL_DD | GRETH_CTRL_ED; 1462 sc->regs->ctrl = GRETH_CTRL_DD | sc->edcl_dis | speed; 1444 1463 1445 1464 /* Configure driver by overriding default config with the bus resources
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