Changeset 0f9ecc4e in rtems


Ignore:
Timestamp:
Dec 11, 2007, 3:45:54 PM (12 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.9, master
Children:
35f1d89
Parents:
36a8a2d
Message:

2007-12-11 Joel Sherrill <joel.sherrill@…>

  • mcf5206/clock/ckinit.c, mcf5272/clock/ckinit.c: Eliminate copies of the Configuration Table. Use the RTEMS provided accessor macros to obtain configuration fields.
Location:
c/src/lib/libcpu/m68k
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/m68k/ChangeLog

    r36a8a2d r0f9ecc4e  
     12007-12-11      Joel Sherrill <joel.sherrill@OARcorp.com>
     2
     3        * mcf5206/clock/ckinit.c, mcf5272/clock/ckinit.c: Eliminate copies of
     4        the Configuration Table. Use the RTEMS provided accessor macros to
     5        obtain configuration fields.
     6
    172007-11-22      Chris Johns <chrisj@rtems.org>
    28
  • c/src/lib/libcpu/m68k/mcf5206/clock/ckinit.c

    r36a8a2d r0f9ecc4e  
    8080Clock_exit(void)
    8181{
    82     if (BSP_Configuration.ticks_per_timeslice)
     82    if (rtems_configuration_get_ticks_per_timeslice())
    8383    {
    8484        /* disable all timer1 interrupts */
     
    108108{
    109109    Clock_driver_ticks = 0;
    110     if (BSP_Configuration.ticks_per_timeslice)
     110    if (rtems_configuration_get_ticks_per_timeslice())
    111111    {
    112112        /* Configure timer1 interrupts */
     
    134134           
    135135        /* Set the timer timeout value from the BSP config */     
    136         *MCF5206E_TRR(MBAR, 1) = BSP_Configuration.microseconds_per_tick - 1;
     136        *MCF5206E_TRR(MBAR, 1) = rtems_configuration_get_microseconds_per_tick() - 1;
    137137
    138138        /* Feed system frequency to the timer */
  • c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c

    r36a8a2d r0f9ecc4e  
    8585Clock_exit(void)
    8686{
    87     if (BSP_Configuration.ticks_per_timeslice) {
     87    if (rtems_configuration_get_ticks_per_timeslice()) {
    8888        uint32_t icr;
    8989        /* disable all timer1 interrupts */
     
    115115Install_clock(rtems_isr_entry clock_isr)
    116116{
    117     uint32_t icr;
    118     Clock_driver_ticks = 0;
    119     if (BSP_Configuration.ticks_per_timeslice) {
    120        
    121         /* Register the interrupt handler */
    122         set_vector(clock_isr, BSP_INTVEC_TMR1, 1);
    123        
    124         /* Reset timer 1 */
    125         g_timer_regs->tmr1 = MCF5272_TMR_RST;
    126         g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP;
    127         g_timer_regs->tmr1 = MCF5272_TMR_RST;
    128         g_timer_regs->tcn1 = 0;  /* reset counter */
    129         g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP;
    130        
    131         /* Set Timer 1 prescaler so that it counts in microseconds */
    132         g_timer_regs->tmr1 = (
    133             ((((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) |
    134              MCF5272_TMR_CE_DISABLE                                      |
    135              MCF5272_TMR_ORI                                             |
    136              MCF5272_TMR_FRR                                             |
    137              MCF5272_TMR_CLK_MSTR                                        |
    138              MCF5272_TMR_RST));
    139 
    140         /* Set the timer timeout value from the BSP config */     
    141         g_timer_regs->trr1 = BSP_Configuration.microseconds_per_tick - 1;
    142 
    143         /* Feed system frequency to the timer */
    144         g_timer_regs->tmr1 |= MCF5272_TMR_CLK_MSTR;
    145            
    146         /* Configure timer1 interrupts */
    147         icr = g_intctrl_regs->icr1;
    148         icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI);
    149         icr |= (MCF5272_ICR1_TMR1_IPL(BSP_INTLVL_TMR1) | MCF5272_ICR1_TMR1_PI);
    150         g_intctrl_regs->icr1 = icr;
    151 
    152         /* Register the driver exit procedure so we can shutdown */
    153         atexit(Clock_exit);
    154     }
     117  uint32_t icr;
     118  Clock_driver_ticks = 0;
     119  if (rtems_configuration_get_ticks_per_timeslice()) {
     120     
     121      /* Register the interrupt handler */
     122      set_vector(clock_isr, BSP_INTVEC_TMR1, 1);
     123     
     124      /* Reset timer 1 */
     125      g_timer_regs->tmr1 = MCF5272_TMR_RST;
     126      g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP;
     127      g_timer_regs->tmr1 = MCF5272_TMR_RST;
     128      g_timer_regs->tcn1 = 0;  /* reset counter */
     129      g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP;
     130     
     131      /* Set Timer 1 prescaler so that it counts in microseconds */
     132      g_timer_regs->tmr1 = (
     133          ((((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) |
     134           MCF5272_TMR_CE_DISABLE                                      |
     135           MCF5272_TMR_ORI                                             |
     136           MCF5272_TMR_FRR                                             |
     137           MCF5272_TMR_CLK_MSTR                                        |
     138           MCF5272_TMR_RST));
     139
     140      /* Set the timer timeout value from the BSP config */     
     141      g_timer_regs->trr1 = rtems_configuration_get_microseconds_per_tick() - 1;
     142
     143      /* Feed system frequency to the timer */
     144      g_timer_regs->tmr1 |= MCF5272_TMR_CLK_MSTR;
     145         
     146      /* Configure timer1 interrupts */
     147      icr = g_intctrl_regs->icr1;
     148      icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI);
     149      icr |= (MCF5272_ICR1_TMR1_IPL(BSP_INTLVL_TMR1) | MCF5272_ICR1_TMR1_PI);
     150      g_intctrl_regs->icr1 = icr;
     151
     152      /* Register the driver exit procedure so we can shutdown */
     153      atexit(Clock_exit);
     154  }
    155155}
    156156
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