Changeset 0f1590b in rtems


Ignore:
Timestamp:
Jan 21, 2006, 1:46:07 AM (14 years ago)
Author:
Till Straumann <strauman@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
e1f4b2d7
Parents:
4398f42
Message:

2006-01-20 Till Straumann <strauman@…>

  • mpc6xx/mmu/pte121.c: consistency check now warns instead of reporting an error when coming across a non 1:1 VSID; fix: triv121IsRangeMapped() needs to convert segment offset into a page index if the vsid argument is non-special.
Location:
c/src/lib/libcpu/powerpc
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/powerpc/ChangeLog

    r4398f42 r0f1590b  
     12006-01-20      Till Straumann <strauman@slac.stanford.edu>
     2    * mpc6xx/mmu/pte121.c: consistency check now warns instead
     3    of reporting an error when coming across a non 1:1 VSID;
     4    fix: triv121IsRangeMapped() needs to convert segment offset
     5    into a page index if the vsid argument is non-special.
     6
    172006-01-05      Till Straumann <strauman@slac.stanford.edu>
    28        * shared/include/cpuIdent.c: Accept PPC_PSIM as a
  • c/src/lib/libcpu/powerpc/mpc6xx/mmu/pte121.c

    r4398f42 r0f1590b  
    695695  unsigned v, m;
    696696  int warn = 0;
     697  int errs = 0;
    697698  static int maxw = 20;         /* mute after detecting this many errors */
    698699
     
    735736#endif
    736737
    737     if ((*lp & (0xfffff0 << 7)) || *(lp + 1) & 0xe00
     738    if ( /* T.S: allow any VSID... (*lp & (0xfffff0 << 7)) || */ (*(lp + 1) & 0xe00)
    738739        || (pte->v && pte->marked)) {
    739740      /* check for vsid (without segment bits) == 0, unused bits == 0, valid && marked */
    740       sprintf (buf, "invalid VSID , unused bits or v && m");
     741      sprintf (buf, "unused bits or v && m");
    741742      err = 1;
    742743    } else {
     744      if ( (*lp & (0xfffff0 << 7)) ) {
     745        sprintf(buf,"(warning) non-1:1 VSID found");
     746        err = 2;
     747      }
    743748      if (pte->v)
    744749        v++;
     
    752757      PRINTF ("Reason: %s\n", buf);
    753758      dumpPte (pte);
    754       warn++;
     759      if ( err & 2 ) {
     760         warn++;
     761      } else {
     762         errs++;
     763      }
    755764      maxw--;
    756765    }
    757766  }
     767  if (errs) {
     768    PRINTF ("%i errors %s", errs, warn ? "and ":"");
     769  }
    758770  if (warn) {
    759     PRINTF ("%i errors found; currently %i entries marked, %i are valid\n",
    760             warn, m, v);
     771    PRINTF ("%i warnings ",warn);
     772  }
     773  if (errs || warn) {
     774    PRINTF ("found; currently %i entries marked, %i are valid\n",
     775            m, v);
    761776  }
    762777  v += m;
     
    964979#endif
    965980
    966 /* Verify that a range of EAs is mapped the page table
    967  * (if vsid has one of the special values -- otherwise,
    968  * start/end are page indices).
     981/* Verify that a range of addresses is mapped the page table.
     982 * start/end are segment offsets or EAs (if vsid has one of
     983 * the special values), respectively.
    969984 *
    970985 * RETURNS: address of the first page for which no
     
    975990 *          a valid page address].
    976991 */
     992
    977993unsigned long
    978994triv121IsRangeMapped (long vsid, unsigned long start, unsigned long end)
    979995{
     996unsigned pi;
     997
    980998  start &= ~((1 << LD_PG_SIZE) - 1);
    981999  while (start < end) {
    982     if (!alreadyMapped (&pgTbl, vsid, start))
     1000    if ( TRIV121_SEG_VSID != vsid && TRIV121_121_VSID != vsid )
     1001      pi = PI121(start);
     1002    else
     1003      pi = start;
     1004    if (!alreadyMapped (&pgTbl, vsid, pi))
    9831005      return start;
    9841006    start += 1 << LD_PG_SIZE;
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