Changeset 0e507d55 in rtems


Ignore:
Timestamp:
Jul 2, 2016, 10:19:38 PM (3 years ago)
Author:
Pavel Pisa <pisa@…>
Branches:
master
Children:
abea02a8
Parents:
2d5902d6
git-author:
Pavel Pisa <pisa@…> (07/02/16 22:19:38)
git-committer:
Pavel Pisa <pisa@…> (07/04/16 13:55:57)
Message:

rtems+bsps/cache: Define cache manager operations for code synchronization and maximal alignment.

There is need for unambiguous named and defined cache function
which should be called when code is updated, loaded
or is self-modifying.

There should be function to obtain maximal cache line length
as well. This function can and should be used for allocations
which can be used for data and or code and ensures that
there are no partial cache lines overlaps on start and
end of allocated region.

Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/shared/src/cache_manager.c

    r2d5902d6 r0e507d55  
    478478#endif
    479479}
     480
     481/* Returns the maximal cache line size of all cache kinds in bytes. */
     482size_t rtems_cache_get_maximal_line_size( void )
     483{
     484#if defined(CPU_MAXIMAL_CACHE_ALIGNMENT)
     485  return CPU_MAXIMAL_CACHE_ALIGNMENT;
     486#endif
     487  size_t max_line_size = 0;
     488#if defined(CPU_DATA_CACHE_ALIGNMENT)
     489  {
     490    size_t data_line_size = CPU_DATA_CACHE_ALIGNMENT;
     491    if ( max_line_size < data_line_size )
     492      max_line_size = data_line_size;
     493  }
     494#endif
     495#if defined(CPU_INSTRUCTION_CACHE_ALIGNMENT)
     496  {
     497    size_t instruction_line_size = CPU_INSTRUCTION_CACHE_ALIGNMENT;
     498    if ( max_line_size < instruction_line_size )
     499      max_line_size = instruction_line_size;
     500  }
     501#endif
     502  return max_line_size;
     503}
     504
     505/*
     506 * Purpose is to synchronize caches after code has been loaded
     507 * or self modified. Actual implementation is simple only
     508 * but it can and should be repaced by optimized version
     509 * which does not need flush and invalidate all cache levels
     510 * when code is changed.
     511 */
     512void
     513rtems_cache_instruction_sync_after_code_change( const void * code_addr, size_t n_bytes )
     514{
     515#if defined(CPU_CACHE_SUPPORT_PROVIDES_INSTRUCTION_SYNC_FUNCTION)
     516  _CPU_cache_instruction_sync_after_code_change( code_addr, n_bytes );
     517#else
     518  rtems_cache_flush_multiple_data_lines( code_addr, n_bytes );
     519  rtems_cache_invalidate_multiple_instruction_lines( code_addr, n_bytes );
     520#endif
     521}
  • cpukit/libcsupport/src/cachealignedalloc.c

    r2d5902d6 r0e507d55  
    1616void *rtems_cache_aligned_malloc( size_t nbytes )
    1717{
    18   size_t line_size = rtems_cache_get_data_line_size();
     18  size_t line_size = rtems_cache_get_maximal_line_size();
    1919
    2020  if ( line_size > 0 ) {
  • cpukit/rtems/include/rtems/rtems/cache.h

    r2d5902d6 r0e507d55  
    6060 */
    6161size_t rtems_cache_get_instruction_line_size( void );
     62
     63/**
     64 * @brief Returns the maximal cache line size of all cache kinds in bytes.
     65 *
     66 * Returns computed or obtained maximal cache line size of all
     67 * all caches in the system.
     68 *
     69 * @retval 0 No cache is present
     70 * @retval positive The maximal cache line size in bytes.
     71 */
     72size_t rtems_cache_get_maximal_line_size( void );
    6273
    6374/**
     
    124135  const void *addr,
    125136  size_t size
     137);
     138
     139
     140/**
     141 * @brief Ensure necessary synchronization required after code changes
     142 *
     143 * When code is loaded or modified then many Harvard cache equipped
     144 * systems require synchronization of main memory and or updated
     145 * code in data cache to ensure visibility of change in all
     146 * connected CPUs instruction memory view. This operation
     147 * should be used by run time loader for example.
     148 *
     149 * @param[in] addr The start address of the area to invalidate.
     150 * @param[in] size The size in bytes of the area to invalidate.
     151 */
     152void rtems_cache_instruction_sync_after_code_change(
     153  const void * code_addr,
     154  size_t n_bytes
    126155);
    127156
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