Ignore:
Timestamp:
Jan 11, 2000, 5:34:20 PM (22 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
76c2b35
Parents:
bdb2899
Message:

Removed old hack of using Configuration Table entry ticks_per_timeslice
being set to 0 to indicate that there should be no Clock Tick. This
was used by the Timing Tests to avoid clock tick overhead perturbing
execution times. Now the Timing Tests simply leave the Clock Tick
Driver out of the Device Driver Table.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/powerpc/mpc860/clock/clock.c

    rbdb2899 r0dd1d44  
    8383    rtems_fatal_error_occurred(-1);
    8484  } 
    85   if ( rtems_configuration_get_ticks_per_timeslice() ) {
    8685   
    87     /*
    88      * initialize the interval here
    89      * First tick is set to right amount of time in the future
    90      * Future ticks will be incremented over last value set
    91      * in order to provide consistent clicks in the face of
    92      * interrupt overhead
    93      */
     86  /*
     87   * initialize the interval here
     88   * First tick is set to right amount of time in the future
     89   * Future ticks will be incremented over last value set
     90   * in order to provide consistent clicks in the face of
     91   * interrupt overhead
     92   */
     93 
     94  rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
    9495   
    95     rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
     96  m860.sccr &= ~(1<<24);
     97  m860.pitc = pit_value;
    9698   
    97     m860.sccr &= ~(1<<24);
    98     m860.pitc = pit_value;
     99  /* set PIT irq level, enable PIT, PIT interrupts */
     100  /*  and clear int. status */
     101  m860.piscr = M860_PISCR_PIRQ(0) |
     102    M860_PISCR_PTE | M860_PISCR_PS | M860_PISCR_PIE;
    99103   
    100     /* set PIT irq level, enable PIT, PIT interrupts */
    101     /*  and clear int. status */
    102     m860.piscr = M860_PISCR_PIRQ(0) |
    103       M860_PISCR_PTE | M860_PISCR_PS | M860_PISCR_PIE;
    104    
    105     m860.simask |= M860_SIMASK_LVM0;
    106   }
     104  m860.simask |= M860_SIMASK_LVM0;
    107105  atexit(Clock_exit);
    108106}
     
    129127Clock_exit(void)
    130128{
    131   if ( rtems_configuration_get_ticks_per_timeslice() ) {
    132     /* disable PIT and PIT interrupts */
    133     m860.piscr &= ~(M860_PISCR_PTE | M860_PISCR_PIE);
     129  /* disable PIT and PIT interrupts */
     130  m860.piscr &= ~(M860_PISCR_PTE | M860_PISCR_PIE);
    134131   
    135     (void) set_vector(0, PPC_IRQ_LVL0, 1);
    136   }
     132  (void) set_vector(0, PPC_IRQ_LVL0, 1);
    137133}
    138134
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