Changeset 0d44334c in rtems


Ignore:
Timestamp:
Jan 18, 2021, 9:02:40 AM (7 weeks ago)
Author:
Christian Mauderer <christian.mauderer@…>
Branches:
5
Children:
5ae7ec9
Parents:
2a8f755
git-author:
Christian Mauderer <christian.mauderer@…> (01/18/21 09:02:40)
git-committer:
Christian Mauderer <christian.mauderer@…> (01/21/21 09:29:15)
Message:

bsp/imx: Fix system counter init for imx6

For i.MX7 U-Boot initializes the system counter. On i.MX6 Barebox is
often used which doesn't initialize the counter. With this patch, we try
to auto-detect whether the counter is initialized or not and do the
initialization ourself if necessary.

Closes #4220

File:
1 edited

Legend:

Unmodified
Added
Removed
  • bsps/arm/imx/start/bspstart.c

    r2a8f755 r0d44334c  
    1919#include <bsp/irq-generic.h>
    2020#include <bsp/linker-symbols.h>
     21#include <libcpu/arm-cp15.h>
    2122
    2223#include <libfdt.h>
     
    5960}
    6061
     62static bool imx_is_imx6(const void *fdt)
     63{
     64  /*
     65   * At the moment: Check for some compatible strings that should be there
     66   * somewhere in every fdt.
     67   *
     68   * FIXME: It would be nice if some CPU-ID could be used instead. But I didn't
     69   * find one.
     70   */
     71  int node;
     72
     73  node = fdt_node_offset_by_compatible(fdt, -1, "fsl,imx6ul");
     74  if (node >= 0) {
     75    return true;
     76  }
     77
     78  node = fdt_node_offset_by_compatible(fdt, -1, "fsl,imx6ull");
     79  if (node >= 0) {
     80    return true;
     81  }
     82
     83  return false;
     84}
     85
     86#define SYSCNT_CNTCR          (0x0)
     87#define SYSCNT_CNTCR_ENABLE   (1 << 0)
     88#define SYSCNT_CNTCR_HDBG     (1 << 1)
     89#define SYSCNT_CNTCR_FCREQ(n) (1 << (8 + (n)))
     90#define SYSCNT_CNTFID(n)      (0x20 + 4 * (n))
     91
     92static uint32_t imx_syscnt_enable_and_return_frequency(const void *fdt)
     93{
     94  uint32_t freq;
     95  volatile void *syscnt_base;
     96
     97  /* That's not in the usual FDTs. Sorry for falling back to a magic value. */
     98  if (imx_is_imx6(fdt)) {
     99    syscnt_base = (void *)0x021dc000;
     100  } else {
     101    syscnt_base = (void *)0x306c0000;
     102  }
     103
     104  freq = *(uint32_t *)(syscnt_base + SYSCNT_CNTFID(0));
     105
     106  arm_cp15_set_counter_frequency(freq);
     107
     108  *(uint32_t *)(syscnt_base + SYSCNT_CNTCR) =
     109    SYSCNT_CNTCR_ENABLE |
     110    SYSCNT_CNTCR_HDBG |
     111    SYSCNT_CNTCR_FCREQ(0);
     112
     113  return freq;
     114}
     115
    61116void arm_generic_timer_get_config(
    62117  uint32_t *frequency,
     
    76131    *frequency = fdt32_to_cpu(val[0]);
    77132  } else {
    78     bsp_fatal(IMX_FATAL_GENERIC_TIMER_FREQUENCY);
     133    /*
     134     * Normally clock-frequency would be provided by the boot loader. If it
     135     * didn't add one, we have to initialize the system counter ourself.
     136     */
     137    *frequency = imx_syscnt_enable_and_return_frequency(fdt);
    79138  }
    80139
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