Changeset 0d01cdd6 in rtems for c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
- Timestamp:
- 04/24/17 16:18:03 (6 years ago)
- Branches:
- 5, master
- Children:
- 3144292b
- Parents:
- 646df54c
- git-author:
- Joel Sherrill <joel@…> (04/24/17 16:18:03)
- git-committer:
- Joel Sherrill <joel@…> (04/24/17 17:00:59)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libcpu/sh/sh7750/sci/sh4uart.c
r646df54c r0d01cdd6 549 549 while ((SCSSR2 & SH7750_SCSSR2_TDFE) == 0 || 550 550 (SCSSR2 & SH7750_SCSSR2_TEND) == 0); 551 551 *ssr2 &= ~(SH7750_SCSSR1_TDRE | SH7750_SCSSR2_TEND); 552 552 } 553 553 }
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