Ignore:
Timestamp:
Mar 12, 2018, 7:53:09 PM (3 years ago)
Author:
Joel Sherrill <joel@…>
Branches:
5, master
Children:
478dc89
Parents:
c0443b4
git-author:
Joel Sherrill <joel@…> (03/12/18 19:53:09)
git-committer:
Joel Sherrill <joel@…> (03/13/18 14:55:23)
Message:

Add PowerPC paravirtualization support

Cannot read or write MSR when executing in user mode. This
is used when RTEMS_PARAVIRT is defined.

Provide alternate methods to disable/enable interrupts

Closes #3306.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S

    rc0443b4 r0a7a30d  
    129129 * available. Therefore, we must explicitely enable it here!
    130130 */
     131#if !defined(PPC_DISABLE_MSR_ACCESS)
    131132        mfmsr   r4
    132133        andi.   r5,r4,MSR_FP
     
    135136        mtmsr   r5
    136137        isync
     138#endif  /* END PPC_DISABLE_MSR_ACCESS */
     139
    1371401:
    138141        lwz     r3, 0(r3)
     
    171174        mffs    f2
    172175        STF     f2, FP_FPSCR(r3)
     176#if !defined(PPC_DISABLE_MSR_ACCESS)
    173177        bne     1f
    174178        mtmsr   r4
    175179        isync
     180#endif  /* END PPC_DISABLE_MSR_ACCESS */
     181
    1761821:
    177183        blr
     
    197203 * available. Therefore, we must explicitely enable it here!
    198204 */
     205#if !defined(PPC_DISABLE_MSR_ACCESS)
    199206        mfmsr   r4
    200207        andi.   r5,r4,MSR_FP
     
    203210        mtmsr   r5
    204211        isync
     212#endif  /* END PPC_DISABLE_MSR_ACCESS */
     213
    2052141:
    206215        LDF     f2, FP_FPSCR(r3)
     
    239248        LDF     f31, FP_31(r3)
    240249        bne     1f
     250#if !defined(PPC_DISABLE_MSR_ACCESS)
    241251        mtmsr   r4
    242252        isync
     253#endif  /* END PPC_DISABLE_MSR_ACCESS */
     254
    2432551:
    244256        blr
     
    267279
    268280        GET_SELF_CPU_CONTROL    r12
     281#if !defined(PPC_DISABLE_MSR_ACCESS)
    269282        mfmsr   r6
     283#endif  /* END PPC_DISABLE_MSR_ACCESS */
    270284        mfcr    r7
    271285        mflr    r8
     
    530544        mtlr    r8
    531545        mtcr    r7
     546#if !defined(PPC_DISABLE_MSR_ACCESS)
    532547        mtmsr   r6
     548#endif  /* END PPC_DISABLE_MSR_ACCESS */
    533549        stw     r11, PER_CPU_ISR_DISPATCH_DISABLE(r12)
    534550
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