Changeset 0a6a2a7b in rtems


Ignore:
Timestamp:
Mar 27, 2017, 11:20:20 AM (2 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
e2191d6c
Parents:
de9f326
git-author:
Sebastian Huber <sebastian.huber@…> (03/27/17 11:20:20)
git-committer:
Sebastian Huber <sebastian.huber@…> (03/27/17 11:37:58)
Message:

bsps/arm: Add Performance Monitors Extension

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/shared/include/arm-cp15.h

    rde9f326 r0a6a2a7b  
    99/*
    1010 * Copyright (c) 2013 Hesham AL-Matary
    11  * Copyright (c) 2009-2013 embedded brains GmbH.  All rights reserved.
     11 * Copyright (c) 2009-2017 embedded brains GmbH.  All rights reserved.
    1212 *
    1313 *  embedded brains GmbH
     
    14691469}
    14701470
     1471/* PMCCNTR */
     1472ARM_CP15_TEXT_SECTION static inline uint32_t
     1473arm_cp15_get_performance_monitors_cycle_count(void)
     1474{
     1475  ARM_SWITCH_REGISTERS;
     1476  uint32_t val;
     1477
     1478  __asm__ volatile (
     1479    ARM_SWITCH_TO_ARM
     1480    "mrc p15, 0, %[val], c9, c13, 0\n"
     1481    ARM_SWITCH_BACK
     1482    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1483  );
     1484
     1485  return val;
     1486}
     1487
     1488/* PMCCNTR */
     1489ARM_CP15_TEXT_SECTION static inline void
     1490arm_cp15_set_performance_monitors_cycle_count(uint32_t val)
     1491{
     1492  ARM_SWITCH_REGISTERS;
     1493
     1494  __asm__ volatile (
     1495    ARM_SWITCH_TO_ARM
     1496    "mcr p15, 0, %[val], c9, c13, 0\n"
     1497    ARM_SWITCH_BACK
     1498    : ARM_SWITCH_OUTPUT
     1499    : [val] "r" (val)
     1500  );
     1501}
     1502
     1503/* PMCEID0 */
     1504ARM_CP15_TEXT_SECTION static inline uint32_t
     1505arm_cp15_get_performance_monitors_common_event_id_0(void)
     1506{
     1507  ARM_SWITCH_REGISTERS;
     1508  uint32_t val;
     1509
     1510  __asm__ volatile (
     1511    ARM_SWITCH_TO_ARM
     1512    "mrc p15, 0, %[val], c9, c12, 6\n"
     1513    ARM_SWITCH_BACK
     1514    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1515  );
     1516
     1517  return val;
     1518}
     1519
     1520/* PMCEID1 */
     1521ARM_CP15_TEXT_SECTION static inline uint32_t
     1522arm_cp15_get_performance_monitors_common_event_id_1(void)
     1523{
     1524  ARM_SWITCH_REGISTERS;
     1525  uint32_t val;
     1526
     1527  __asm__ volatile (
     1528    ARM_SWITCH_TO_ARM
     1529    "mrc p15, 0, %[val], c9, c12, 7\n"
     1530    ARM_SWITCH_BACK
     1531    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1532  );
     1533
     1534  return val;
     1535}
     1536
     1537#define ARM_CP15_PMCLRSET_CYCLE_COUNTER 0x80000000
     1538
     1539/* PMCCNTENCLR */
     1540ARM_CP15_TEXT_SECTION static inline uint32_t
     1541arm_cp15_get_performance_monitors_count_enable_clear(void)
     1542{
     1543  ARM_SWITCH_REGISTERS;
     1544  uint32_t val;
     1545
     1546  __asm__ volatile (
     1547    ARM_SWITCH_TO_ARM
     1548    "mrc p15, 0, %[val], c9, c12, 2\n"
     1549    ARM_SWITCH_BACK
     1550    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1551  );
     1552
     1553  return val;
     1554}
     1555
     1556/* PMCCNTENCLR */
     1557ARM_CP15_TEXT_SECTION static inline void
     1558arm_cp15_set_performance_monitors_count_enable_clear(uint32_t val)
     1559{
     1560  ARM_SWITCH_REGISTERS;
     1561
     1562  __asm__ volatile (
     1563    ARM_SWITCH_TO_ARM
     1564    "mcr p15, 0, %[val], c9, c12, 2\n"
     1565    ARM_SWITCH_BACK
     1566    : ARM_SWITCH_OUTPUT
     1567    : [val] "r" (val)
     1568  );
     1569}
     1570
     1571/* PMCCNTENSET */
     1572ARM_CP15_TEXT_SECTION static inline uint32_t
     1573arm_cp15_get_performance_monitors_count_enable_set(void)
     1574{
     1575  ARM_SWITCH_REGISTERS;
     1576  uint32_t val;
     1577
     1578  __asm__ volatile (
     1579    ARM_SWITCH_TO_ARM
     1580    "mrc p15, 0, %[val], c9, c12, 1\n"
     1581    ARM_SWITCH_BACK
     1582    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1583  );
     1584
     1585  return val;
     1586}
     1587
     1588/* PMCCNTENSET */
     1589ARM_CP15_TEXT_SECTION static inline void
     1590arm_cp15_set_performance_monitors_count_enable_set(uint32_t val)
     1591{
     1592  ARM_SWITCH_REGISTERS;
     1593
     1594  __asm__ volatile (
     1595    ARM_SWITCH_TO_ARM
     1596    "mcr p15, 0, %[val], c9, c12, 1\n"
     1597    ARM_SWITCH_BACK
     1598    : ARM_SWITCH_OUTPUT
     1599    : [val] "r" (val)
     1600  );
     1601}
     1602
     1603#define ARM_CP15_PMCR_IMP(x) ((x) << 24)
     1604#define ARM_CP15_PMCR_IDCODE(x) ((x) << 16)
     1605#define ARM_CP15_PMCR_N(x) ((x) << 11)
     1606#define ARM_CP15_PMCR_DP (1U << 5)
     1607#define ARM_CP15_PMCR_X (1U << 3)
     1608#define ARM_CP15_PMCR_D (1U << 4)
     1609#define ARM_CP15_PMCR_C (1U << 2)
     1610#define ARM_CP15_PMCR_P (1U << 1)
     1611#define ARM_CP15_PMCR_E (1U << 0)
     1612
     1613/* PMCR */
     1614ARM_CP15_TEXT_SECTION static inline uint32_t
     1615arm_cp15_get_performance_monitors_control(void)
     1616{
     1617  ARM_SWITCH_REGISTERS;
     1618  uint32_t val;
     1619
     1620  __asm__ volatile (
     1621    ARM_SWITCH_TO_ARM
     1622    "mrc p15, 0, %[val], c9, c12, 0\n"
     1623    ARM_SWITCH_BACK
     1624    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1625  );
     1626
     1627  return val;
     1628}
     1629
     1630/* PMCR */
     1631ARM_CP15_TEXT_SECTION static inline void
     1632arm_cp15_set_performance_monitors_control(uint32_t val)
     1633{
     1634  ARM_SWITCH_REGISTERS;
     1635
     1636  __asm__ volatile (
     1637    ARM_SWITCH_TO_ARM
     1638    "mcr p15, 0, %[val], c9, c12, 0\n"
     1639    ARM_SWITCH_BACK
     1640    : ARM_SWITCH_OUTPUT
     1641    : [val] "r" (val)
     1642  );
     1643}
     1644
     1645/* PMINTENCLR */
     1646ARM_CP15_TEXT_SECTION static inline uint32_t
     1647arm_cp15_get_performance_monitors_interrupt_enable_clear(void)
     1648{
     1649  ARM_SWITCH_REGISTERS;
     1650  uint32_t val;
     1651
     1652  __asm__ volatile (
     1653    ARM_SWITCH_TO_ARM
     1654    "mrc p15, 0, %[val], c9, c14, 2\n"
     1655    ARM_SWITCH_BACK
     1656    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1657  );
     1658
     1659  return val;
     1660}
     1661
     1662/* PMINTENCLR */
     1663ARM_CP15_TEXT_SECTION static inline void
     1664arm_cp15_set_performance_monitors_interrupt_enable_clear(uint32_t val)
     1665{
     1666  ARM_SWITCH_REGISTERS;
     1667
     1668  __asm__ volatile (
     1669    ARM_SWITCH_TO_ARM
     1670    "mcr p15, 0, %[val], c9, c14, 2\n"
     1671    ARM_SWITCH_BACK
     1672    : ARM_SWITCH_OUTPUT
     1673    : [val] "r" (val)
     1674  );
     1675}
     1676
     1677/* PMINTENSET */
     1678ARM_CP15_TEXT_SECTION static inline uint32_t
     1679arm_cp15_get_performance_monitors_interrupt_enable_set(void)
     1680{
     1681  ARM_SWITCH_REGISTERS;
     1682  uint32_t val;
     1683
     1684  __asm__ volatile (
     1685    ARM_SWITCH_TO_ARM
     1686    "mrc p15, 0, %[val], c9, c14, 1\n"
     1687    ARM_SWITCH_BACK
     1688    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1689  );
     1690
     1691  return val;
     1692}
     1693
     1694/* PMINTENSET */
     1695ARM_CP15_TEXT_SECTION static inline void
     1696arm_cp15_set_performance_monitors_interrupt_enable_set(uint32_t val)
     1697{
     1698  ARM_SWITCH_REGISTERS;
     1699
     1700  __asm__ volatile (
     1701    ARM_SWITCH_TO_ARM
     1702    "mcr p15, 0, %[val], c9, c14, 1\n"
     1703    ARM_SWITCH_BACK
     1704    : ARM_SWITCH_OUTPUT
     1705    : [val] "r" (val)
     1706  );
     1707}
     1708
     1709/* PMOVSR */
     1710ARM_CP15_TEXT_SECTION static inline uint32_t
     1711arm_cp15_get_performance_monitors_overflow_flag_status(void)
     1712{
     1713  ARM_SWITCH_REGISTERS;
     1714  uint32_t val;
     1715
     1716  __asm__ volatile (
     1717    ARM_SWITCH_TO_ARM
     1718    "mrc p15, 0, %[val], c9, c12, 3\n"
     1719    ARM_SWITCH_BACK
     1720    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1721  );
     1722
     1723  return val;
     1724}
     1725
     1726/* PMOVSR */
     1727ARM_CP15_TEXT_SECTION static inline void
     1728arm_cp15_set_performance_monitors_overflow_flag_status(uint32_t val)
     1729{
     1730  ARM_SWITCH_REGISTERS;
     1731
     1732  __asm__ volatile (
     1733    ARM_SWITCH_TO_ARM
     1734    "mcr p15, 0, %[val], c9, c12, 3\n"
     1735    ARM_SWITCH_BACK
     1736    : ARM_SWITCH_OUTPUT
     1737    : [val] "r" (val)
     1738  );
     1739}
     1740
     1741/* PMOVSSET */
     1742ARM_CP15_TEXT_SECTION static inline uint32_t
     1743arm_cp15_get_performance_monitors_overflow_flag_status_set(void)
     1744{
     1745  ARM_SWITCH_REGISTERS;
     1746  uint32_t val;
     1747
     1748  __asm__ volatile (
     1749    ARM_SWITCH_TO_ARM
     1750    "mrc p15, 0, %[val], c9, c14, 3\n"
     1751    ARM_SWITCH_BACK
     1752    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1753  );
     1754
     1755  return val;
     1756}
     1757
     1758/* PMOVSSET */
     1759ARM_CP15_TEXT_SECTION static inline void
     1760arm_cp15_set_performance_monitors_overflow_flag_status_set(uint32_t val)
     1761{
     1762  ARM_SWITCH_REGISTERS;
     1763
     1764  __asm__ volatile (
     1765    ARM_SWITCH_TO_ARM
     1766    "mcr p15, 0, %[val], c9, c14, 3\n"
     1767    ARM_SWITCH_BACK
     1768    : ARM_SWITCH_OUTPUT
     1769    : [val] "r" (val)
     1770  );
     1771}
     1772
     1773/* PMSELR */
     1774ARM_CP15_TEXT_SECTION static inline uint32_t
     1775arm_cp15_get_performance_monitors_event_counter_selection(void)
     1776{
     1777  ARM_SWITCH_REGISTERS;
     1778  uint32_t val;
     1779
     1780  __asm__ volatile (
     1781    ARM_SWITCH_TO_ARM
     1782    "mrc p15, 0, %[val], c9, c12, 5\n"
     1783    ARM_SWITCH_BACK
     1784    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1785  );
     1786
     1787  return val;
     1788}
     1789
     1790/* PMSELR */
     1791ARM_CP15_TEXT_SECTION static inline void
     1792arm_cp15_set_performance_monitors_event_counter_selection(uint32_t val)
     1793{
     1794  ARM_SWITCH_REGISTERS;
     1795
     1796  __asm__ volatile (
     1797    ARM_SWITCH_TO_ARM
     1798    "mcr p15, 0, %[val], c9, c12, 5\n"
     1799    ARM_SWITCH_BACK
     1800    : ARM_SWITCH_OUTPUT
     1801    : [val] "r" (val)
     1802  );
     1803}
     1804
     1805/* PMSWINC */
     1806ARM_CP15_TEXT_SECTION static inline void
     1807arm_cp15_set_performance_monitors_software_increment(uint32_t val)
     1808{
     1809  ARM_SWITCH_REGISTERS;
     1810
     1811  __asm__ volatile (
     1812    ARM_SWITCH_TO_ARM
     1813    "mcr p15, 0, %[val], c9, c12, 4\n"
     1814    ARM_SWITCH_BACK
     1815    : ARM_SWITCH_OUTPUT
     1816    : [val] "r" (val)
     1817  );
     1818}
     1819
     1820/* PMUSERENR */
     1821ARM_CP15_TEXT_SECTION static inline uint32_t
     1822arm_cp15_get_performance_monitors_user_enable(void)
     1823{
     1824  ARM_SWITCH_REGISTERS;
     1825  uint32_t val;
     1826
     1827  __asm__ volatile (
     1828    ARM_SWITCH_TO_ARM
     1829    "mrc p15, 0, %[val], c9, c14, 0\n"
     1830    ARM_SWITCH_BACK
     1831    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1832  );
     1833
     1834  return val;
     1835}
     1836
     1837/* PMUSERENR */
     1838ARM_CP15_TEXT_SECTION static inline void
     1839arm_cp15_set_performance_monitors_user_enable(uint32_t val)
     1840{
     1841  ARM_SWITCH_REGISTERS;
     1842
     1843  __asm__ volatile (
     1844    ARM_SWITCH_TO_ARM
     1845    "mcr p15, 0, %[val], c9, c14, 0\n"
     1846    ARM_SWITCH_BACK
     1847    : ARM_SWITCH_OUTPUT
     1848    : [val] "r" (val)
     1849  );
     1850}
     1851
     1852/* PMXEVCNTR */
     1853ARM_CP15_TEXT_SECTION static inline uint32_t
     1854arm_cp15_get_performance_monitors_event_count(void)
     1855{
     1856  ARM_SWITCH_REGISTERS;
     1857  uint32_t val;
     1858
     1859  __asm__ volatile (
     1860    ARM_SWITCH_TO_ARM
     1861    "mrc p15, 0, %[val], c9, c13, 2\n"
     1862    ARM_SWITCH_BACK
     1863    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1864  );
     1865
     1866  return val;
     1867}
     1868
     1869/* PMXEVCNTR */
     1870ARM_CP15_TEXT_SECTION static inline void
     1871arm_cp15_set_performance_monitors_event_count(uint32_t val)
     1872{
     1873  ARM_SWITCH_REGISTERS;
     1874
     1875  __asm__ volatile (
     1876    ARM_SWITCH_TO_ARM
     1877    "mcr p15, 0, %[val], c9, c13, 2\n"
     1878    ARM_SWITCH_BACK
     1879    : ARM_SWITCH_OUTPUT
     1880    : [val] "r" (val)
     1881  );
     1882}
     1883
     1884/* PMXEVTYPER */
     1885ARM_CP15_TEXT_SECTION static inline uint32_t
     1886arm_cp15_get_performance_monitors_event_type_select(void)
     1887{
     1888  ARM_SWITCH_REGISTERS;
     1889  uint32_t val;
     1890
     1891  __asm__ volatile (
     1892    ARM_SWITCH_TO_ARM
     1893    "mrc p15, 0, %[val], c9, c13, 1\n"
     1894    ARM_SWITCH_BACK
     1895    : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
     1896  );
     1897
     1898  return val;
     1899}
     1900
     1901/* PMXEVTYPER */
     1902ARM_CP15_TEXT_SECTION static inline void
     1903arm_cp15_set_performance_monitors_event_type_select(uint32_t val)
     1904{
     1905  ARM_SWITCH_REGISTERS;
     1906
     1907  __asm__ volatile (
     1908    ARM_SWITCH_TO_ARM
     1909    "mcr p15, 0, %[val], c9, c13, 1\n"
     1910    ARM_SWITCH_BACK
     1911    : ARM_SWITCH_OUTPUT
     1912    : [val] "r" (val)
     1913  );
     1914}
     1915
    14711916/**
    14721917 * @brief Sets the @a section_flags for the address range [@a begin, @a end).
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