Index: c/src/lib/libbsp/i960/cvme961/ChangeLog
===================================================================
--- c/src/lib/libbsp/i960/cvme961/ChangeLog	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/ChangeLog	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -1,2 +1,9 @@
+2004-03-31	Ralf Corsepius <ralf_corsepius@rtems.org>
+
+	* clock/ckinit.c, include/bsp.h, shmsupp/addrconv.c,
+	shmsupp/getcfg.c, shmsupp/lock.c, shmsupp/mpisr.c,
+	startup/bspstart.c, timer/timer.c: Convert to using c99 fixed size
+	types.
+
 2004-02-19	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 
Index: c/src/lib/libbsp/i960/cvme961/clock/ckinit.c
===================================================================
--- c/src/lib/libbsp/i960/cvme961/clock/ckinit.c	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/clock/ckinit.c	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -25,7 +25,7 @@
 #define CLOCK_VECTOR 5
 
-rtems_unsigned32 Clock_isrs;              /* ISRs until next tick */
+uint32_t         Clock_isrs;              /* ISRs until next tick */
 i960_isr_entry   Old_ticker;
-volatile rtems_unsigned32 Clock_driver_ticks;
+volatile uint32_t         Clock_driver_ticks;
                                           /* ticks since initialization */
 
@@ -94,5 +94,5 @@
 )
 {
-    rtems_unsigned32 isrlevel;
+    uint32_t         isrlevel;
     rtems_libio_ioctl_args_t *args = pargp;
  
Index: c/src/lib/libbsp/i960/cvme961/include/bsp.h
===================================================================
--- c/src/lib/libbsp/i960/cvme961/include/bsp.h	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/include/bsp.h	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -73,6 +73,6 @@
 
 #define rtems_bsp_delay( microseconds ) \
-  { register rtems_unsigned32 _delay=(microseconds); \
-    register rtems_unsigned32 _tmp = 0; /* initialized to avoid warning */ \
+  { register uint32_t         _delay=(microseconds); \
+    register uint32_t         _tmp = 0; /* initialized to avoid warning */ \
     asm volatile( "0: \
                      remo      3,31,%0 ; \
Index: c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c
===================================================================
--- c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -29,8 +29,8 @@
 )
 {
-  rtems_unsigned32 workaddr = (rtems_unsigned32) address;
+  uint32_t         workaddr = (uint32_t) address;
 
   if ( workaddr >= 0xffff0000 )
     workaddr = (workaddr & 0xffff) | 0xb4000000;
-  return ( (rtems_unsigned32 *)workaddr );
+  return ( (uint32_t*)workaddr );
 }
Index: c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c
===================================================================
--- c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -55,5 +55,5 @@
 
 void Shm_Get_configuration(
-  rtems_unsigned32   localnode,
+  uint32_t           localnode,
   shm_config_table **shmcfg
 )
@@ -61,9 +61,9 @@
 #if ( USE_ONBOARD_RAM == 1 )
    if ( Shm_RTEMS_MP_Configuration->node == MASTER )
-     BSP_shm_cfgtbl.base   = (rtems_unsigned32 *)0x00300000;
+     BSP_shm_cfgtbl.base   = (uint32_t*)0x00300000;
    else
-     BSP_shm_cfgtbl.base   = (rtems_unsigned32 *)0x10300000;
+     BSP_shm_cfgtbl.base   = (uint32_t*)0x10300000;
 #else
-   BSP_shm_cfgtbl.base     = (rtems_unsigned32 *)0x20000000;
+   BSP_shm_cfgtbl.base     = (uint32_t*)0x20000000;
 #endif
 
@@ -87,5 +87,5 @@
    BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
    BSP_shm_cfgtbl.Intr.address =
-        (rtems_unsigned32 *) (0xffff0021|((localnode-1) << 12));
+        (uint32_t*) (0xffff0021|((localnode-1) << 12));
                                                           /* use ICMS0 */
    BSP_shm_cfgtbl.Intr.value   = 1;
Index: c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c
===================================================================
--- c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -45,5 +45,5 @@
 )
 {
-  rtems_unsigned32 isr_level, oldlock;
+  uint32_t         isr_level, oldlock;
 
   rtems_interrupt_disable( isr_level );
@@ -67,5 +67,5 @@
 )
 {
-  rtems_unsigned32 isr_level;
+  uint32_t         isr_level;
 
   lq_cb->lock = SHM_UNLOCK_VALUE;
Index: c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c
===================================================================
--- c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -26,13 +26,13 @@
 )
 {
-  rtems_unsigned32 vic_vector;
+  uint32_t         vic_vector;
 
   /* enable_tracing(); */
-  vic_vector = (*(volatile rtems_unsigned8 *)0xb6000007);
+  vic_vector = (*(volatile uint8_t*)0xb6000007);
                                            /* reset intr by reading */
                                            /*   vector at IPL=3 */
   Shm_Interrupt_count += 1;
   rtems_multiprocessing_announce();
-  (*(volatile rtems_unsigned8 *)0xa000005f) = 0; /* clear ICMS0 */
+  (*(volatile uint8_t*)0xa000005f) = 0; /* clear ICMS0 */
   i960_clear_intr( 6 );
 
@@ -53,17 +53,17 @@
 void Shm_setvec()
 {
-  rtems_unsigned32 isrlevel;
+  uint32_t         isrlevel;
 
   rtems_interrupt_disable( isrlevel );
                                         /* set SQSIO4 CTL REG for */
                                         /*   VME slave address */
-    (*(rtems_unsigned8 *)0xc00000b0) =
+    (*(uint8_t*)0xc00000b0) =
       (Shm_RTEMS_MP_Configuration->node - 1) | 0x10;
     set_vector( Shm_isr_cvme961, 6, 1 );
                                         /* set ICMS Bector Base Register */
-    (*(rtems_unsigned8 *)0xa0000053) = 0x60;  /* XINT6 vector is 0x62 */
+    (*(uint8_t*)0xa0000053) = 0x60;  /* XINT6 vector is 0x62 */
                                         /* set  ICMS Intr Control Reg */
-    (*(rtems_unsigned8 *)0xa0000047) = 0xeb;  /* ICMS0 enabled, IPL=0 */
-    (*(rtems_unsigned8 *)0xa000005f) = 0;     /* clear ICMS0 */
+    (*(uint8_t*)0xa0000047) = 0xeb;  /* ICMS0 enabled, IPL=0 */
+    (*(uint8_t*)0xa000005f) = 0;     /* clear ICMS0 */
   rtems_interrupt_enable( isrlevel );
 }
Index: c/src/lib/libbsp/i960/cvme961/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/i960/cvme961/startup/bspstart.c	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/startup/bspstart.c	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -41,5 +41,5 @@
  
 void bsp_postdriver_hook(void);
-void bsp_libc_init( void *, unsigned32, int );
+void bsp_libc_init( void *, uint32_t, int );
 
 /*
@@ -60,7 +60,7 @@
 {
     extern int end;
-    rtems_unsigned32        heap_start;
+    uint32_t                heap_start;
 
-    heap_start = (rtems_unsigned32) &end;
+    heap_start = (uint32_t) &end;
     if (heap_start & (CPU_ALIGNMENT-1))
         heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
@@ -83,5 +83,5 @@
   /* set node number in SQSIO4 CTL REG */
 
-  *((rtems_unsigned32 *)0xc00000b0) =
+  *((uint32_t*)0xc00000b0) =
        (Configuration.User_multiprocessing_table) ?
           Configuration.User_multiprocessing_table->node : 0;
Index: c/src/lib/libbsp/i960/cvme961/timer/timer.c
===================================================================
--- c/src/lib/libbsp/i960/cvme961/timer/timer.c	(revision 5601b2b2001e715d8d192be77c67a335faa95a5a)
+++ c/src/lib/libbsp/i960/cvme961/timer/timer.c	(revision 090760c5f11c62ac7f206140ee94747c912dfb96)
@@ -75,6 +75,6 @@
 int Read_timer()
 {
-  rtems_unsigned8  msb, lsb;
-  rtems_unsigned32 remaining, total;
+  uint8_t          msb, lsb;
+  uint32_t         remaining, total;
 
   Z8x36_WRITE( TIMER, CT1_CMD_STATUS,  0xce );  /* read the counter value */
