Changeset 08013e8 in rtems


Ignore:
Timestamp:
Apr 7, 2010, 6:44:41 AM (10 years ago)
Author:
Thomas Doerfler <Thomas.Doerfler@…>
Branches:
4.10, 4.11, master
Children:
29313369
Parents:
68001c02
Message:

fixed to support GW_LCFM

Location:
c/src/lib/libbsp/powerpc/mpc55xxevb
Files:
3 added
1 deleted
11 edited
1 moved

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mpc55xxevb/ChangeLog

    r68001c02 r08013e8  
     12010-04-07      Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
     2        * Makefile.am, configure.ac, preinstall.am, clock/clock-config.c,
     3        make/custom/gwlcfm.cfg, make/custom/mpc5566evb.cfg,
     4        startup/bspgetworkarea.c, startup/bspstart.c, startup/linkcmds,
     5        startup/start.S: fix GW_LCFM support
     6        * make/custom/mpc55xx.cfg, startup/linkcmds.memory: removed to get
     7        better structure
     8        * make/custom/mpc55xx.inc, startup/linkcmds.base,
     9        startup/linkcmds.gwlcfm, startup/linkcmds.mpc5566evb: added to
     10        have better structure
     11
    1122010-03-27      Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
    213
  • c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am

    r68001c02 r08013e8  
    2424
    2525# Link commands
    26 dist_project_lib_DATA += startup/linkcmds startup/linkcmds.memory
     26dist_project_lib_DATA += startup/linkcmds.gwlcfm  startup/linkcmds.mpc5566evb \
     27        startup/linkcmds.base   
    2728
    2829noinst_LIBRARIES += libbsp.a
  • c/src/lib/libbsp/powerpc/mpc55xxevb/clock/clock-config.c

    r68001c02 r08013e8  
    104104
    105105  /* Set control register */
    106   ccr.B.MODE = MPC55XX_EMIOS_MODE_MC_UP_INT_CLK;
     106  ccr.B.MODE = MPC55XX_EMIOS_MODE_MCB_UP_INT_CLK;
    107107  ccr.B.UCPREN = 1;
    108108  ccr.B.FEN = 1;
  • c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac

    r68001c02 r08013e8  
    2424AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
    2525
     26RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[gwlcfm],[0])
     27RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[mpc5566evb],[1])
     28RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1])
     29RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
     30[If defined, the data cache will be enabled after address translation
     31 is turned on.])
     32
     33RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[gwlcfm],[0])
     34RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[mpc5566evb],[1])
     35RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1])
     36RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
     37[If defined, the instruction cache will be enabled after address translation
     38 is turned on.])
     39
    2640RTEMS_BSPOPTS_SET([UARTS_USE_TERMIOS],[*],[0])
    2741RTEMS_BSPOPTS_HELP([UARTS_USE_TERMIOS],
     
    2943 Termios support is independent of the choice of UART I/O mode.])
    3044
    31 RTEMS_BSPOPTS_SET([CONSOLE_MINOR],[GWLCFM],[MPC55XX_ESCI_A_MINOR])
     45RTEMS_BSPOPTS_SET([CONSOLE_MINOR],[gwlcfm],[MPC55XX_ESCI_A_MINOR])
    3246RTEMS_BSPOPTS_SET([CONSOLE_MINOR],[*]     ,[MPC55XX_ESCI_A_MINOR])
    3347RTEMS_BSPOPTS_HELP([CONSOLE_MINOR],
     
    3549 device will be registered as /dev/console.])
    3650
    37 RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[GWLCFM],[1])
     51RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[gwlcfm],[1])
    3852RTEMS_BSPOPTS_SET([UARTS_IO_MODE],[*]     ,[0])
    3953RTEMS_BSPOPTS_HELP([UARTS_IO_MODE],
    4054[Define to 1 if you want interrupt-driven I/O for the SCI ports.])
    4155
    42 RTEMS_BSPOPTS_SET([PRINTK_MINOR],[GWLCFM],[MPC55XX_ESCI_A_MINOR])
     56RTEMS_BSPOPTS_SET([PRINTK_MINOR],[gwlcfm],[MPC55XX_ESCI_A_MINOR])
    4357RTEMS_BSPOPTS_SET([PRINTK_MINOR],[*]     ,[MPC55XX_ESCI_B_MINOR])
    4458RTEMS_BSPOPTS_HELP([PRINTK_MINOR],
     
    4862 for the SCI ports.])
    4963
    50 RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_REF_CLOCK],[GWLCFM],[40000000])
     64RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_REF_CLOCK],[gwlcfm],[40000000])
    5165RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_REF_CLOCK],[*]     ,[8000000])
    5266RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_REF_CLOCK],
     
    5468 for clock generation])
    5569
    56 RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_CLK_OUT],[GWLCFM],[66000000])
     70RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_CLK_OUT],[gwlcfm],[66000000])
    5771RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_CLK_OUT],[*]     ,[128000000])
    58 RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_REF_CLOCK],
     72RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_CLK_OUT],
    5973[Must be defined to be the PLL output clock (in Hz) for clock generation])
    6074
    61 RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_PREDIV],[GWLCFM],[10])
     75RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_PREDIV],[gwlcfm],[10])
    6276RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_PREDIV],[*]     ,[1])
    6377RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_PREDIV],
    6478[Must be defined to be the PLL predivider factor for clock generation])
    6579
    66 RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_MFD],[GWLCFM],[99])
     80RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_MFD],[gwlcfm],[99])
    6781RTEMS_BSPOPTS_SET([MPC55XX_FMPLL_MFD],[*]     ,[12])
    6882RTEMS_BSPOPTS_HELP([MPC55XX_FMPLL_MFD],
    6983[Must be defined to be the PLL multiplication factor for clock generation])
    7084
     85RTEMS_BSPOPTS_SET([MPC55XX_EMIOS_PRESCALER],[gwlcfm],[66])
     86RTEMS_BSPOPTS_SET([MPC55XX_EMIOS_PRESCALER],[*]     ,[0])
     87RTEMS_BSPOPTS_HELP([MPC55XX_EMIOS_PRESCALER],
     88[Must be defined to set the EMIOS prescaler])
     89
     90RTEMS_BSPOPTS_SET([MPC55XX_CHIP_DERIVATE],[mpc5566evb],[5566])
     91RTEMS_BSPOPTS_SET([MPC55XX_CHIP_DERIVATE],[gwlcfm]    ,[5516])
    7192RTEMS_BSPOPTS_SET([MPC55XX_CHIP_DERIVATE],[*]         ,[5554])
    72 RTEMS_BSPOPTS_SET([MPC55XX_CHIP_DERIVATE],[MPC5566EVB],[5566])
    73 RTEMS_BSPOPTS_SET([MPC55XX_CHIP_DERIVATE],[GWLCFM]    ,[5516])
    7493RTEMS_BSPOPTS_HELP([MPC55XX_CHIP_DERIVATE],
    7594[specifies the chip derivate in use (e.g. 5554 for MPC5554)])
     95
     96RTEMS_BSPOPTS_SET([BOARD_GWLCFM],[gwlcfm],[1])
     97RTEMS_BSPOPTS_HELP([BOARD_GWLCFM],
     98[If defined, use custom settings of for the GW_LCFM board])
    7699
    77100AC_CONFIG_FILES([Makefile
  • c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/gwlcfm.cfg

    r68001c02 r08013e8  
    88#
    99
    10 include $(RTEMS_ROOT)/make/custom/mpc55xx.cfg
     10RTEMS_LINKCMDS=linkcmds.gwlcfm
     11
     12include $(RTEMS_ROOT)/make/custom/mpc55xx.inc
  • c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc5566evb.cfg

    r68001c02 r08013e8  
    88#
    99
    10 include $(RTEMS_ROOT)/make/custom/mpc55xx.cfg
     10RTEMS_LINKCMDS=linkcmds.mpc5566evb
     11
     12include $(RTEMS_ROOT)/make/custom/mpc55xx.inc
  • c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/mpc55xx.inc

    r68001c02 r08013e8  
    1919
    2020CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions
     21
     22LDFLAGS += -qnolinkcmds -T $(RTEMS_LINKCMDS)
  • c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am

    r68001c02 r08013e8  
    5050TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
    5151
    52 $(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
    53         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
    54 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
     52$(PROJECT_LIB)/linkcmds.gwlcfm: startup/linkcmds.gwlcfm $(PROJECT_LIB)/$(dirstamp)
     53        $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.gwlcfm
     54PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.gwlcfm
    5555
    56 $(PROJECT_LIB)/linkcmds.memory: startup/linkcmds.memory $(PROJECT_LIB)/$(dirstamp)
    57         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.memory
    58 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.memory
     56$(PROJECT_LIB)/linkcmds.mpc5566evb: startup/linkcmds.mpc5566evb $(PROJECT_LIB)/$(dirstamp)
     57        $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5566evb
     58PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5566evb
     59
     60$(PROJECT_LIB)/linkcmds.base: startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp)
     61        $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base
     62PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base
    5963
    6064$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspgetworkarea.c

    r68001c02 r08013e8  
    2626
    2727/* Symbols defined in linker command file */
    28 LINKER_SYMBOL(bsp_ram_start);
    29 LINKER_SYMBOL(bsp_ram_end);
    30 LINKER_SYMBOL(bsp_external_ram_start);
    31 LINKER_SYMBOL(bsp_external_ram_size);
    32 LINKER_SYMBOL(bsp_section_bss_end);
     28LINKER_SYMBOL(bsp_workspace_start);
     29LINKER_SYMBOL(bsp_workspace_end);
     30LINKER_SYMBOL(bsp_external_ram_end);
    3331
    3432void bsp_get_work_area(
     
    3937)
    4038{
    41   *work_area_start = bsp_section_bss_end;
    42   *work_area_size = bsp_ram_end - 2 *
    43         MPC55XX_INTERRUPT_STACK_SIZE - bsp_section_bss_end;
    44   *heap_start = bsp_external_ram_start;
    45   *heap_size = (uintptr_t) bsp_external_ram_size;
     39  size_t free_ram_size;
     40  *work_area_start = bsp_workspace_start;
     41
     42  free_ram_size = (uint8_t *)bsp_external_ram_end - (uint8_t *)*work_area_start;
     43  *work_area_size = (free_ram_size / 2);
     44  *heap_start = (void *)((uint8_t *)*work_area_start + *work_area_size);
     45  *heap_size = (free_ram_size / 2);
    4646}
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c

    r68001c02 r08013e8  
    160160#endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
    161161
    162 #if defined(GWLCFM)
     162#if defined(BOARD_GWLCFM)
    163163static const mpc55xx_siu_pcr_entry_t siu_pcr_list[] = {
    164164  {  0,16,{.B.PA = 1,           .B.WPE = 0}}, /* PA[ 0..15] analog input */
     
    196196  { 62, 4,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PD[14..15] USB_FLGA/B    in */
    197197
    198   { 64, 3,{.B.PA = 3,.B.IBE = 1,.B.WPE = 0}}, /* PE[ 0.. 2] MLBCLK/SI/DI  in */
    199   { 67, 2,{.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PE[ 3.. 4] MLBSO/DO      out*/
    200   { 69, 1,{.B.PA = 3,.B.IBE = 1,.B.WPE = 0}}, /* PE[ 5.. 5] MLBSLOT       in */
    201   { 70, 1,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PE[ 6.. 6] CLKOUT        out*/
    202   { 80, 1,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PF[ 0.. 0] RD_WR         out*/
    203   { 81, 1,{.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PF[ 1.. 1] (nc)          in */
    204   { 82,14,{.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PF[ 2..14] ADDR/CS/...   out*/
    205   { 96,16,{.B.PA = 1,.B.IBE = 1,.B.OBE = 1,.B.WPE = 0}},
    206   /* PG[ 0..15] AD16..31   in/out*/
     198  { 64, 3,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 0.. 2] MLBCLK/SI/DI  in */
     199  { 67, 2,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 3.. 4] MLBSO/DO      out*/
     200  { 69, 1,{.B.PA = 3,.B.SRC = 1,.B.WPE = 0}}, /* PE[ 5.. 5] MLBSLOT       in */
     201  { 70, 1,{.B.PA = 1,.B.SRC = 3,.B.WPE = 0}}, /* PE[ 6.. 6] CLKOUT        out*/
     202
     203  { 80, 1,{.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PF[ 0.. 0] RD_WR         out*/
     204  { 81, 1,{.B.PA = 0,.B.SRC = 0,.B.WPE = 0}}, /* PF[ 1.. 1] (nc)          in */
     205  { 82, 8,{.B.PA = 2,.B.SRC = 1,.B.WPE = 0}}, /* PF[ 2..11] ADDR[8..15]   out*/
     206  { 90, 2,{.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PF[ 2..11] CS[0..1]      out*/
     207  { 92, 1,{.B.PA = 3,.B.SRC = 3,.B.WPE = 0}}, /* PF[    12] ALE           out*/
     208  { 93, 3,{.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PF[13..15] OE/WE         out*/
     209
     210  { 96,16,{.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PG[ 0..15] AD16..31   in/out*/
    207211
    208212  {112, 3,{.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 0.. 2] LED_EXT1-3.   out*/
     
    229233  {0,0}
    230234};
    231 #endif /* GWLCFM */
     235#endif /* BOARD_GWLCFM */
    232236
    233237static void mpc55xx_ebi_init(void)
     
    241245        mpc55xx_siu_pcr_init(&SIU,
    242246                             siu_pcr_list);
    243         /* External SRAM (2 wait states, 512kB, 4 word burst) */
     247
     248#if defined(BOARD_GWLCFM)
     249        /*
     250         * init EBI for Muxed AD bus
     251         */
     252        EBI.MCR.B.DBM = 1;
     253        EBI.MCR.B.ADMUX = 1; /* use multiplexed bus */
     254        EBI.MCR.B.D16_32 = 1; /* use lower AD bus    */
     255
     256        SIU.ECCR.B.EBDF = 3;  /* use CLK/4 as bus clock */
     257
     258        /* External SRAM (16 bit, 2 wait states, 512kB, no burst) */
    244259
    245260        cs.BR.B.BA = 0;
    246261        cs.BR.B.PS = 1;
    247         cs.BR.B.BL = 1;
    248         cs.BR.B.WEBS = 0;
     262        cs.BR.B.AD_MUX = 1;
     263        cs.BR.B.WEBS = 1;
    249264        cs.BR.B.TBDIP = 0;
    250         cs.BR.B.BI = 1; /* TODO: Enable burst */
     265        cs.BR.B.BI = 1;
    251266        cs.BR.B.V = 1;
    252267
     
    282297        cs.BR.B.PS = 1;
    283298        cs.BR.B.BL = 0;
     299        cs.BR.B.AD_MUX = 1;
    284300        cs.BR.B.WEBS = 0;
    285301        cs.BR.B.TBDIP = 0;
     
    292308
    293309        EBI.CS [3] = cs;
     310#else /* defined(BOARD_GWLCFM) */
     311       
     312        /* External SRAM (2 wait states, 512kB, 4 word burst) */
     313
     314        cs.BR.B.BA = 0;
     315        cs.BR.B.PS = 1;
     316        cs.BR.B.BL = 1;
     317        cs.BR.B.WEBS = 0;
     318        cs.BR.B.TBDIP = 0;
     319        cs.BR.B.BI = 1; /* TODO: Enable burst */
     320        cs.BR.B.V = 1;
     321
     322        cs.OR.B.AM = 0x1fff0;
     323        cs.OR.B.SCY = 0;
     324        cs.OR.B.BSCY = 0;
     325
     326        EBI.CS [0] = cs;
     327
     328        /* External Ethernet Controller (3 wait states, 64kB) */
     329
     330        mmu.MAS0.B.ESEL = 5;
     331        mmu.MAS1.B.VALID = 1;
     332        mmu.MAS1.B.IPROT = 1;
     333        mmu.MAS1.B.TSIZ = 1;
     334        mmu.MAS2.B.EPN = 0x3fff8;
     335        mmu.MAS2.B.I = 1;
     336        mmu.MAS2.B.G = 1;
     337        mmu.MAS3.B.RPN = 0x3fff8;
     338        mmu.MAS3.B.UW = 1;
     339        mmu.MAS3.B.SW = 1;
     340        mmu.MAS3.B.UR = 1;
     341        mmu.MAS3.B.SR = 1;
     342
     343        PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS0, mmu.MAS0.R);
     344        PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS1, mmu.MAS1.R);
     345        PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS2, mmu.MAS2.R);
     346        PPC_SET_SPECIAL_PURPOSE_REGISTER( FREESCALE_EIS_MAS3, mmu.MAS3.R);
     347
     348        asm volatile ("tlbwe");
     349
     350        cs.BR.B.BA = 0x7fff;
     351        cs.BR.B.PS = 1;
     352        cs.BR.B.BL = 0;
     353        cs.BR.B.WEBS = 0;
     354        cs.BR.B.TBDIP = 0;
     355        cs.BR.B.BI = 1;
     356        cs.BR.B.V = 1;
     357
     358        cs.OR.B.AM = 0x1ffff;
     359        cs.OR.B.SCY = 1;
     360        cs.OR.B.BSCY = 0;
     361
     362        EBI.CS [3] = cs;
     363#endif /* defined(BOARD_GWLCFM) */
    294364}
    295365
     
    297367 * @brief Start BSP.
    298368 */
     369LINKER_SYMBOL(bsp_section_bss_start);
     370LINKER_SYMBOL(bsp_section_bss_end);
     371LINKER_SYMBOL(bsp_section_sbss_start);
     372LINKER_SYMBOL(bsp_section_sbss_end);
     373LINKER_SYMBOL(bsp_section_vector_start);
     374
    299375void bsp_start(void)
    300376{
     
    305381        uintptr_t interrupt_stack_start = (uintptr_t)bsp_ram_end - 2 * MPC55XX_INTERRUPT_STACK_SIZE;
    306382        uint32_t interrupt_stack_size = MPC55XX_INTERRUPT_STACK_SIZE;
     383
     384
     385        /* Initialize External Bus Interface */
     386        mpc55xx_ebi_init();
     387
     388        /*
     389         * make sure BSS/SBSS is cleared
     390         */
     391        memset(bsp_section_bss_start,0,
     392               bsp_section_bss_end-bsp_section_bss_start);
     393        memset(bsp_section_sbss_start,0,
     394               bsp_section_sbss_end-bsp_section_sbss_start);
     395
     396        ppc_exc_vector_base = bsp_section_vector_start;
    307397
    308398        RTEMS_DEBUG_PRINT( "BSP start ...\n");
     
    327417        bsp_clicks_per_usec = bsp_clock_speed / 1000000;
    328418
    329         /* Initialize External Bus Interface */
    330         mpc55xx_ebi_init();
     419        /*
     420         * determine clock speed
     421         */
     422        bsp_clock_speed = mpc55xx_get_system_clock();
    331423
    332424        /* Initialize exceptions */
     
    355447        mpc55xx_emios_initialize( 1);
    356448
    357         return;
    358 
    359         /* TODO */
     449        mpc55xx_emios_set_global_prescaler(MPC55XX_EMIOS_PRESCALER);
     450
    360451        /*
    361452        * Enable instruction and data caches. Do not force writethrough mode.
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds

    r68001c02 r08013e8  
    1 /**
    2  * @file
    3  *
    4  * Derived from internal linker script of GNU ld (GNU Binutils) 2.18 for elf32ppc emulation.
    5  */
    6 
    7 OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc")
    8 OUTPUT_ARCH(powerpc)
    9 ENTRY(start)
    10 
    11 INCLUDE linkcmds.memory
    12 
    13 SECTIONS
    14 {
    15         .text : {
    16                 /*
    17                  * BSP: Start of text section
    18                  */
    19                 bsp_section_text_start = .;
    20 
    21                 /*
    22                  * BSP: System startup entry
    23                  */
    24                 KEEP (*(.entry))
    25 
    26                 /*
    27                  * BSP: Moved into .text from .init
    28                  */
    29                 KEEP (*(.init))
    30 
    31                 *(.text .stub .text.* .gnu.linkonce.t.*)
    32                 KEEP (*(.text.*personality*))
    33                 /* .gnu.warning sections are handled specially by elf32.em.  */
    34                 *(.gnu.warning)
    35                 *(.glink)
    36                
    37                 /*
    38                  * BSP: Special FreeBSD sysctl sections
    39                  */
    40                 . = ALIGN (16);
    41                 __start_set_sysctl_set = .;
    42                 *(set_sysctl_*);
    43                 __stop_set_sysctl_set = ABSOLUTE(.);
    44                 *(set_domain_*);
    45                 *(set_pseudo_*);
    46 
    47                 /*
    48                  * BSP: Moved into .text from .*
    49                  */
    50                 *(.rodata .rodata.* .gnu.linkonce.r.*)
    51                 *(.rodata1)
    52                 *(.interp)
    53                 *(.note.gnu.build-id)
    54                 *(.hash)
    55                 *(.gnu.hash)
    56                 *(.dynsym)
    57                 *(.dynstr)
    58                 *(.gnu.version)
    59                 *(.gnu.version_d)
    60                 *(.gnu.version_r)
    61                 *(.eh_frame_hdr)
    62 
    63                 /*
    64                  * BSP: Magic PPC stuff
    65                  */
    66                 *(.PPC.*)
    67 
    68                 /*
    69                  * BSP: Required by cpukit/score/src/threadhandler.c
    70                  */
    71                 PROVIDE (_fini = .);
    72 
    73                 /*
    74                  * BSP: Moved into .text from .fini
    75                  */
    76                 KEEP (*(.fini))
    77 
    78                 . = ALIGN (bsp_section_align);
    79 
    80                 PROVIDE (__etext = .);
    81                 PROVIDE (_etext = .);
    82                 PROVIDE (etext = .);
    83         } > ROM =0
    84 
    85         .sdata2 : {
    86                 PROVIDE (_SDA2_BASE_ = 32768);
    87 
    88                 *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
    89 
    90                 . = ALIGN (bsp_section_align);
    91         } > ROM =0
    92 
    93         .sbss2 : {
    94                 *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
    95 
    96                 . = ALIGN (bsp_section_align);
    97 
    98                 /*
    99                  * BSP: End of text section
    100                  */
    101                 bsp_section_text_end = .;
    102         } > ROM =0
    103 
    104         .data : AT (bsp_section_text_end) {
    105                 /*
    106                  * BSP: Start of data section
    107                  */
    108                 bsp_section_data_start = .;
    109 
    110                 /*
    111                  * BSP: Reserve space for exception handler
    112                  */
    113                 . = . + 0x180;
    114 
    115                 /*
    116                  * BSP: Moved into .data from .ctors
    117                  */
    118                 /* gcc uses crtbegin.o to find the start of
    119                    the constructors, so we make sure it is
    120                    first.  Because this is a wildcard, it
    121                    doesn't matter if the user does not
    122                    actually link against crtbegin.o; the
    123                    linker won't look for a file to match a
    124                    wildcard.  The wildcard also means that it
    125                    doesn't matter which directory crtbegin.o
    126                    is in.  */
    127                 KEEP (*crtbegin.o(.ctors))
    128                 KEEP (*crtbegin?.o(.ctors))
    129                 /* We don't want to include the .ctor section from
    130                    the crtend.o file until after the sorted ctors.
    131                    The .ctor section from the crtend file contains the
    132                    end of ctors marker and it must be last */
    133                 KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
    134                 KEEP (*(SORT(.ctors.*)))
    135                 KEEP (*(.ctors))
    136 
    137                 /*
    138                  * BSP: Moved into .data from .dtors
    139                  */
    140                 KEEP (*crtbegin.o(.dtors))
    141                 KEEP (*crtbegin?.o(.dtors))
    142                 KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
    143                 KEEP (*(SORT(.dtors.*)))
    144                 KEEP (*(.dtors))
    145 
    146                 /*
    147                  * BSP: Moved into .data from .*
    148                  */
    149                 *(.tdata .tdata.* .gnu.linkonce.td.*)
    150                 *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
    151                 *(.data1)
    152                 KEEP (*(.eh_frame))
    153                 *(.gcc_except_table .gcc_except_table.*)
    154                 KEEP (*(.jcr))
    155                 *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*)
    156                 *(.fixup)
    157                 *(.got1)
    158                 *(.got2)
    159                 *(.dynamic)
    160                 *(.got)
    161                 *(.plt)
    162                 PROVIDE_HIDDEN (__preinit_array_start = .);
    163                 KEEP (*(.preinit_array))
    164                 PROVIDE_HIDDEN (__preinit_array_end = .);
    165                 PROVIDE_HIDDEN (__init_array_start = .);
    166                 KEEP (*(SORT(.init_array.*)))
    167                 KEEP (*(.init_array))
    168                 PROVIDE_HIDDEN (__init_array_end = .);
    169                 PROVIDE_HIDDEN (__fini_array_start = .);
    170                 KEEP (*(.fini_array))
    171                 KEEP (*(SORT(.fini_array.*)))
    172                 PROVIDE_HIDDEN (__fini_array_end = .);
    173 
    174                 *(.data .data.* .gnu.linkonce.d.*)
    175                 KEEP (*(.gnu.linkonce.d.*personality*))
    176                 SORT(CONSTRUCTORS)
    177 
    178                 . = ALIGN (bsp_section_align);
    179         } > RAM
    180 
    181         .sdata : {
    182                 PROVIDE (_SDA_BASE_ = 32768);
    183                 *(.sdata .sdata.* .gnu.linkonce.s.*)
    184 
    185                 . = ALIGN (bsp_section_align);
    186 
    187                 _edata = .;
    188                 PROVIDE (edata = .);
    189 
    190                 /*
    191                  * BSP: End of data section
    192                  */
    193                 bsp_section_data_end = .;
    194         } > RAM
    195 
    196         .sbss : {
    197                 /*
    198                  * BSP: Start of bss section
    199                  */
    200                 bsp_section_bss_start = .;
    201 
    202                 __bss_start = .;
    203 
    204                 PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
    205                 *(.scommon)
    206                 *(.dynsbss)
    207                 *(.sbss .sbss.* .gnu.linkonce.sb.*)
    208                 PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
    209 
    210                 . = ALIGN (bsp_section_align);
    211         } > RAM
    212 
    213         .bss : {
    214                 *(COMMON)
    215                 *(.dynbss)
    216                 *(.bss .bss.* .gnu.linkonce.b.*)
    217 
    218                 . = ALIGN (bsp_section_align);
    219 
    220                 __end = .;
    221                 _end = .;
    222                 PROVIDE (end = .);
    223 
    224                 /*
    225                  * BSP: End of bss section
    226                  */
    227                 bsp_section_bss_end = .;
    228         } > RAM
    229        
    230         /* Stabs debugging sections.  */
    231         .stab          0 : { *(.stab) }
    232         .stabstr       0 : { *(.stabstr) }
    233         .stab.excl     0 : { *(.stab.excl) }
    234         .stab.exclstr  0 : { *(.stab.exclstr) }
    235         .stab.index    0 : { *(.stab.index) }
    236         .stab.indexstr 0 : { *(.stab.indexstr) }
    237         .comment       0 : { *(.comment) }
    238         /* DWARF debug sections.
    239            Symbols in the DWARF debugging sections are relative to the beginning
    240            of the section so we begin them at 0.  */
    241         /* DWARF 1 */
    242         .debug          0 : { *(.debug) }
    243         .line           0 : { *(.line) }
    244         /* GNU DWARF 1 extensions */
    245         .debug_srcinfo  0 : { *(.debug_srcinfo) }
    246         .debug_sfnames  0 : { *(.debug_sfnames) }
    247         /* DWARF 1.1 and DWARF 2 */
    248         .debug_aranges  0 : { *(.debug_aranges) }
    249         .debug_pubnames 0 : { *(.debug_pubnames) }
    250         /* DWARF 2 */
    251         .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
    252         .debug_abbrev   0 : { *(.debug_abbrev) }
    253         .debug_line     0 : { *(.debug_line) }
    254         .debug_frame    0 : { *(.debug_frame) }
    255         .debug_str      0 : { *(.debug_str) }
    256         .debug_loc      0 : { *(.debug_loc) }
    257         .debug_macinfo  0 : { *(.debug_macinfo) }
    258         /* SGI/MIPS DWARF 2 extensions */
    259         .debug_weaknames 0 : { *(.debug_weaknames) }
    260         .debug_funcnames 0 : { *(.debug_funcnames) }
    261         .debug_typenames 0 : { *(.debug_typenames) }
    262         .debug_varnames  0 : { *(.debug_varnames) }
    263         /* DWARF 3 */
    264         .debug_pubtypes 0 : { *(.debug_pubtypes) }
    265         .debug_ranges   0 : { *(.debug_ranges) }
    266         .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
    267 
    268         /DISCARD/ : {
    269                 *(.note.GNU-stack) *(.gnu_debuglink)
    270         }
    271 
    272         /*
    273          * BSP: Catch all unknown sections
    274          */
    275         .nirvana : {
    276                 *(*)
    277         } > NIRVANA
    278 }
     1include linkcmds.mpc55xxevb
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S

    r68001c02 r08013e8  
    2727#include <libcpu/powerpc-utility.h>
    2828#include <mpc55xx/reg-defs.h>
    29 
     29#include <bspopts.h>
     30       
    3031.section ".entry", "ax"
    3132PUBLIC_VAR (start)
     
    8384        bl SYM (mpc55xx_flash_config)
    8485
     86#if DATA_CACHE_ENABLE || INSTRUCTION_CACHE_ENABLE
    8587        /* FIXME: Config cache */
    8688        bl config_cache
     89#endif /* DATA_CACHE_ENABLE || INSTRUCTION_CACHE_ENABLE */
    8790
    8891/*
     
    128131
    129132        /* Assert: Proper alignment of destination start */
    130         andi. r6, r3, 0x37
     133        andi. r6, r3, 0x3f
    131134        bne twiddle
    132135
    133136        /* Assert: Proper alignment of destination end */
    134         andi. r6, r4, 0x37
     137        andi. r6, r4, 0x3f
    135138        bne twiddle
    136139
     
    182185 * Prepare high level initialization
    183186 */
    184         LA r3, bsp_ram_start
    185         LA r4, ppc_exc_vector_base
    186         stw r3, 0(r4)
    187 
    188         /* Set global BSP clock speed variable */
    189         bl SYM (mpc55xx_get_system_clock)
    190         LA r4, bsp_clock_speed
    191         stw r3, 0(r4)
    192187
    193188        /* Create NULL */
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