Changeset 069560a in rtems
- Timestamp:
- 07/16/15 12:14:32 (9 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 7e14385
- Parents:
- 602e395
- git-author:
- Premysl Houdek <kom541000@…> (07/16/15 12:14:32)
- git-committer:
- Joel Sherrill <joel.sherrill@…> (07/16/15 18:15:52)
- Location:
- c/src/lib/libbsp/arm/tms570
- Files:
-
- 11 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/arm/tms570/clock/clock.c
r602e395 r069560a 37 37 static uint32_t tms570_rti_get_timecount(struct timecounter *tc) 38 38 { 39 return TMS570_RTI. RTIFRC0;39 return TMS570_RTI.CNT[0].FRCx; 40 40 } 41 41 … … 84 84 85 85 /* Hardware specific initialize */ 86 TMS570_RTI. RTIGCTRL = 0;87 TMS570_RTI. RTICPUC0= tc_prescaler - 1;88 TMS570_RTI. RTITBCTRL = 2;89 TMS570_RTI. RTICAPCTRL = 0;90 TMS570_RTI. RTICOMPCTRL = 0;86 TMS570_RTI.GCTRL = 0; 87 TMS570_RTI.CNT[0].CPUCx = tc_prescaler - 1; 88 TMS570_RTI.TBCTRL = 2; 89 TMS570_RTI.CAPCTRL = 0; 90 TMS570_RTI.COMPCTRL = 0; 91 91 /* set counter to zero */ 92 TMS570_RTI. RTIUC0= 0;93 TMS570_RTI. RTIFRC0= 0;92 TMS570_RTI.CNT[0].UCx = 0; 93 TMS570_RTI.CNT[0].FRCx = 0; 94 94 /* clear interrupts*/ 95 TMS570_RTI. RTICLEARINTENA = 0x00070f0f;96 TMS570_RTI. RTIINTFLAG = 0x0007000f;95 TMS570_RTI.CLEARINTENA = 0x00070f0f; 96 TMS570_RTI.INTFLAG = 0x0007000f; 97 97 /* set timer */ 98 TMS570_RTI. RTICOMP0 = TMS570_RTI.RTIFRC0+ tc_increments_per_tick;99 TMS570_RTI. RTICOMP0CLR = TMS570_RTI.RTICOMP0+ tc_increments_per_tick / 2;100 TMS570_RTI. RTIUDCP0= tc_increments_per_tick;98 TMS570_RTI.CMP[0].COMPx = TMS570_RTI.CNT[0].FRCx + tc_increments_per_tick; 99 TMS570_RTI.COMP0CLR = TMS570_RTI.CMP[0].COMPx + tc_increments_per_tick / 2; 100 TMS570_RTI.CMP[0].UDCPx = tc_increments_per_tick; 101 101 /* enable interupt */ 102 TMS570_RTI. RTISETINTENA = 0x1;102 TMS570_RTI.SETINTENA = 0x1; 103 103 /* enable timer */ 104 TMS570_RTI. RTIGCTRL = 1;104 TMS570_RTI.GCTRL = 1; 105 105 /* set timecounter */ 106 106 tms570_rti_tc.tc_get_timecount = tms570_rti_get_timecount; … … 118 118 static void tms570_clock_driver_support_at_tick( void ) 119 119 { 120 TMS570_RTI. RTIINTFLAG = 0x00000001;120 TMS570_RTI.INTFLAG = 0x00000001; 121 121 } 122 122 … … 157 157 { 158 158 /* turn off the timer interrupts */ 159 TMS570_RTI. RTICLEARINTENA = 0x20000;159 TMS570_RTI.CLEARINTENA = 0x20000; 160 160 } 161 161 -
c/src/lib/libbsp/arm/tms570/console/printk-support.c
r602e395 r069560a 42 42 43 43 rtems_interrupt_disable(level); 44 while ( ( driver_context_table[0].regs-> SCIFLR & 0x100 ) == 0) {44 while ( ( driver_context_table[0].regs->FLR & 0x100 ) == 0) { 45 45 rtems_interrupt_flash(level); 46 46 } 47 driver_context_table[0].regs-> SCITD = ch;47 driver_context_table[0].regs->TD = ch; 48 48 rtems_interrupt_enable(level); 49 49 } … … 75 75 static int tms570_uart_input( void ) 76 76 { 77 if ( driver_context_table[0].regs-> SCIFLR & (1<<9) ) {78 return driver_context_table[0].regs-> SCIRD;77 if ( driver_context_table[0].regs->FLR & (1<<9) ) { 78 return driver_context_table[0].regs->RD; 79 79 } else { 80 80 return -1; -
c/src/lib/libbsp/arm/tms570/console/tms570-sci.c
r602e395 r069560a 45 45 .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("TMS570 SCI1"), 46 46 .device_name = "/dev/console", 47 .regs = &TMS570_SCI, 47 /* TMS570 UART peripheral use subset of LIN registers which are equivalent 48 * to SCI ones 49 */ 50 .regs = (volatile tms570_sci_t *) &TMS570_LIN, 48 51 .irq = TMS570_IRQ_SCI_LEVEL_0, 49 52 }, … … 51 54 .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("TMS570 SCI2"), 52 55 .device_name = "/dev/ttyS1", 53 .regs = &TMS570_SCI 2,56 .regs = &TMS570_SCI, 54 57 .irq = TMS570_IRQ_SCI2_LEVEL_0, 55 58 } … … 135 138 return 0; 136 139 } 137 if ( ctx->regs-> SCIRD != 0 ) {138 buf[0] = ctx->regs-> SCIRD;140 if ( ctx->regs->RD != 0 ) { 141 buf[0] = ctx->regs->RD; 139 142 return 1; 140 143 } … … 153 156 static void tms570_sci_enable_interrupts(tms570_sci_context * ctx) 154 157 { 155 ctx->regs->S CISETINT = (1<<9);158 ctx->regs->SETINT = (1<<9); 156 159 } 157 160 … … 167 170 static void tms570_sci_disable_interrupts(tms570_sci_context * ctx) 168 171 { 169 ctx->regs-> SCICLEARINT = (1<<9);172 ctx->regs->CLEARINT = (1<<9); 170 173 } 171 174 … … 214 217 rtems_termios_device_lock_acquire(base, &lock_context); 215 218 216 ctx->regs-> SCIGCR1 &= ~( (1<<7) | (1<<25) | (1<<24) );217 218 ctx->regs-> SCIGCR1 &= ~(1<<4); /*one stop bit*/219 ctx->regs-> SCIFORMAT = 0x7;219 ctx->regs->GCR1 &= ~( (1<<7) | (1<<25) | (1<<24) ); 220 221 ctx->regs->GCR1 &= ~(1<<4); /*one stop bit*/ 222 ctx->regs->FORMAT = 0x7; 220 223 221 224 switch ( t->c_cflag & ( PARENB|PARODD ) ) { 222 225 case ( PARENB|PARODD ): 223 226 /* Odd parity */ 224 ctx->regs-> SCIGCR1 &= ~(1<<3);225 ctx->regs-> SCIGCR1 |= (1<<2);227 ctx->regs->GCR1 &= ~(1<<3); 228 ctx->regs->GCR1 |= (1<<2); 226 229 break; 227 230 228 231 case PARENB: 229 232 /* Even parity */ 230 ctx->regs-> SCIGCR1 |= (1<<3);231 ctx->regs-> SCIGCR1 |= (1<<2);233 ctx->regs->GCR1 |= (1<<3); 234 ctx->regs->GCR1 |= (1<<2); 232 235 break; 233 236 … … 236 239 case PARODD: 237 240 /* No Parity */ 238 ctx->regs-> SCIGCR1 &= ~(1<<2);241 ctx->regs->GCR1 &= ~(1<<2); 239 242 } 240 243 … … 245 248 ctx->regs->BRS = bauddiv; 246 249 247 ctx->regs-> SCIGCR1 |= (1<<7) | (1<<25) | (1<<24);250 ctx->regs->GCR1 |= (1<<7) | (1<<25) | (1<<24); 248 251 249 252 rtems_termios_device_lock_release(base, &lock_context); … … 272 275 * Check if we have received something. 273 276 */ 274 if ( (ctx->regs-> SCIFLR & (1<<9) ) == (1<<9) ) {277 if ( (ctx->regs->FLR & (1<<9) ) == (1<<9) ) { 275 278 n = tms570_sci_read_received_chars(ctx, buf, TMS570_SCI_BUFFER_SIZE); 276 279 if ( n > 0 ) { … … 282 285 * Check if we have something transmitted. 283 286 */ 284 if ( (ctx->regs-> SCIFLR & (1<<8) ) == (1<<8) ) {287 if ( (ctx->regs->FLR & (1<<8) ) == (1<<8) ) { 285 288 n = tms570_sci_transmitted_chars(ctx); 286 289 if ( n > 0 ) { … … 317 320 if ( len > 0 ) { 318 321 /* start UART TX, this will result in an interrupt when done */ 319 ctx->regs-> SCITD = *buf;322 ctx->regs->TD = *buf; 320 323 /* character written - raise count*/ 321 324 ctx->tx_chars_in_hw = 1; 322 325 /* Enable TX interrupt (interrupt is edge-triggered) */ 323 ctx->regs->S CISETINT = (1<<8);326 ctx->regs->SETINT = (1<<8); 324 327 325 328 } else { 326 329 /* No more to send, disable TX interrupts */ 327 ctx->regs-> SCICLEARINT = (1<<8);330 ctx->regs->CLEARINT = (1<<8); 328 331 /* Tell close that we sent everything */ 329 332 } … … 353 356 354 357 for ( i = 0; i < n; ++i ) { 355 while ( (ctx->regs-> SCIFLR & (1<<11) ) == 0) {358 while ( (ctx->regs->FLR & (1<<11) ) == 0) { 356 359 ; 357 360 } 358 ctx->regs-> SCITD = buf[i];361 ctx->regs->TD = buf[i]; 359 362 } 360 363 } … … 373 376 ) 374 377 { 375 return ctx->regs-> SCIFLR & (1<<9);378 return ctx->regs->FLR & (1<<9); 376 379 } 377 380 … … 388 391 ) 389 392 { 390 return ctx->regs-> SCIRD;393 return ctx->regs->RD; 391 394 } 392 395 … … 469 472 return false; 470 473 } 471 ctx->regs->S CISETINTLVL = 0;474 ctx->regs->SETINTLVL = 0; 472 475 /* Register Interrupt handler */ 473 476 sc = rtems_interrupt_handler_install(ctx->irq, … … 528 531 529 532 /* Flush device */ 530 while ( ( ctx->regs-> SCIFLR & (1<<11) ) > 0 ) {533 while ( ( ctx->regs->FLR & (1<<11) ) > 0 ) { 531 534 ;/* Wait until all data has been sent */ 532 535 } -
c/src/lib/libbsp/arm/tms570/include/system-clocks.h
r602e395 r069560a 50 50 static inline unsigned tms570_timer(void) 51 51 { 52 uint32_t actual_fcr0 = TMS570_RTI. RTIFRC0;52 uint32_t actual_fcr0 = TMS570_RTI.CNT[0].FRCx; 53 53 return actual_fcr0; 54 54 } -
c/src/lib/libbsp/arm/tms570/include/tms570-pom.h
r602e395 r069560a 22 22 23 23 #include <stdint.h> 24 #include <bsp/tms570.h> 24 25 25 26 #ifdef __cplusplus … … 48 49 #define TMS570_POM_REGADDRMASK ((1<<23)-1) 49 50 50 typedef struct tms570_pom_region_t {51 uint32_t PROGSTART;52 uint32_t OVLSTART;53 uint32_t REGSIZE;54 uint32_t res0;55 } tms570_pom_region_t;56 57 typedef struct tms570_pom_t {58 uint32_t GLBCTRL; /* 000h Global Control Register */59 uint32_t REV; /* 004h Revision ID */60 uint32_t CLKCTRL; /* 008h Clock Gate Control Register */61 uint32_t FLG; /* 00Ch Status Register */62 uint32_t reserved1[0x1f0/4];63 tms570_pom_region_t REG[TMS570_POM_REGIONS]; /* 200h Program Regions */64 uint32_t reserved2[0xb00/4];65 uint32_t ITCTRL; /* F00h Integration Control Register */66 uint32_t reserved3[0x09c/4];67 uint32_t CLAIMSET; /* FA0h Claim Set Register */68 uint32_t CLAIMCLR; /* FA4h Claim Clear Register */69 uint32_t reserved4[0x008/4];70 uint32_t LOCKACCESS; /* FB0h Lock Access Register */71 uint32_t LOCKSTATUS; /* FB4h Lock Status Register */72 uint32_t AUTHSTATUS; /* FB8h Authentication Status Register */73 uint32_t reserved5[0x00c/4];74 uint32_t DEVID; /* FC8h Device ID Register */75 uint32_t DEVTYPE; /* FCCh Device Type Register */76 uint32_t PERIPHERALID4; /* FD0h Peripheral ID 4 Register */77 uint32_t PERIPHERALID5; /* FD4h Peripheral ID 5 Register */78 uint32_t PERIPHERALID6; /* FD8h Peripheral ID 6 Register */79 uint32_t PERIPHERALID7; /* FDCh Peripheral ID 7 Register */80 uint32_t PERIPHERALID0; /* FE0h Peripheral ID 0 Register */81 uint32_t PERIPHERALID1; /* FE4h Peripheral ID 1 Register */82 uint32_t PERIPHERALID2; /* FE8h Peripheral ID 2 Register */83 uint32_t PERIPHERALID3; /* FECh Peripheral ID 3 Register */84 uint32_t COMPONENTID0; /* FF0h Component ID 0 Register */85 uint32_t COMPONENTID1; /* FF4h Component ID 1 Register */86 uint32_t COMPONENTID2; /* FF8h Component ID 2 Register */87 uint32_t COMPONENTID3; /* FFCh Component ID 3 Register */88 } tms570_pom_t;89 90 #define TMS570_POM (*(volatile tms570_pom_t*)0xffa04000)91 51 92 52 int mem_dump(void *buf, unsigned long start, unsigned long len, int blen); -
c/src/lib/libbsp/arm/tms570/include/tms570-rti.h
r602e395 r069560a 30 30 31 31 #include <stdint.h> 32 #include <bsp/tms570.h> 32 33 33 34 #ifdef __cplusplus 34 35 extern "C" { 35 36 #endif /* __cplusplus */ 36 37 typedef struct {38 uint32_t RTIGCTRL; /* RTIGlobalControlRegister */39 uint32_t RTITBCTRL; /* RTITimebaseControlRegister */40 uint32_t RTICAPCTRL; /* RTICaptureControlRegister */41 uint32_t RTICOMPCTRL; /* RTICompareControlRegister */42 uint32_t RTIFRC0; /* RTIFreeRunningCounter0Register */43 uint32_t RTIUC0; /* RTIUpCounter0Register */44 uint32_t RTICPUC0; /* RTICompareUpCounter0Register */45 uint32_t reserved1 [0x4/4];46 uint32_t RTICAFRC0; /* RTICaptureFreeRunningCounter0Register */47 uint32_t RTICAUC0; /* RTICaptureUpCounter0Register */48 uint32_t reserved2 [0x8/4];49 uint32_t RTIFRC1; /* RTIFreeRunningCounter1Register */50 uint32_t RTIUC1; /* RTIUpCounter1Register */51 uint32_t RTICPUC1; /* RTICompareUpCounter1Register */52 uint32_t reserved3 [0x4/4];53 uint32_t RTICAFRC1; /* RTICaptureFreeRunningCounter1Register */54 uint32_t RTICAUC1; /* RTICaptureUpCounter1Register */55 uint32_t reserved4 [0x8/4];56 uint32_t RTICOMP0; /* RTICompare0Register */57 uint32_t RTIUDCP0; /* RTIUpdateCompare0Register */58 uint32_t RTICOMP1; /* RTICompare1Register */59 uint32_t RTIUDCP1; /* RTIUpdateCompare1Register */60 uint32_t RTICOMP2; /* RTICompare2Register */61 uint32_t RTIUDCP2; /* RTIUpdateCompare2Register */62 uint32_t RTICOMP3; /* RTICompare3Register */63 uint32_t RTIUDCP3; /* RTIUpdateCompare3Register */64 uint32_t RTITBLCOMP; /* RTITimebaseLowCompareRegister */65 uint32_t RTITBHCOMP; /* RTITimebaseHighCompareRegister */66 uint32_t reserved5 [0x8/4];67 uint32_t RTISETINTENA; /* RTISetInterruptEnableRegister */68 uint32_t RTICLEARINTENA; /* RTIClearInterruptEnableRegister */69 uint32_t RTIINTFLAG; /* RTIInterruptFlagRegister */70 uint32_t reserved6 [0x4/4];71 uint32_t RTIDWDCTRL; /* DigitalWatchdogControlRegister */72 uint32_t RTIDWDPRLD; /* DigitalWatchdogPreloadRegister */73 uint32_t RTIWDSTATUS; /* WatchdogStatusRegister */74 uint32_t RTIWDKEY; /* RTIWatchdogKeyRegister */75 uint32_t RTIDWDCNTR; /* RTIDigitalWatchdogDownCounterRegister */76 uint32_t RTIWWDRXNCTRL; /* DigitalWindowedWatchdogReactionControlRegister */77 uint32_t RTIWWDSIZECTRL; /* DigitalWindowedWatchdogWindowSizeControlRegister */78 uint32_t RTIINTCLRENABLE;/* RTICompareInterruptClearEnableRegister */79 uint32_t RTICOMP0CLR; /* RTICompare0ClearRegister */80 uint32_t RTICOMP1CLR; /* RTICompare1ClearRegister */81 uint32_t RTICOMP2CLR; /* RTICompare2ClearRegister */82 uint32_t RTICOMP3CLR; /* RTICompare3ClearRegister */83 }tms570_rti_t;84 85 #define TMS570_RTI (*(volatile tms570_rti_t*)0xFFFFFC00)86 37 87 38 /** @} */ -
c/src/lib/libbsp/arm/tms570/include/tms570-sci.h
r602e395 r069560a 31 31 #include <rtems.h> 32 32 #include <stdint.h> 33 #include <bsp/tms570.h> 33 34 34 35 #ifdef __cplusplus 35 36 extern "C" { 36 37 #endif /* __cplusplus */ 37 38 typedef struct {39 uint32_t SCIGCR0; /*SCIGlobalControlRegister0*/40 uint32_t SCIGCR1; /*SCIGlobalControlRegister1*/41 uint32_t reserved1 [0x4/4];42 uint32_t SCISETINT; /*SCISetInterruptRegister*/43 uint32_t SCICLEARINT; /*SCIClearInterruptRegister*/44 uint32_t SCISETINTLVL; /*SCISetInterruptLevelRegister*/45 uint32_t SCICLEARINTLVL; /*SCIClearInterruptLevelRegister*/46 uint32_t SCIFLR; /*SCIFlagsRegister*/47 uint32_t SCIINTVECT0; /*SCIInterruptVectorOffset0*/48 uint32_t SCIINTVECT1; /*SCIInterruptVectorOffset1*/49 uint32_t SCIFORMAT; /*SCIFormatControlRegister*/50 uint32_t BRS; /*BaudRateSelectionRegister*/51 uint32_t SCIED; /*ReceiverEmulationDataBuffer*/52 uint32_t SCIRD; /*ReceiverDataBuffer*/53 uint32_t SCITD; /*TransmitDataBuffer*/54 uint32_t SCIPIO0; /*SCIPinI/OControlRegister0*/55 uint32_t SCIPIO1; /*SCIPinI/OControlRegister1*/56 uint32_t SCIPIO2; /*SCIPinI/OControlRegister2*/57 uint32_t SCIPIO3; /*SCIPinI/OControlRegister3*/58 uint32_t SCIPIO4; /*SCIPinI/OControlRegister4*/59 uint32_t SCIPIO5; /*SCIPinI/OControlRegister5*/60 uint32_t SCIPIO6; /*SCIPinI/OControlRegister6*/61 uint32_t SCIPIO7; /*SCIPinI/OControlRegister7*/62 uint32_t SCIPIO8; /*SCIPinI/OControlRegister8*/63 uint32_t reserved2 [0x30/4];64 uint32_t IODFTCTRL; /*Input/OutputErrorEnableRegister*/65 }tms570_sci_t;66 67 #define TMS570_SCI (*(volatile tms570_sci_t*)0xFFF7E400U)68 #define TMS570_SCI2 (*(volatile tms570_sci_t*)0xFFF7E500U)69 38 70 39 /** @} */ -
c/src/lib/libbsp/arm/tms570/include/tms570-vim.h
r602e395 r069560a 30 30 #include <rtems.h> 31 31 #include <stdint.h> 32 #include <bsp/tms570.h> 32 33 33 34 #ifdef __cplusplus … … 35 36 #endif /* __cplusplus */ 36 37 37 typedef struct{38 uint32_t PARFLG; /* InterruptVectorTableParityFlagRegister */39 uint32_t PARCTL; /* InterruptVectorTableParityControlRegister */40 uint32_t ADDERR; /* AddressParityErrorRegister */41 uint32_t FBPARERR; /* Fall-BackAddressParityErrorRegister */42 uint32_t reserved1 [0x4/4];43 uint32_t IRQINDEX; /* IRQIndexOffsetVectorRegister */44 uint32_t FIQINDEX; /* FIQIndexOffsetVectorRegister */45 uint32_t reserved2 [0x8/4];46 uint32_t FIRQPR[3]; /* FIQ/IRQProgramControlRegister0 */47 uint32_t reserved3 [0x4/4];48 uint32_t INTREQ[3]; /* PendingInterruptReadLocationRegister0 */49 uint32_t reserved4 [0x4/4];50 uint32_t REQENASET[3]; /* InterruptEnableSetRegister0 */51 uint32_t reserved5 [0x4/4];52 uint32_t REQENACLR[3]; /* InterruptEnableClearRegister0 */53 uint32_t reserved6 [0x4/4];54 uint32_t WAKEENASET[3]; /* Wake-upEnableSetRegister0 */55 uint32_t reserved7 [0x4/4];56 uint32_t WAKEENACLR[3]; /* Wake-upEnableClearRegister0 */57 uint32_t reserved8 [0x4/4];58 uint32_t IRQVECREG; /* IRQInterruptVectorRegister */59 uint32_t FIQVECREG; /* FIQInterruptVectorRegister */60 uint32_t CAPEVT; /* CaptureEventRegister */61 uint32_t reserved9 [0x4/4];62 uint32_t CHANCTRL [0x5c/4]; /* VIM Interrupt Control Register (PARSER ERROR) */63 }tms570_vim_t;64 38 65 #define TMS570_VIM (*(volatile tms570_vim_t*)0xFFFFFDEC)66 39 67 40 #endif -
c/src/lib/libbsp/arm/tms570/include/tms570.h
r602e395 r069560a 1 /** 2 * @file tms570.h 3 * 4 * @ingroup tms570 5 * 6 * @brief Specific register definitions according to tms570 family boards. 7 */ 1 /* This file is generated by make_central_header.py */ 2 /* Current script's version can be found at: */ 3 /* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */ 8 4 9 5 /* 10 * Copyright (c) 201 5 Taller Technologies.6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com> 11 7 * 12 * @author Martin Galvan <martin.galvan@tallertechnologies.com> 8 * Czech Technical University in Prague 9 * Zikova 1903/4 10 * 166 36 Praha 6 11 * Czech Republic 13 12 * 14 * The license and distribution terms for this file may be 15 * found in the file LICENSE in this distribution or at 16 * http://www.rtems.org/license/LICENSE. 17 */ 13 * All rights reserved. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions are met: 17 * 18 * 1. Redistributions of source code must retain the above copyright notice, this 19 * list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright notice, 21 * this list of conditions and the following disclaimer in the documentation 22 * and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 * The views and conclusions contained in the software and documentation are those 36 * of the authors and should not be interpreted as representing official policies, 37 * either expressed or implied, of the FreeBSD Project. 38 */ 39 #ifndef LIBBSP_ARM_TMS570 40 #define LIBBSP_ARM_TMS570 41 #include <bsp/ti_herc/reg_adc.h> 42 #include <bsp/ti_herc/reg_ccmsr.h> 43 #include <bsp/ti_herc/reg_crc.h> 44 #include <bsp/ti_herc/reg_dcan.h> 45 #include <bsp/ti_herc/reg_dcc.h> 46 #include <bsp/ti_herc/reg_dma.h> 47 #include <bsp/ti_herc/reg_dmm.h> 48 #include <bsp/ti_herc/reg_efuse.h> 49 #include <bsp/ti_herc/reg_emac.h> 50 #include <bsp/ti_herc/reg_emacm.h> 51 #include <bsp/ti_herc/reg_emif.h> 52 #include <bsp/ti_herc/reg_esm.h> 53 #include <bsp/ti_herc/reg_flash.h> 54 #include <bsp/ti_herc/reg_flex_ray.h> 55 #include <bsp/ti_herc/reg_gio.h> 56 #include <bsp/ti_herc/reg_htu.h> 57 #include <bsp/ti_herc/reg_i2c.h> 58 #include <bsp/ti_herc/reg_iomm.h> 59 #include <bsp/ti_herc/reg_lin.h> 60 #include <bsp/ti_herc/reg_mdio.h> 61 #include <bsp/ti_herc/reg_n2het.h> 62 #include <bsp/ti_herc/reg_pbist.h> 63 #include <bsp/ti_herc/reg_pll.h> 64 #include <bsp/ti_herc/reg_pmm.h> 65 #include <bsp/ti_herc/reg_rti.h> 66 #include <bsp/ti_herc/reg_rtp.h> 67 #include <bsp/ti_herc/reg_sci.h> 68 #include <bsp/ti_herc/reg_tcr.h> 69 #include <bsp/ti_herc/reg_tcram.h> 70 #include <bsp/ti_herc/reg_vim.h> 71 #include <bsp/ti_herc/reg_pom.h> 72 #include <bsp/ti_herc/reg_spi.h> 73 #include <bsp/ti_herc/reg_stc.h> 74 #include <bsp/ti_herc/reg_sys.h> 75 #include <bsp/ti_herc/reg_sys2.h> 76 #include <bsp/ti_herc/reg_pcr.h> 18 77 19 #ifndef LIBBSP_ARM_TMS570_H 20 #define LIBBSP_ARM_TMS570_H 21 22 #define SYSECR (*(uint32_t *)0xFFFFFFE0u) /* System Exception Control Register */ 23 #define ESMIOFFHR (*(uint32_t *)0xFFFFF528) /* ESM Interrupt Offset High Register */ 24 #define ESMSR1 (*(uint32_t *)0xFFFFF518u) /* ESM Status Register 1 */ 25 #define ESMSR2 (*(uint32_t *)0xFFFFF51Cu) /* ESM Status Register 2 */ 26 #define ESMSR3 (*(uint32_t *)0xFFFFF520u) /* ESM Status Register 3 */ 27 #define ESMSR4 (*(uint32_t *)0xFFFFF558u) /* ESM Status Register 4 */ 28 29 #define SYSECR_RESET 0x80000u 30 31 #endif /* LIBBSP_ARM_TMS570_H */ 78 #define TMS570_ADC1 (*(volatile tms570_adc_t*)0xFFF7C000) 79 #define TMS570_ADC2 (*(volatile tms570_adc_t*)0xFFF7C200) 80 #define TMS570_CCMSR (*(volatile tms570_ccmsr_t*)0XFFFFF600) 81 #define TMS570_CRC (*(volatile tms570_crc_t*)0xFE000000) 82 #define TMS570_DCAN1 (*(volatile tms570_dcan_t*)0xFFF7DC00) 83 #define TMS570_DCAN2 (*(volatile tms570_dcan_t*)0xFFF7DE00) 84 #define TMS570_DCAN3 (*(volatile tms570_dcan_t*)0xFFF7E000) 85 #define TMS570_DCC1 (*(volatile tms570_dcc_t*)0xFFFFEC00) 86 #define TMS570_DCC2 (*(volatile tms570_dcc_t*)0xFFFFF400) 87 #define TMS570_DMA (*(volatile tms570_dma_t*)0xFFFFF000) 88 #define TMS570_DMM (*(volatile tms570_dmm_t*)0xFFFFF700) 89 #define TMS570_EFUSE (*(volatile tms570_efuse_t*)0XFFF8C01C) 90 #define TMS570_EMAC (*(volatile tms570_emac_t*)0xFCF78900) 91 #define TMS570_EMACM (*(volatile tms570_emacm_t*)0xFCF78000) 92 #define TMS570_EMIF (*(volatile tms570_emif_t*)0xFCFFE800) 93 #define TMS570_ESM (*(volatile tms570_esm_t*)0XFFFFF500) 94 #define TMS570_FLASH (*(volatile tms570_flash_t*)0XFFF87000) 95 #define TMS570_FLEX_RAY (*(volatile tms570_flex_ray_t*)0xFFF7C800) 96 #define TMS570_GIO (*(volatile tms570_gio_t*)0xFFF7BC00) 97 #define TMS570_GIO_PORTA (*(volatile tms570_gio_port_t*)0xFFF7BC34) 98 #define TMS570_GIO_PORTB (*(volatile tms570_gio_port_t*)0xFFF7BC54) 99 #define TMS570_GIO_PORTC (*(volatile tms570_gio_port_t*)0xFFF7BC74) 100 #define TMS570_GIO_PORTD (*(volatile tms570_gio_port_t*)0xFFF7BC94) 101 #define TMS570_GIO_PORTE (*(volatile tms570_gio_port_t*)0xFFF7BCB4) 102 #define TMS570_GIO_PORTF (*(volatile tms570_gio_port_t*)0xFFF7BCD4) 103 #define TMS570_GIO_PORTG (*(volatile tms570_gio_port_t*)0xFFF7BCF4) 104 #define TMS570_GIO_PORTH (*(volatile tms570_gio_port_t*)0xFFF7BD14) 105 #define TMS570_HTU1 (*(volatile tms570_htu_t*)0xFFF7A400) 106 #define TMS570_HTU2 (*(volatile tms570_htu_t*)0xFFF7A500) 107 #define TMS570_I2C (*(volatile tms570_i2c_t*)0xFFF7D400) 108 #define TMS570_IOMM (*(volatile tms570_iomm_t*)0XFFFFEA00) 109 #define TMS570_PINMUX (*(volatile tms570_pinmux_t*)0xFFFFEB10) 110 #define TMS570_LIN (*(volatile tms570_lin_t*)0xFFF7E400) 111 #define TMS570_MDIO (*(volatile tms570_mdio_t*)0xFCF78900) 112 #define TMS570_NHET1 (*(volatile tms570_nhet_t*)0xFFF7B800) 113 #define TMS570_NHET2 (*(volatile tms570_nhet_t*)0xFFF7B900) 114 #define TMS570_PBIST (*(volatile tms570_pbist_t*)0xFFFFE400) 115 #define TMS570_PLL (*(volatile tms570_pll_t*)0XFFFFE100) 116 #define TMS570_PMM (*(volatile tms570_pmm_t*)0xFFFF0000) 117 #define TMS570_RTI (*(volatile tms570_rti_t*)0xFFFFFC00) 118 #define TMS570_RTP (*(volatile tms570_rtp_t*)0xFFFFFA00) 119 #define TMS570_SCI (*(volatile tms570_sci_t*)0xFFF7E500) 120 #define TMS570_TCR (*(volatile tms570_tcr_t*)0xFFF7C800) 121 #define TMS570_TCRAM1 (*(volatile tms570_tcram_t*)0xFFFFF800) 122 #define TMS570_TCRAM2 (*(volatile tms570_tcram_t*)0xFFFFF900) 123 #define TMS570_VIM (*(volatile tms570_vim_t*)0XFFFFFDEC) 124 #define TMS570_POM (*(volatile tms570_pom_t*)0XFFA04000) 125 #define TMS570_SPI (*(volatile tms570_spi_t*)0xFFF7F400) 126 #define TMS570_STC (*(volatile tms570_stc_t*)0xFFFFE600) 127 #define TMS570_SYS1 (*(volatile tms570_sys1_t*)0xFFFFFF00) 128 #define TMS570_SYS2 (*(volatile tms570_sys2_t*)0xFFFFE100) 129 #define TMS570_PCR (*(volatile tms570_pcr_t*)0xFFFFE000) 130 #endif /* LIBBSP_ARM_TMS570 */ -
c/src/lib/libbsp/arm/tms570/preinstall.am
r602e395 r069560a 34 34 PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) 35 35 36 $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp): 37 @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp/ti_herc 38 @: > $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 39 PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 40 36 41 $(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) 37 42 $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs … … 110 115 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/system-clocks.h 111 116 117 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_adc.h: include/ti_herc/reg_adc.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 118 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_adc.h 119 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_adc.h 120 121 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_ccmsr.h: include/ti_herc/reg_ccmsr.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 122 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_ccmsr.h 123 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_ccmsr.h 124 125 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_crc.h: include/ti_herc/reg_crc.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 126 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_crc.h 127 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_crc.h 128 129 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcan.h: include/ti_herc/reg_dcan.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 130 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcan.h 131 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcan.h 132 133 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcc.h: include/ti_herc/reg_dcc.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 134 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcc.h 135 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcc.h 136 137 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dma.h: include/ti_herc/reg_dma.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 138 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dma.h 139 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dma.h 140 141 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dmm.h: include/ti_herc/reg_dmm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 142 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dmm.h 143 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dmm.h 144 145 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_efuse.h: include/ti_herc/reg_efuse.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 146 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_efuse.h 147 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_efuse.h 148 149 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emac.h: include/ti_herc/reg_emac.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 150 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emac.h 151 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emac.h 152 153 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emacm.h: include/ti_herc/reg_emacm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 154 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emacm.h 155 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emacm.h 156 157 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emif.h: include/ti_herc/reg_emif.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 158 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emif.h 159 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emif.h 160 161 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_esm.h: include/ti_herc/reg_esm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 162 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_esm.h 163 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_esm.h 164 165 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flash.h: include/ti_herc/reg_flash.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 166 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flash.h 167 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flash.h 168 169 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flex_ray.h: include/ti_herc/reg_flex_ray.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 170 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flex_ray.h 171 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flex_ray.h 172 173 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_gio.h: include/ti_herc/reg_gio.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 174 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_gio.h 175 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_gio.h 176 177 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_htu.h: include/ti_herc/reg_htu.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 178 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_htu.h 179 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_htu.h 180 181 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_i2c.h: include/ti_herc/reg_i2c.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 182 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_i2c.h 183 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_i2c.h 184 185 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_iomm.h: include/ti_herc/reg_iomm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 186 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_iomm.h 187 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_iomm.h 188 189 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_lin.h: include/ti_herc/reg_lin.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 190 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_lin.h 191 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_lin.h 192 193 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_mdio.h: include/ti_herc/reg_mdio.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 194 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_mdio.h 195 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_mdio.h 196 197 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_n2het.h: include/ti_herc/reg_n2het.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 198 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_n2het.h 199 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_n2het.h 200 201 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pbist.h: include/ti_herc/reg_pbist.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 202 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pbist.h 203 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pbist.h 204 205 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pll.h: include/ti_herc/reg_pll.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 206 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pll.h 207 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pll.h 208 209 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pmm.h: include/ti_herc/reg_pmm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 210 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pmm.h 211 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pmm.h 212 213 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rti.h: include/ti_herc/reg_rti.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 214 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rti.h 215 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rti.h 216 217 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rtp.h: include/ti_herc/reg_rtp.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 218 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rtp.h 219 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rtp.h 220 221 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sci.h: include/ti_herc/reg_sci.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 222 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sci.h 223 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sci.h 224 225 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcr.h: include/ti_herc/reg_tcr.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 226 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcr.h 227 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcr.h 228 229 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcram.h: include/ti_herc/reg_tcram.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 230 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcram.h 231 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcram.h 232 233 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_vim.h: include/ti_herc/reg_vim.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 234 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_vim.h 235 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_vim.h 236 237 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pom.h: include/ti_herc/reg_pom.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 238 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pom.h 239 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pom.h 240 241 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_spi.h: include/ti_herc/reg_spi.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 242 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_spi.h 243 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_spi.h 244 245 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_stc.h: include/ti_herc/reg_stc.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 246 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_stc.h 247 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_stc.h 248 249 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys.h: include/ti_herc/reg_sys.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 250 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys.h 251 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys.h 252 253 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys2.h: include/ti_herc/reg_sys2.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 254 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys2.h 255 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys2.h 256 257 $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pcr.h: include/ti_herc/reg_pcr.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp) 258 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pcr.h 259 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pcr.h 260 112 261 $(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) 113 262 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -
c/src/lib/libbsp/arm/tms570/startup/bspreset.c
r602e395 r069560a 26 26 /* ESMR3 errors don't generate interrupts. */ 27 27 if (esm_irq_channel < 0x20u) { 28 ESMSR1= 1 << esm_irq_channel;28 TMS570_ESM.SR[0] = 1 << esm_irq_channel; 29 29 } else if (esm_irq_channel < 0x40u) { 30 ESMSR2= 1 << (esm_irq_channel - 32u);30 TMS570_ESM.SR[1] = 1 << (esm_irq_channel - 32u); 31 31 } else if (esm_irq_channel < 0x60u) { 32 ESMSR4 = 1 << (esm_irq_channel - 64u);32 TMS570_ESM.SR4 = 1 << (esm_irq_channel - 64u); 33 33 } 34 34 } … … 36 36 void bsp_reset(void) 37 37 { 38 uint32_t esm_irq_channel = ESMIOFFHR - 1;38 uint32_t esm_irq_channel = TMS570_ESM.IOFFHR - 1; 39 39 40 40 if (esm_irq_channel) { … … 43 43 44 44 /* Reset the board */ 45 SYSECR = SYSECR_RESET; 45 /* write of value other than 1 cause system reset */ 46 TMS570_SYS1.SYSECR = TMS570_SYS1_SYSECR_RESET(2); 46 47 }
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