Changeset 05e5896 in rtems


Ignore:
Timestamp:
Sep 26, 2003, 8:15:47 PM (18 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Children:
1721cb84
Parents:
2e9d1ef5
Message:

2003-09-26 Cedric Aubert <cedric_aubert@…>

PR 499/rtems_misc

  • serial/mc68681.c: Miscellaneous corrections:
    • Correction of ACR_BIT[7] (Baudrate table) Configuration
    • Correction of Parity Bit Configuration (Odd was forced)
    • Correction of Stop Bit configuration (inversed)
    • Correction of ISR Handler to call

rtems_termios_dequeue_character() only if is a Tx Empty IRQ.

  • Add RTS CTS Hardware flow control Configuration
Location:
c/src/libchip
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/libchip/ChangeLog

    r2e9d1ef5 r05e5896  
     12003-09-26      Cedric Aubert <cedric_aubert@yahoo.fr>
     2
     3        PR 499/rtems_misc
     4        * serial/mc68681.c:  Miscellaneous corrections:
     5            - Correction of ACR_BIT[7] (Baudrate table) Configuration
     6            - Correction of Parity Bit Configuration (Odd was forced)
     7            - Correction of Stop Bit configuration (inversed)
     8            - Correction of ISR Handler to call
     9              rtems_termios_dequeue_character() only if is a Tx Empty IRQ.
     10            - Add RTS CTS Hardware flow control Configuration
     11
    1122003-09-04      Joel Sherrill <joel@OARcorp.com>
    213
  • c/src/libchip/serial/mc68681.c

    r2e9d1ef5 r05e5896  
    124124    if (t->c_cflag & PARODD)
    125125      mode1 |= 0x04;
    126     else
    127       mode1 |= 0x04;
     126    /* else
     127                mode1 |= 0x04; */
    128128  } else {
    129129   mode1 |= 0x10;
     
    150150 
    151151  if (t->c_cflag & CSTOPB) {
    152     mode2 |= 0x07;                      /* 2 stop bits */
     152    mode2 |= 0x0F;                      /* 2 stop bits */
    153153  } else {
    154     if ((t->c_cflag & CSIZE) == CS5)    /* CS5 and 2 stop bits not supported */
     154    if ((t->c_cflag & CSIZE) == CS5)    /* CS5 and 1 stop bits not supported */
    155155      return -1;
    156     mode2 |= 0x0F;                      /* 1 stop bit */
    157   }
     156    mode2 |= 0x07;                      /* 1 stop bit */
     157  }
     158
     159 /*
     160  *   Hardware Flow Control
     161  */
     162
     163  if(t->c_cflag & CRTSCTS) {
     164          mode1 |= 0x80; /* Enable Rx RTS Control */
     165          mode2 |= 0x10; /* Enable CTS Enable Tx */
     166  }
     167
    158168
    159169  rtems_interrupt_disable(Irql);
     
    267277  unsigned32             pMC68681_port;
    268278  unsigned int           baud;
    269   unsigned int           acr;
     279  unsigned int           acr_bit;
    270280  unsigned int           vector;
    271281  unsigned int           command;
    272282  rtems_interrupt_level  Irql;
    273283  setRegister_f          setReg;
    274 
     284  unsigned int                   status;
     285 
     286 
    275287  pMC68681      = Console_Port_Tbl[minor].ulCtrlPort1;
    276288  pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
    277289  setReg        = Console_Port_Tbl[minor].setRegister;
    278290  vector        = Console_Port_Tbl[minor].ulIntVector;
    279 
     291   
    280292  /* XXX default baud rate should be from configuration table */
    281293
    282   (void) mc68681_baud_rate( minor, B9600, &baud, &acr, &command );
     294  status = mc68681_baud_rate( minor, B9600, &baud, &acr_bit, &command );
     295  if (status < 0) rtems_fatal_error_occurred (RTEMS_NOT_DEFINED);
    283296
    284297  /*
     
    287300
    288301  rtems_interrupt_disable(Irql);
    289     (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr );
     302    (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit << 7 );
    290303    (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud );
    291304    if ( command ) {
     
    554567  status = 0;
    555568
    556   if ( !(Console_Port_Tbl[minor].ulDataPort & MC68681_DATA_BAUD_RATE_SET_1) )
     569  if (Console_Port_Tbl[minor].ulDataPort & MC68681_DATA_BAUD_RATE_SET_2)
     570  {
    557571    acr_bit = 1;
     572  }
    558573
    559574  is_extended = 0;
     
    612627  unsigned32              pMC68681_port;
    613628  volatile unsigned8      ucLineStatus;
     629  volatile unsigned8      ucISRStatus;
    614630  unsigned char           cChar;
    615631  getRegister_f           getReg;
     
    620636  getReg        = Console_Port_Tbl[minor].getRegister;
    621637  setReg        = Console_Port_Tbl[minor].setRegister;
     638
     639  /* Get ISR at the beginning of the IT routine */
     640  ucISRStatus = (*getReg)(pMC68681, MC68681_INTERRUPT_STATUS_REG);
     641 
     642  /* Get good ISR a or b channel */
     643  if (pMC68681 != pMC68681_port){
     644    ucISRStatus >>= 4;
     645  }
     646   
     647  /* See if is usefull to call rtems_termios_dequeue */
     648  if(Console_Port_Data[minor].bActive == FALSE) {
     649                ucISRStatus = ucISRStatus & ~MC68681_IR_TX_READY;
     650  }
    622651
    623652  /*
     
    651680   */
    652681
    653   ucLineStatus = (*getReg)(pMC68681, MC68681_INTERRUPT_STATUS_REG);
    654   if (pMC68681 != pMC68681_port)
    655     ucLineStatus >>= 4;
    656 
    657   if(ucLineStatus & MC68681_IR_TX_READY) {
    658     if (rtems_termios_dequeue_characters(
    659          Console_Port_Data[minor].termios_data, 1)) {
     682  if (ucISRStatus & MC68681_IR_TX_READY) {
     683    if (!rtems_termios_dequeue_characters(
     684          Console_Port_Data[minor].termios_data, 1)) {
     685          /* If no more char to send, disable TX interrupt */
    660686      Console_Port_Data[minor].bActive = FALSE;
    661687      mc68681_enable_interrupts(minor, MC68681_IMR_ENABLE_ALL_EXCEPT_TX);
    662688    }
    663689  }
    664 
    665690}
    666691
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