Changeset 05015dc1 in rtems for bsps/i386/shared/cache

Timestamp:
01/23/18 02:23:55 (5 years ago)
Author:
Chris Johns <chrisj@…>
Branches:
5, master
Children:
5f0a6376
Parents:
4cf93658
git-author:
Chris Johns <chrisj@…> (01/23/18 02:23:55)
git-committer:
Chris Johns <chrisj@…> (02/01/18 03:59:55)
Message:

Xilinx AXI I2C driver IP race condition causes clock glitch.

Setting the PIRQ to 0 before reading the data produces a short clock pulse.
Moving the write to after reading the data fixes the issue.

Close #3173

(No files)

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