Changeset 03fecae in rtems

Timestamp:

01/11/18 07:54:27 (5 years ago)

Author:

Christian Mauderer <Christian.Mauderer@…>

Branches:

5, master

Children:

538a0a8

Parents:

a3eec5c

git-author:

Christian Mauderer <Christian.Mauderer@…> (01/11/18 07:54:27)

git-committer:

Christian Mauderer <christian.mauderer@…> (02/12/18 13:25:02)

Message:

bsp/atsam: Add option to disable 32kHz XTAL.

Location:

c/src/lib/libbsp/arm/atsam

Files:

• README (modified) (1 diff)
• configure.ac (modified) (1 diff)
• libraries/libboard/resources_v71/system_samv71.c (modified) (2 diffs)

c/src/lib/libbsp/arm/atsam/README

@@ -44 +44 @@
 --------
 
+Use ATSAM_SLOWCLOCK_USE_XTAL=0 to disable the usage of the external 32kHz
+oscillator for the slow clock. This is useful for example for the SAM E70
+Xplained kit.
+
 Use ATSAM_CONSOLE_BAUD=XYZ to set the initial baud for console devices (default
 115200).

c/src/lib/libbsp/arm/atsam/configure.ac

@@ -73 +73 @@
 See startup/pmc-config.c for available clock configurations.])
 
+RTEMS_BSPOPTS_SET([ATSAM_SLOWCLOCK_USE_XTAL],[*],[1])
+RTEMS_BSPOPTS_HELP([ATSAM_SLOWCLOCK_USE_XTAL],
+[Use the external crystal as source for the slow clock instead of the internal
+RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow
+clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without
+a external crystal connected, the controller might hang in the switching process
+without a working NRST pin. ])
+
 RTEMS_BSPOPTS_SET([ATSAM_CHANGE_CLOCK_FROM_SRAM],[*],[0])
 RTEMS_BSPOPTS_HELP([ATSAM_CHANGE_CLOCK_FROM_SRAM],

c/src/lib/libbsp/arm/atsam/libraries/libboard/resources_v71/system_samv71.c

@@ -94 +94 @@
          */
 
+#if ATSAM_SLOWCLOCK_USE_XTAL == 1
         read_MOR = PMC->CKGR_MOR;
         /* enable external crystal - enable RC OSC */
@@ -105 +106 @@
                 while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL));
         }
+#endif
 
         /* Initialize main oscillator */