Changeset 03b7789 in rtems
- Timestamp:
- 04/26/14 13:09:10 (9 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 0832ca7
- Parents:
- a16af0b3
- git-author:
- Sebastian Huber <sebastian.huber@…> (04/26/14 13:09:10)
- git-committer:
- Sebastian Huber <sebastian.huber@…> (04/29/14 07:51:22)
- Files:
-
- 1 deleted
- 20 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/mips/shared/irq/exception.S
ra16af0b3 r03b7789 89 89 90 90 .extern _Thread_Dispatch 91 .extern _ISR_Vector_table92 91 93 92 /* void __ISR_Handler() -
c/src/lib/libbsp/sparc/shared/irq_asm.S
ra16af0b3 r03b7789 424 424 425 425 sethi %hi(SYM(_ISR_Vector_table)), %g4 426 ld [%g4+%lo(SYM(_ISR_Vector_table))], %g4426 or %g4, %lo(SYM(_ISR_Vector_table)), %g4 427 427 and %l3, 0xFF, %g5 ! remove synchronous trap indicator 428 428 sll %g5, 2, %g5 ! g5 = offset into table -
c/src/lib/libcpu/sparc64/shared/score/interrupt.S
ra16af0b3 r03b7789 250 250 */ 251 251 setx SYM(_ISR_Vector_table), %o5, %g1 252 ldx [%g1], %g1253 252 and %g2, 0x1FF, %o5 ! remove synchronous trap indicator 254 253 sll %o5, 3, %o5 ! o5 = offset into table -
cpukit/sapi/include/confdefs.h
ra16af0b3 r03b7789 2285 2285 2286 2286 /** 2287 * On architectures that use Simple Vectored Interrupts, it is RTEMS2288 * responsibility to allocate the vector table. This avoids reserving2289 * the memory on architectures that use the Programmable Interrupt2290 * Controller Vectored Interrupts.2291 */2292 #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)2293 /*2294 * This is a (hopefully) temporary hack. On the mips, the number of2295 * vectors is NOT statically defined. But it has to be statically2296 * defined for this to work. This is an issue looking for a nice2297 * solution.2298 */2299 #if defined(__mips__)2300 #define CONFIGURE_INTERRUPT_VECTOR_TABLE \2301 _Configure_From_workspace( (sizeof(ISR_Handler_entry) * 256))2302 #else2303 #define CONFIGURE_INTERRUPT_VECTOR_TABLE \2304 _Configure_From_workspace( \2305 (sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS))2306 #endif2307 #else2308 #define CONFIGURE_INTERRUPT_VECTOR_TABLE 02309 #endif2310 2311 /**2312 2287 * RTEMS uses two instance of an internal mutex class. This accounts 2313 2288 * for these mutexes. … … 2338 2313 #define CONFIGURE_MEMORY_FOR_SYSTEM_OVERHEAD \ 2339 2314 ( CONFIGURE_MEMORY_FOR_IDLE_TASK + /* IDLE and stack */ \ 2340 CONFIGURE_INTERRUPT_VECTOR_TABLE + /* interrupt vectors */ \2341 2315 CONFIGURE_INTERRUPT_STACK_MEMORY + /* interrupt stack */ \ 2342 2316 CONFIGURE_API_MUTEX_MEMORY /* allocation mutex */ \ … … 2756 2730 2757 2731 /* System overhead pieces */ 2758 uint32_t INTERRUPT_VECTOR_TABLE;2759 2732 uint32_t INTERRUPT_STACK_MEMORY; 2760 2733 uint32_t MEMORY_FOR_IDLE_TASK; … … 2811 2784 2812 2785 /* System overhead pieces */ 2813 CONFIGURE_INTERRUPT_VECTOR_TABLE,2814 2786 CONFIGURE_INTERRUPT_STACK_MEMORY, 2815 2787 CONFIGURE_MEMORY_FOR_IDLE_TASK, -
cpukit/score/cpu/arm/rtems/score/cpu.h
ra16af0b3 r03b7789 171 171 172 172 #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 173 174 #define CPU_INTERRUPT_NUMBER_OF_VECTORS 8175 176 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)177 173 178 174 #define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE -
cpukit/score/cpu/bfin/cpu_asm.S
ra16af0b3 r03b7789 360 360 361 361 [--sp] = r2; 362 p0.h = SYM(_ISR_Vector_table); 363 p0.l = SYM(_ISR_Vector_table); 364 r2 = [p0]; 362 r2.h = SYM(_ISR_Vector_table); 363 r2.l = SYM(_ISR_Vector_table); 365 364 r1 = r0 << 2; 366 365 r1 = r1 + r2; -
cpukit/score/cpu/h8300/cpu_asm.S
ra16af0b3 r03b7789 134 134 /* Vector to ISR */ 135 135 136 mov.l @SYM(_ISR_Vector_table),er1137 136 mov er0,er2 ; copy vector 138 137 shll.l er2 139 138 shll.l er2 ; vector = vector * 4 (sizeof(int)) 140 add.l er2,er1 141 mov.l @er1,er1 139 mov.l @(SYM(_ISR_Vector_table), er2),er1 142 140 jsr @er1 ; er0 = arg1 =vector 143 141 -
cpukit/score/cpu/i386/rtems/score/cpu.h
ra16af0b3 r03b7789 317 317 318 318 /* 319 * i386 family supports 256 distinct vectors.320 */321 322 #define CPU_INTERRUPT_NUMBER_OF_VECTORS 256323 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)324 325 /*326 319 * This is defined if the port has a special way to report the ISR nesting 327 320 * level. Most ports maintain the variable _ISR_Nest_level. -
cpukit/score/cpu/m68k/cpu_asm.S
ra16af0b3 r03b7789 277 277 addql #1,ISR_NEST_LEVEL | one nest level deeper 278 278 279 movel SYM (_ISR_Vector_table),a0 | a0= base of RTEMS table 280 #if ( M68K_HAS_PREINDEXING == 1 ) 281 movel (a0,d0:w:1),a0 | a0 = address of user routine 282 #else 283 addal d0,a0 | a0 = address of vector 284 movel (a0),a0 | a0 = address of user routine 285 #endif 279 lea SYM(_ISR_Vector_table),a0 280 movel (a0,d0),a0 | a0 = address of user routine 286 281 287 282 lsrl #2,d0 | d0 = vector number -
cpukit/score/cpu/mips/cpu_asm.S
ra16af0b3 r03b7789 584 584 585 585 .extern _Thread_Dispatch 586 .extern _ISR_Vector_table587 586 588 587 /* void _DBG_Handler() -
cpukit/score/cpu/mips/rtems/score/cpu.h
ra16af0b3 r03b7789 661 661 662 662 /* 663 * This defines the number of entries in the ISR_Vector_table managed664 * by RTEMS.665 */666 667 extern unsigned int mips_interrupt_number_of_vectors;668 #define CPU_INTERRUPT_NUMBER_OF_VECTORS (mips_interrupt_number_of_vectors)669 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)670 671 /*672 663 * Should be large enough to run all RTEMS tests. This ensures 673 664 * that a "reasonable" small application should not have any problems. -
cpukit/score/cpu/nios2/Makefile.am
ra16af0b3 r03b7789 34 34 libscorecpu_a_SOURCES += nios2-iic-irq.c 35 35 libscorecpu_a_SOURCES += nios2-initialize.c 36 libscorecpu_a_SOURCES += nios2-initialize-vectors.c37 36 libscorecpu_a_SOURCES += nios2-isr-get-level.c 38 37 libscorecpu_a_SOURCES += nios2-isr-install-raw-handler.c -
cpukit/score/cpu/nios2/rtems/score/cpu.h
ra16af0b3 r03b7789 193 193 } CPU_Exception_frame; 194 194 195 void _CPU_Initialize_vectors( void ); 195 #define _CPU_Initialize_vectors() 196 196 197 197 /** -
cpukit/score/cpu/no_cpu/rtems/score/cpu.h
ra16af0b3 r03b7789 687 687 * @ingroup CPUInterrupt 688 688 * 689 * This defines the number of entries in the @ref _ISR_Vector_table managed690 * by RTEMS.691 * 692 * Port Specific Information:693 * 694 * XXX document implementation including references if appropriate689 * This defines the number of entries in the _ISR_Vector_table managed by RTEMS 690 * in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to TRUE. It must be a 691 * compile-time constant. 692 * 693 * It must be undefined in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to 694 * FALSE. 695 695 */ 696 696 #define CPU_INTERRUPT_NUMBER_OF_VECTORS 32 … … 699 699 * @ingroup CPUInterrupt 700 700 * 701 * This defines the highest interrupt vector number for this port. 701 * This defines the highest interrupt vector number for this port in case 702 * CPU_SIMPLE_VECTORED_INTERRUPTS is defined to TRUE. It must be less than 703 * CPU_INTERRUPT_NUMBER_OF_VECTORS. It may be not a compile-time constant. 704 * 705 * It must be undefined in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to 706 * FALSE. 702 707 */ 703 708 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) -
cpukit/score/cpu/powerpc/rtems/score/cpu.h
ra16af0b3 r03b7789 598 598 599 599 #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 600 601 /*602 * This defines the number of entries in the ISR_Vector_table managed603 * by RTEMS.604 *605 * NOTE: CPU_INTERRUPT_NUMBER_OF_VECTORS and606 * CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER are only used on607 * Simple Vectored Architectures and thus are not defined608 * for this architecture.609 */610 600 611 601 /* -
cpukit/score/cpu/v850/rtems/score/cpu.h
ra16af0b3 r03b7789 550 550 #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 551 551 552 /* XXX this should not be needed on PIC architectures */553 /* XXX evaluate removing it */554 #if 0555 /**556 * This defines the number of entries in the @ref _ISR_Vector_table managed557 * by RTEMS.558 *559 * Port Specific Information:560 *561 * XXX document implementation including references if appropriate562 */563 #define CPU_INTERRUPT_NUMBER_OF_VECTORS 32564 #endif565 566 /**567 * This defines the highest interrupt vector number for this port.568 */569 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)570 571 552 /** 572 553 * This is defined if the port has a special way to report the ISR nesting -
cpukit/score/include/rtems/score/isr.h
ra16af0b3 r03b7789 72 72 73 73 /** 74 * This constant promotes out the number of vectors truly supported by75 * the current CPU being used. This is usually the number of distinct vectors76 * the cpu can vector.77 */78 #define ISR_NUMBER_OF_VECTORS CPU_INTERRUPT_NUMBER_OF_VECTORS79 80 /**81 * This constant promotes out the highest valid interrupt vector number.82 */83 #define ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER84 85 /**86 74 * The following declares the Vector Table. Application 87 75 * interrupt service routines are vectored by the ISR Handler via this table. 88 76 */ 89 SCORE_EXTERN ISR_Handler_entry *_ISR_Vector_table;77 extern ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ]; 90 78 #endif 91 79 -
cpukit/score/src/isr.c
ra16af0b3 r03b7789 27 27 #include <rtems/config.h> 28 28 29 #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE) 30 ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ]; 31 #elif defined(CPU_INTERRUPT_NUMBER_OF_VECTORS) 32 #error "CPU_INTERRUPT_NUMBER_OF_VECTORS is defined for non-simple vectored interrupts" 33 #elif defined(CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER) 34 #error "CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER is defined for non-simple vectored interrupts" 35 #endif 36 29 37 void _ISR_Handler_initialization( void ) 30 38 { … … 32 40 33 41 #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE) 34 _ISR_Vector_table = _Workspace_Allocate_or_fatal_error(35 sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS36 );37 38 42 _CPU_Initialize_vectors(); 39 43 #endif -
testsuites/sptests/spfatal07/testcase.h
ra16af0b3 r03b7789 38 38 INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL 39 39 40 #if CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE41 #define CONFIGURE_MEMORY_OVERHEAD (sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS)42 #endif43 44 40 #if CPU_ALLOCATE_INTERRUPT_STACK == TRUE 45 41 #define CONFIGURE_INTERRUPT_STACK_SIZE (STACK_MINIMUM_SIZE - 1) -
testsuites/sptests/spintr_err01/init.c
ra16af0b3 r03b7789 37 37 status = rtems_interrupt_catch( 38 38 Service_routine, 39 ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER + 10,39 CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER + 1, 40 40 &old_service_routine 41 41 );
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