Changeset 03b7789 in rtems


Ignore:
Timestamp:
Apr 26, 2014, 1:09:10 PM (5 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
0832ca7
Parents:
a16af0b3
git-author:
Sebastian Huber <sebastian.huber@…> (04/26/14 13:09:10)
git-committer:
Sebastian Huber <sebastian.huber@…> (04/29/14 07:51:22)
Message:

score: Statically initialize _ISR_Vector_table

Files:
1 deleted
20 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/mips/shared/irq/exception.S

    ra16af0b3 r03b7789  
    8989
    9090.extern _Thread_Dispatch
    91 .extern _ISR_Vector_table
    9291
    9392/*  void __ISR_Handler()
  • c/src/lib/libbsp/sparc/shared/irq_asm.S

    ra16af0b3 r03b7789  
    424424
    425425        sethi    %hi(SYM(_ISR_Vector_table)), %g4
    426         ld       [%g4+%lo(SYM(_ISR_Vector_table))], %g4
     426        or       %g4, %lo(SYM(_ISR_Vector_table)), %g4
    427427        and      %l3, 0xFF, %g5         ! remove synchronous trap indicator
    428428        sll      %g5, 2, %g5            ! g5 = offset into table
  • c/src/lib/libcpu/sparc64/shared/score/interrupt.S

    ra16af0b3 r03b7789  
    250250     */
    251251    setx  SYM(_ISR_Vector_table), %o5, %g1
    252     ldx      [%g1], %g1
    253252    and      %g2, 0x1FF, %o5        ! remove synchronous trap indicator
    254253    sll      %o5, 3, %o5            ! o5 = offset into table
  • cpukit/sapi/include/confdefs.h

    ra16af0b3 r03b7789  
    22852285
    22862286/**
    2287  * On architectures that use Simple Vectored Interrupts, it is RTEMS
    2288  * responsibility to allocate the vector table.  This avoids reserving
    2289  * the memory on architectures that use the Programmable Interrupt
    2290  * Controller Vectored Interrupts.
    2291  */
    2292 #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
    2293   /*
    2294    *  This is a (hopefully) temporary hack.  On the mips, the number of
    2295    *  vectors is NOT statically defined.  But it has to be statically
    2296    *  defined for this to work.  This is an issue looking for a nice
    2297    *  solution.
    2298    */
    2299   #if defined(__mips__)
    2300     #define CONFIGURE_INTERRUPT_VECTOR_TABLE \
    2301       _Configure_From_workspace( (sizeof(ISR_Handler_entry) * 256))
    2302   #else
    2303     #define CONFIGURE_INTERRUPT_VECTOR_TABLE \
    2304       _Configure_From_workspace( \
    2305         (sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS))
    2306   #endif
    2307 #else
    2308   #define CONFIGURE_INTERRUPT_VECTOR_TABLE 0
    2309 #endif
    2310 
    2311 /**
    23122287 * RTEMS uses two instance of an internal mutex class.  This accounts
    23132288 * for these mutexes.
     
    23382313#define CONFIGURE_MEMORY_FOR_SYSTEM_OVERHEAD \
    23392314  ( CONFIGURE_MEMORY_FOR_IDLE_TASK +                /* IDLE and stack */ \
    2340     CONFIGURE_INTERRUPT_VECTOR_TABLE +             /* interrupt vectors */ \
    23412315    CONFIGURE_INTERRUPT_STACK_MEMORY +             /* interrupt stack */ \
    23422316    CONFIGURE_API_MUTEX_MEMORY                     /* allocation mutex */ \
     
    27562730
    27572731    /* System overhead pieces */
    2758     uint32_t INTERRUPT_VECTOR_TABLE;
    27592732    uint32_t INTERRUPT_STACK_MEMORY;
    27602733    uint32_t MEMORY_FOR_IDLE_TASK;
     
    28112784
    28122785    /* System overhead pieces */
    2813     CONFIGURE_INTERRUPT_VECTOR_TABLE,
    28142786    CONFIGURE_INTERRUPT_STACK_MEMORY,
    28152787    CONFIGURE_MEMORY_FOR_IDLE_TASK,
  • cpukit/score/cpu/arm/rtems/score/cpu.h

    ra16af0b3 r03b7789  
    171171
    172172#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
    173 
    174 #define CPU_INTERRUPT_NUMBER_OF_VECTORS 8
    175 
    176 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
    177173
    178174#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
  • cpukit/score/cpu/bfin/cpu_asm.S

    ra16af0b3 r03b7789  
    360360
    361361        [--sp] = r2;
    362         p0.h = SYM(_ISR_Vector_table);
    363         p0.l = SYM(_ISR_Vector_table);
    364         r2 = [p0];
     362        r2.h = SYM(_ISR_Vector_table);
     363        r2.l = SYM(_ISR_Vector_table);
    365364        r1 = r0 << 2;
    366365        r1 = r1 + r2;
  • cpukit/score/cpu/h8300/cpu_asm.S

    ra16af0b3 r03b7789  
    134134/* Vector to ISR */
    135135
    136         mov.l   @SYM(_ISR_Vector_table),er1
    137136        mov             er0,er2 ; copy vector
    138137        shll.l  er2
    139138        shll.l  er2             ; vector = vector * 4 (sizeof(int))
    140         add.l   er2,er1
    141     mov.l       @er1,er1
     139        mov.l   @(SYM(_ISR_Vector_table), er2),er1
    142140        jsr             @er1    ; er0 = arg1 =vector
    143141       
  • cpukit/score/cpu/i386/rtems/score/cpu.h

    ra16af0b3 r03b7789  
    317317
    318318/*
    319  *  i386 family supports 256 distinct vectors.
    320  */
    321 
    322 #define CPU_INTERRUPT_NUMBER_OF_VECTORS      256
    323 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER  (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
    324 
    325 /*
    326319 *  This is defined if the port has a special way to report the ISR nesting
    327320 *  level.  Most ports maintain the variable _ISR_Nest_level.
  • cpukit/score/cpu/m68k/cpu_asm.S

    ra16af0b3 r03b7789  
    277277        addql   #1,ISR_NEST_LEVEL        | one nest level deeper
    278278
    279         movel   SYM (_ISR_Vector_table),a0 | a0= base of RTEMS table
    280 #if ( M68K_HAS_PREINDEXING == 1 )
    281         movel   (a0,d0:w:1),a0           | a0 = address of user routine
    282 #else
    283         addal   d0,a0                    | a0 = address of vector
    284         movel   (a0),a0                  | a0 = address of user routine
    285 #endif
     279        lea     SYM(_ISR_Vector_table),a0
     280        movel   (a0,d0),a0               | a0 = address of user routine
    286281
    287282        lsrl    #2,d0                    | d0 = vector number
  • cpukit/score/cpu/mips/cpu_asm.S

    ra16af0b3 r03b7789  
    584584
    585585.extern _Thread_Dispatch
    586 .extern _ISR_Vector_table
    587586
    588587/*  void _DBG_Handler()
  • cpukit/score/cpu/mips/rtems/score/cpu.h

    ra16af0b3 r03b7789  
    661661
    662662/*
    663  *  This defines the number of entries in the ISR_Vector_table managed
    664  *  by RTEMS.
    665  */
    666 
    667 extern unsigned int mips_interrupt_number_of_vectors;
    668 #define CPU_INTERRUPT_NUMBER_OF_VECTORS      (mips_interrupt_number_of_vectors)
    669 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER  (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
    670 
    671 /*
    672663 *  Should be large enough to run all RTEMS tests.  This ensures
    673664 *  that a "reasonable" small application should not have any problems.
  • cpukit/score/cpu/nios2/Makefile.am

    ra16af0b3 r03b7789  
    3434libscorecpu_a_SOURCES += nios2-iic-irq.c
    3535libscorecpu_a_SOURCES += nios2-initialize.c
    36 libscorecpu_a_SOURCES += nios2-initialize-vectors.c
    3736libscorecpu_a_SOURCES += nios2-isr-get-level.c
    3837libscorecpu_a_SOURCES += nios2-isr-install-raw-handler.c
  • cpukit/score/cpu/nios2/rtems/score/cpu.h

    ra16af0b3 r03b7789  
    193193} CPU_Exception_frame;
    194194
    195 void _CPU_Initialize_vectors( void );
     195#define _CPU_Initialize_vectors()
    196196
    197197/**
  • cpukit/score/cpu/no_cpu/rtems/score/cpu.h

    ra16af0b3 r03b7789  
    687687 * @ingroup CPUInterrupt
    688688 *
    689  * This defines the number of entries in the @ref _ISR_Vector_table managed
    690  * by RTEMS.
    691  *
    692  * Port Specific Information:
    693  *
    694  * XXX document implementation including references if appropriate
     689 * This defines the number of entries in the _ISR_Vector_table managed by RTEMS
     690 * in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to TRUE.  It must be a
     691 * compile-time constant.
     692 *
     693 * It must be undefined in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to
     694 * FALSE.
    695695 */
    696696#define CPU_INTERRUPT_NUMBER_OF_VECTORS      32
     
    699699 * @ingroup CPUInterrupt
    700700 *
    701  * This defines the highest interrupt vector number for this port.
     701 * This defines the highest interrupt vector number for this port in case
     702 * CPU_SIMPLE_VECTORED_INTERRUPTS is defined to TRUE.  It must be less than
     703 * CPU_INTERRUPT_NUMBER_OF_VECTORS.  It may be not a compile-time constant.
     704 *
     705 * It must be undefined in case CPU_SIMPLE_VECTORED_INTERRUPTS is defined to
     706 * FALSE.
    702707 */
    703708#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER  (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
  • cpukit/score/cpu/powerpc/rtems/score/cpu.h

    ra16af0b3 r03b7789  
    598598
    599599#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
    600 
    601 /*
    602  *  This defines the number of entries in the ISR_Vector_table managed
    603  *  by RTEMS.
    604  *
    605  *  NOTE: CPU_INTERRUPT_NUMBER_OF_VECTORS and
    606  *        CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER are only used on
    607  *        Simple Vectored Architectures and thus are not defined
    608  *        for this architecture.
    609  */
    610600
    611601/*
  • cpukit/score/cpu/v850/rtems/score/cpu.h

    ra16af0b3 r03b7789  
    550550#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
    551551
    552 /* XXX this should not be needed on PIC architectures */
    553 /* XXX evaluate removing it */
    554 #if 0
    555 /**
    556  * This defines the number of entries in the @ref _ISR_Vector_table managed
    557  * by RTEMS.
    558  *
    559  * Port Specific Information:
    560  *
    561  * XXX document implementation including references if appropriate
    562  */
    563 #define CPU_INTERRUPT_NUMBER_OF_VECTORS      32
    564 #endif
    565 
    566 /**
    567  * This defines the highest interrupt vector number for this port.
    568  */
    569 #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER  (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
    570 
    571552/**
    572553 * This is defined if the port has a special way to report the ISR nesting
  • cpukit/score/include/rtems/score/isr.h

    ra16af0b3 r03b7789  
    7272
    7373/**
    74  *  This constant promotes out the number of vectors truly supported by
    75  *  the current CPU being used.  This is usually the number of distinct vectors
    76  *  the cpu can vector.
    77  */
    78 #define ISR_NUMBER_OF_VECTORS                CPU_INTERRUPT_NUMBER_OF_VECTORS
    79 
    80 /**
    81  *  This constant promotes out the highest valid interrupt vector number.
    82  */
    83 #define ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER  CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER
    84 
    85 /**
    8674 *  The following declares the Vector Table.  Application
    8775 *  interrupt service routines are vectored by the ISR Handler via this table.
    8876 */
    89 SCORE_EXTERN ISR_Handler_entry *_ISR_Vector_table;
     77extern ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ];
    9078#endif
    9179
  • cpukit/score/src/isr.c

    ra16af0b3 r03b7789  
    2727#include <rtems/config.h>
    2828
     29#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
     30  ISR_Handler_entry _ISR_Vector_table[ CPU_INTERRUPT_NUMBER_OF_VECTORS ];
     31#elif defined(CPU_INTERRUPT_NUMBER_OF_VECTORS)
     32  #error "CPU_INTERRUPT_NUMBER_OF_VECTORS is defined for non-simple vectored interrupts"
     33#elif defined(CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER)
     34  #error "CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER is defined for non-simple vectored interrupts"
     35#endif
     36
    2937void _ISR_Handler_initialization( void )
    3038{
     
    3240
    3341#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
    34   _ISR_Vector_table = _Workspace_Allocate_or_fatal_error(
    35      sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS
    36   );
    37 
    3842  _CPU_Initialize_vectors();
    3943#endif
  • testsuites/sptests/spfatal07/testcase.h

    ra16af0b3 r03b7789  
    3838          INTERNAL_ERROR_INTERRUPT_STACK_TOO_SMALL
    3939
    40 #if CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE
    41   #define CONFIGURE_MEMORY_OVERHEAD (sizeof(ISR_Handler_entry) * ISR_NUMBER_OF_VECTORS)
    42 #endif
    43 
    4440#if CPU_ALLOCATE_INTERRUPT_STACK == TRUE
    4541  #define CONFIGURE_INTERRUPT_STACK_SIZE (STACK_MINIMUM_SIZE - 1)
  • testsuites/sptests/spintr_err01/init.c

    ra16af0b3 r03b7789  
    3737    status = rtems_interrupt_catch(
    3838      Service_routine,
    39       ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER + 10,
     39      CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER + 1,
    4040      &old_service_routine
    4141    );
Note: See TracChangeset for help on using the changeset viewer.