Changeset 033ec54 in rtems


Ignore:
Timestamp:
Aug 4, 1997, 9:49:47 PM (25 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
02d0880
Parents:
b739617
Message:

Modified to reflect changes in mc68681.h header file.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • c/src/lib/libbsp/m68k/idp/console/duart.c

    rb739617 r033ec54  
    2323##########################################################*/
    2424
    25 #include "mc68230.h"
    26 #include "mc68681.h"
    27 #include "ringbuf.h"
    28 #include "rtems.h"
    29 #include "bsp.h"
     25#include <bsp.h>
     26#include <ringbuf.h>
    3027
    3128rtems_isr C_Receive_ISR(rtems_vector_number vector);
    … …  
    4340volatile void init_pit()
    4441{
    45         /* Disable ports A & B while configuring PIT */
    46         MC68681_WRITE(DUART_IMR, 0x00);         /* disable imr */
    47         MC68681_WRITE(DUART_CRA, 0x08);         /* disable port a transmitter */
    48         MC68681_WRITE(DUART_CRA, 0x02);         /* disable port a receiver */
    49         MC68681_WRITE(DUART_CRB, 0x08);         /* disable port b transmitter */
    50         MC68681_WRITE(DUART_CRB, 0x02);         /* disable port b receiver */
    51 
    52         /* install ISR for ports A and B */
    53         set_vector(C_Receive_ISR, (VECT+H3VECT), 1);
    54 
    55         /* initialize pit */
    56         MC68230_WRITE(PGCR, 0x00);  /* set mode to 0 -- disable all ports */
    57         MC68230_WRITE(PSRR, 0x18);      /* set up pirq and piack */
    58         MC68230_WRITE(PBDDR, 0x00);     /* all pins on port b are input */
    59         MC68230_WRITE(PBCR, 0x82);      /* submode 1x, h3 interrupt enabled */
    60         MC68230_WRITE(PIVR, VECT);      /* setup pivr */
    61         MC68230_WRITE(PGCR, 0x20);      /* turn on all ports */
    62 
    63         /* For some reason, the reset of receiver/transmitter only works for
    64        the first time around -- it garbles the output otherwise (e.g., sp21) */
    65         if (!Pit_initialized)
    66         {
    67            /* now initialize the duart registers on port b */
    68            /* WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE */
    69            MC68681_WRITE(DUART_CRB, 0x30);              /* reset tx, channel b */
    70            MC68681_WRITE(DUART_CRB, 0x20);              /* reset rx, channel b */
    71            MC68681_WRITE(DUART_CRB, 0x10);              /* reset mr pointer, channel b */
    72 
    73            /* now initialize the duart registers on port a */
    74            /* WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE */
    75            MC68681_WRITE(DUART_CRA, 0x30);              /* reset tx, channel a */
    76            MC68681_WRITE(DUART_CRA, 0x20);              /* reset rx, channel a */
    77            MC68681_WRITE(DUART_CRA, 0x10);              /* reset mr pointer, channel a */
    78            Pit_initialized = 1;
    79         }
    80 
    81         /* init the general registers of the duart */
    82         MC68681_WRITE(DUART_IVR, 0x0f);         /* init ivr */
    83         MC68681_WRITE(DUART_IMR, 0x22);         /* init imr */
    84         MC68681_WRITE(DUART_ACR, 0x00);         /* init acr */
    85         MC68681_WRITE(DUART_CTUR, 0x00);        /* init ctur */
    86         MC68681_WRITE(DUART_CTLR, 0x02);        /* init ctlr */
    87         MC68681_WRITE(DUART_OPCR, 0x00);        /* init opcr */
    88         MC68681_WRITE(DUART_OPRSET, 0x01);      /* init cts */
    89 
    90         /* init the actual serial port for port a */
    91         MC68681_WRITE(DUART_CSRA, 0xbb);        /* init csra -- 9600 baud */
    92         MC68681_WRITE(DUART_MR1A, 0x13);        /* init mr1a */
    93         MC68681_WRITE(DUART_MR2A, 0x07);        /* init mr2a */
    94         MC68681_WRITE(DUART_CRA, 0x05);         /* init cra */
    95 
    96         /* init the actual serial port for port b */
    97         MC68681_WRITE(DUART_CSRB, 0xbb);        /* init csrb -- 9600 baud */
     42  /*
     43   *  ports A & B while configuring PIT by:
     44   *
     45   *    + disable Interrupt Mask Register
     46   *    + disable port A transmitter
     47   *    + disable port A receiver
     48   *    + disable port B transmitter
     49   *    + disable port B receiver
     50   */
     51
     52  MC68681_WRITE(MC68681_INTERRUPT_MASK_REG, 0x00);
     53  MC68681_WRITE(MC68681_COMMAND_REG_A ,MC68681_MODE_REG_DISABLE_TX);
     54  MC68681_WRITE(MC68681_COMMAND_REG_A, MC68681_MODE_REG_DISABLE_RX);
     55  MC68681_WRITE(MC68681_COMMAND_REG_B, MC68681_MODE_REG_DISABLE_TX);
     56  MC68681_WRITE(MC68681_COMMAND_REG_B, MC68681_MODE_REG_DISABLE_RX);
     57
     58  /*
     59   *  install ISR for ports A and B
     60   */
     61  set_vector(C_Receive_ISR, (VECT+H3VECT), 1);
     62
     63  /*
     64   *  initialize pit
     65   *
     66   *  set mode to 0 -- disable all ports
     67   *  set up pirq and piack
     68   *  all pins on port b are input
     69   *  submode 1x, h3 interrupt enabled
     70   *  setup pivr
     71   *  turn on all ports
     72   */
     73  MC68230_WRITE(PGCR, 0x00);
     74  MC68230_WRITE(PSRR, 0x18);
     75  MC68230_WRITE(PBDDR, 0x00);
     76  MC68230_WRITE(PBCR, 0x82);
     77  MC68230_WRITE(PIVR, VECT);
     78  MC68230_WRITE(PGCR, 0x20);
     79
     80  /*
     81   *  For some reason, the reset of receiver/transmitter only works for
     82   *  the first time around -- it garbles the output otherwise
     83   *  (e.g., sp21)
     84   */
     85  if (!Pit_initialized)
     86  {
     87    /*
     88     * initialize the duart registers on port b
     89     * WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE
     90     *
     91     *  reset tx, channel b
     92     *  reset rx, channel b
     93     *  reset mr pointer, ch
     94     */
     95     MC68681_WRITE(MC68681_COMMAND_REG_B, MC68681_MODE_REG_RESET_TX);
     96     MC68681_WRITE(MC68681_COMMAND_REG_B, MC68681_MODE_REG_RESET_RX);
     97     MC68681_WRITE(MC68681_COMMAND_REG_B, MC68681_MODE_REG_RESET_MR_PTR);
     98
     99    /*
     100     * initialize the duart registers on port a
     101     * WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE
     102     *
     103     *  reset tx, channel a
     104     *  reset rx, channel a
     105     *  reset mr pointer, ch
     106     */
     107     MC68681_WRITE(MC68681_COMMAND_REG_A, MC68681_MODE_REG_RESET_TX);
     108     MC68681_WRITE(MC68681_COMMAND_REG_A, MC68681_MODE_REG_RESET_RX);
     109     MC68681_WRITE(MC68681_COMMAND_REG_A, MC68681_MODE_REG_RESET_MR_PTR);
     110
     111     Pit_initialized = 1;
     112  }
     113
     114  /*
     115   * Init the general registers of the duart
     116   *
     117   * init ivr
     118   * init imr
     119   * init acr
     120   * init ctur
     121   * init ctlr
     122   * init opcr
     123   * init cts
     124   */
     125  MC68681_WRITE(MC68681_INTERRUPT_VECTOR_REG, 
     126                MC68681_INTERRUPT_VECTOR_INIT);
     127  MC68681_WRITE(MC68681_INTERRUPT_MASK_REG,
     128                MC68681_IR_RX_READY_A | MC68681_IR_RX_READY_B); 
     129  MC68681_WRITE(MC68681_AUX_CTRL_REG, MC68681_CLEAR);
     130  MC68681_WRITE(MC68681_COUNTER_TIMER_UPPER_REG, 0x00);
     131  MC68681_WRITE(MC68681_COUNTER_TIMER_LOWER_REG, 0x02);
     132  MC68681_WRITE(MC68681_OUTPUT_PORT_CONFIG_REG, MC68681_CLEAR);
     133  MC68681_WRITE(MC68681_OUTPUT_PORT_SET_REG, 0x01);
     134
     135  /*
     136   * init the actual serial port for port a
     137   *
     138   * Set Baud Rate to 9600
     139   * Set Stop bit length of 1
     140   * enable Transmit and receive
     141   */
     142  MC68681_WRITE(MC68681_CLOCK_SELECT_REG_A, MC68681_BAUD_RATE_MASK_9600);
     143  MC68681_WRITE(MC68681_MODE_REG_1A,
     144                (MC68681_8BIT_CHARS | MC68681_NO_PARITY));
     145  MC68681_WRITE(MC68681_MODE_REG_2A,MC68681_STOP_BIT_LENGTH_1);
     146  MC68681_WRITE(MC68681_COMMAND_REG_A,
     147                (MC68681_MODE_REG_ENABLE_TX | MC68681_MODE_REG_ENABLE_RX));
     148
     149  /*
     150   * init the actual serial port for port b
     151   * init csrb -- 9600 baud
     152   */
     153  MC68681_WRITE(MC68681_CLOCK_SELECT_REG_B, MC68681_BAUD_RATE_MASK_9600);
     154
     155
    98156#define EIGHT_BITS_NO_PARITY
    99157#ifdef EIGHT_BITS_NO_PARITY
    100         MC68681_WRITE(DUART_MR1B, 0x13);        /* init mr1b */
    101 #else /* 7 bits, even parity */
    102         MC68681_WRITE(DUART_MR1B, 0x02);        /* init mr1b */
     158  /*
     159   * Set 8 Bit characters with no parity
     160   */
     161  MC68681_WRITE(MC68681_MODE_REG_1B,
     162                (MC68681_NO_PARITY | MC68681_8BIT_CHARS) );
     163#else
     164  /*
     165   * Set 7 Bit Characters with parity
     166   */
     167  MC68681_WRITE(MC68681_MODE_REG_1B,
     168                (MC68681_WITH_PARITY |  MC68681_7BIT_CHARS) );
    103169#endif
    104         MC68681_WRITE(DUART_MR2B, 0x07);        /* init mr2b -- one stop bit */
    105         MC68681_WRITE(DUART_CRB, 0x05);         /* init crb */
     170
     171
     172  /*
     173   * Set Stop Bit length to 1
     174   * Disable Recieve and transmit on B
     175   */
     176  MC68681_WRITE(MC68681_MODE_REG_2B,MC68681_STOP_BIT_LENGTH_1);
     177  MC68681_WRITE(MC68681_COMMAND_REG_B,
     178                (MC68681_MODE_REG_ENABLE_TX | MC68681_MODE_REG_ENABLE_RX) );
    106179}
    107180
    … …  
    111184rtems_isr C_Receive_ISR(rtems_vector_number vector)
    112185{
    113         volatile unsigned char *_addr;
    114 
    115         _addr = (unsigned char *) (PIT_ADDR + PITSR);
    116         *_addr = 0x04;          /* clear pit interrupt */
    117 
    118         /* Let's check port A first for input */
    119         _addr = (unsigned char *) (DUART_ADDR + DUART_SRA);
    120         if (*_addr & 0x01)      /* extract rcvrdy on port A */
    121         {
    122                 /* Read input on port A */
    123                 _addr = (unsigned char *) (DUART_ADDR + DUART_RBA);
    124                 Ring_buffer_Add_character( &Buffer[ 0 ], *_addr );
    125         }
    126         else    /* If not on port A, let's check port B */
    127         {
    128                 _addr = (unsigned char *) (DUART_ADDR + DUART_SRB);
    129                 if (*_addr & 0x01)      /* extract rcvrdy on port B */
    130                 {
    131                         /* Read input on port B */
    132                         _addr = (unsigned char *) (DUART_ADDR + DUART_RBB);
    133                         Ring_buffer_Add_character( &Buffer[ 1 ], *_addr );
    134                 }
    135                 /* if not ready on port A or port B, must be an error */
    136                 /* if error, get out so that fifo is undisturbed */
    137         }
     186  volatile unsigned char *_addr;
     187
     188  /*
     189   *  Clear pit interrupt.
     190   */
     191  _addr = (unsigned char *) (PIT_ADDR + PITSR);
     192  *_addr = 0x04;
     193
     194  /*
     195   *  check port A first for input
     196   *     extract rcvrdy on port B
     197   *     set ptr to recieve buffer and read character into ring buffer
     198   */
     199  _addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_A);
     200  if (*_addr & MC68681_RX_READY)  /* extract rcvrdy on port A */
     201  {
     202    _addr = (unsigned char *) (DUART_ADDR + MC68681_RECEIVE_BUFFER_A);
     203    Ring_buffer_Add_character( &Buffer[ 0 ], *_addr );
     204  }
     205
     206  /*
     207   *  If not on port A, let's check port B
     208   *     extract rcvrdy on port B
     209   *     set ptr to recieve buffer and read character into ring buffer
     210   */
     211  else
     212  {
     213    _addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_B);
     214    if (*_addr & MC68681_RX_READY)  /* extract rcvrdy on port B */
     215    {
     216      _addr = (unsigned char *) (DUART_ADDR + MC68681_RECEIVE_BUFFER_B);
     217      Ring_buffer_Add_character( &Buffer[ 1 ], *_addr );
     218    }
     219
     220    /*
     221     * if not ready on port A or port B, must be an error
     222     * if error, get out so that fifo is undisturbed
     223     */
     224  }
    138225}
    139226
    … …  
    144231void transmit_char(char ch)
    145232{
    146         volatile unsigned char *_addr;
    147 
    148         /* Get SRA (extract txrdy) */
    149         _addr = (unsigned char *) (DUART_ADDR + DUART_SRA);
    150         while (!(*_addr & 0x04))
    151         {
    152         }
    153 
    154         /* transmit character over port A */
    155         MC68681_WRITE(DUART_TBA, ch);
    156 }
     233  volatile unsigned char *_addr;
     234
     235  /*
     236   * Get SRA (extract txrdy)
     237   */
     238  _addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_A);
     239  while (!(*_addr & MC68681_TX_READY))
     240  {
     241  }
     242
     243  /*
     244   * transmit character over port A
     245   */
     246  MC68681_WRITE(MC68681_TRANSMIT_BUFFER_A, ch);
     247}
     248
    157249
    158250/*#####################################################################
    … …  
    162254void transmit_char_portb(char ch)
    163255{
    164         volatile unsigned char *_addr;
    165 
    166         /* Get SRB (extract txrdy) */
    167         _addr = (unsigned char *) (DUART_ADDR + DUART_SRB);
    168         while (!(*_addr & 0x04))
    169         {
    170         }
    171 
    172         /* transmit character over port B */
    173         MC68681_WRITE(DUART_TBB, ch);
    174 }
     256  volatile unsigned char *_addr;
     257
     258  /*
     259   * Get SRB (extract txrdy)
     260   */
     261  _addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_B);
     262  while (!(*_addr &  MC68681_TX_READY))
     263  {
     264  }
     265
     266  /*
     267   * transmit character over port B
     268   */
     269  MC68681_WRITE(MC68681_TRANSMIT_BUFFER_B, ch);
     270}
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