Changeset 00d95ce0 in rtems for c/src


Ignore:
Timestamp:
05/19/11 12:03:09 (13 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
f6083f0
Parents:
20e3bf7
Message:

2011-05-19 Sebastian Huber <sebastian.huber@…>

  • shared/include/powerpc-utility.h: API changes for ppc_*_cache_*() functions.
Location:
c/src/lib/libcpu/powerpc
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/powerpc/ChangeLog

    r20e3bf7 r00d95ce0  
     12011-05-19      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * shared/include/powerpc-utility.h: API changes for ppc_*_cache_*()
     4        functions.
     5
    162011-05-11      Sebastian Huber <sebastian.huber@embedded-brains.de>
    27
  • c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h

    r20e3bf7 r00d95ce0  
    231231static inline void ppc_data_cache_block_flush_2(
    232232  void *base,
    233   void *offset
     233  uintptr_t offset
    234234)
    235235{
     
    254254static inline void ppc_data_cache_block_invalidate_2(
    255255  void *base,
    256   void *offset
     256  uintptr_t offset
    257257)
    258258{
     
    265265}
    266266
    267 static inline void ppc_data_cache_block_store(void *addr)
     267static inline void ppc_data_cache_block_store(const void *addr)
    268268{
    269269  __asm__ volatile (
     
    275275
    276276static inline void ppc_data_cache_block_store_2(
     277  const void *base,
     278  uintptr_t offset
     279)
     280{
     281  __asm__ volatile (
     282    "dcbst %0, %1"
     283    :
     284    : "b" (base), "r" (offset)
     285  );
     286}
     287
     288static inline void ppc_data_cache_block_touch(const void *addr)
     289{
     290  __asm__ volatile (
     291    "dcbt 0, %0"
     292    :
     293    : "r" (addr)
     294  );
     295}
     296
     297static inline void ppc_data_cache_block_touch_2(
     298  const void *base,
     299  uintptr_t offset
     300)
     301{
     302  __asm__ volatile (
     303    "dcbt %0, %1"
     304    :
     305    : "b" (base), "r" (offset)
     306  );
     307}
     308
     309static inline void ppc_data_cache_block_touch_for_store(const void *addr)
     310{
     311  __asm__ volatile (
     312    "dcbtst 0, %0"
     313    :
     314    : "r" (addr)
     315  );
     316}
     317
     318static inline void ppc_data_cache_block_touch_for_store_2(
     319  const void *base,
     320  uintptr_t offset
     321)
     322{
     323  __asm__ volatile (
     324    "dcbtst %0, %1"
     325    :
     326    : "b" (base), "r" (offset)
     327  );
     328}
     329
     330static inline void ppc_data_cache_block_clear_to_zero(void *addr)
     331{
     332  __asm__ volatile (
     333    "dcbz 0, %0"
     334    :
     335    : "r" (addr)
     336    : "memory"
     337  );
     338}
     339
     340static inline void ppc_data_cache_block_clear_to_zero_2(
    277341  void *base,
    278   void *offset
     342  uintptr_t offset
    279343)
    280344{
    281345  __asm__ volatile (
    282     "dcbst %0, %1"
     346    "dcbz %0, %1"
    283347    :
    284348    : "b" (base), "r" (offset)
     
    287351}
    288352
    289 static inline void ppc_data_cache_block_touch(void *addr)
    290 {
    291   __asm__ volatile (
    292     "dcbt 0, %0"
    293     :
    294     : "r" (addr)
    295   );
    296 }
    297 
    298 static inline void ppc_data_cache_block_touch_2(
    299   void *base,
    300   void *offset
    301 )
    302 {
    303   __asm__ volatile (
    304     "dcbt %0, %1"
    305     :
    306     : "b" (base), "r" (offset)
    307   );
    308 }
    309 
    310 static inline void ppc_data_cache_block_touch_for_store(void *addr)
    311 {
    312   __asm__ volatile (
    313     "dcbtst 0, %0"
    314     :
    315     : "r" (addr)
    316   );
    317 }
    318 
    319 static inline void ppc_data_cache_block_touch_for_store_2(
    320   void *base,
    321   void *offset
    322 )
    323 {
    324   __asm__ volatile (
    325     "dcbtst %0, %1"
    326     :
    327     : "b" (base), "r" (offset)
    328   );
    329 }
    330 
    331 static inline void ppc_data_cache_block_clear_to_zero(void *addr)
    332 {
    333   __asm__ volatile (
    334     "dcbz 0, %0"
    335     :
    336     : "r" (addr)
    337     : "memory"
    338   );
    339 }
    340 
    341 static inline void ppc_data_cache_block_clear_to_zero_2(
    342   void *base,
    343   void *offset
    344 )
    345 {
    346   __asm__ volatile (
    347     "dcbz %0, %1"
    348     :
    349     : "b" (base), "r" (offset)
    350     : "memory"
    351   );
    352 }
    353 
    354353static inline void ppc_instruction_cache_block_invalidate(void *addr)
    355354{
     
    363362static inline void ppc_instruction_cache_block_invalidate_2(
    364363  void *base,
    365   void *offset
     364  uintptr_t offset
    366365)
    367366{
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