Changeset 00bf7745 in rtems


Ignore:
Timestamp:
Mar 14, 2004, 1:28:08 AM (17 years ago)
Author:
Chris Johns <chrisj@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
528da1c
Parents:
27192b8
Message:

Changes made to support the DIMMPC. This is a pc396 target with IO port
support.
Minor formating clean up.
Add documentation to the header file.

Location:
c/src/libchip/network
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/libchip/network/cs8900.c

    r27192b8 r00bf7745  
    11/*
    22  ------------------------------------------------------------------------
    3   $Id$
     3  cs8900.c,v 1.5 2002/11/13 15:34:39 joel Exp
    44  ------------------------------------------------------------------------
    5  
    6   My Right Boot, a boot ROM for embedded hardware.
    7  
     5
    86  Copyright Cybertec Pty Ltd, 2000
    97  All rights reserved Cybertec Pty Ltd, 2000
    10  
     8
     9  Port to the DIMM PC copyright (c) 2004 Angelo Fraietta
     10   This project has been assisted by the Commonwealth Government
     11   through the Australia Council, its arts funding and advisory body.
     12
    1113  COPYRIGHT (c) 1989-1998.
    1214  On-Line Applications Research Corporation (OAR).
     15  Copyright assigned to U.S. Government, 1994.
    1316
    1417  The license and distribution terms for this file may be
    1518  found in the file LICENSE in this distribution or at
    16   http://www.rtems.com/license/LICENSE.
     19  http://www.OARcorp.com/rtems/license.html.
    1720
    1821  ------------------------------------------------------------------------
    1922
    20   CS8900 net boot driver.
    21 
     23  CS8900 RTEMS driver.
     24
     25  See the header file for details.
     26   
    2227*/
    2328
     
    2631#include <stdio.h>
    2732
    28 /* #include <target.h>
    29   chris explain what this is to contain and provide a default one */
    3033#include "cs8900.h"
    31 
    32 /***********************************************************
    33  ***********************************************************
    34            BEGIN SECTION OF DEFAULT DEFINES
    35  ***********************************************************
    36  ***********************************************************/
    37 
    38 /*
    39  * Number of devices supported by this driver
    40  */
    41 #ifndef CS8900_DEVICES
    42 #define CS8900_DEVICES 1
    43 #endif
    44 
    45 /*
    46  *  This variable really should come from a per device configuration
    47  *  table so the base can vary by adapter.
    48  */
    49 
    50 #ifndef CS8900_IO_BASE
    51 extern unsigned int bsp_cs8900_io_base;
    52 #define CS8900_IO_BASE bsp_cs8900_io_base
    53 #endif
    54 
    55 /*
    56  *  This variable really should come from a per device configuration
    57  *  table so the base can vary by adapter.
    58  */
    59 
    60 #ifndef CS8900_MEMORY_BASE
    61 extern unsigned int bsp_cs8900_memory_base;
    62 #define CS8900_MEMORY_BASE bsp_cs8900_memory_base
    63 #endif
    64 
    65 /*
    66  *  This could go to a BSP provided callout.
    67  */
    68 #ifndef WATCHDOG_TOGGLE
    69 #define WATCHDOG_TOGGLE()
    70 #endif
    71 
    72 /*
    73  *  This variable really should come from a per device configuration
    74  *  table so the base can vary by adapter.
    75  *
    76  *  chris this is probably not a good default  --joel
    77  */
    78 
    79 #ifndef CS8900_RX_QUEUE_SIZE
    80 #define CS8900_RX_QUEUE_SIZE 1
    81 #endif
    82 
    83 /***********************************************************
    84  ***********************************************************
    85               END SECTION OF DEFAULT DEFINES
    86  ***********************************************************
    87  ***********************************************************/
    8834
    8935/*
     
    10551
    10652/*
    107  * Our local data.
    108  */
    109 
    110 static cs8900_device cs8900[CS8900_DEVICES];
    111 
    112 /*
    11353 * IO Packet Page inteface.
    11454 */
    11555
    11656static inline unsigned short
    117 io_pp_get_reg_16 (int dev, unsigned short reg)
    118 {
    119   cs8900_io_set_reg (dev, CS8900_IO_BASE + CS8900_IO_PACKET_PAGE_PTR,
     57io_pp_get_reg_16 (cs8900_device *cs, unsigned short reg)
     58{
     59  rtems_interrupt_level level;
     60  unsigned short        data;
     61  rtems_interrupt_disable (level);
     62  cs8900_io_set_reg (cs, CS8900_IO_PACKET_PAGE_PTR,
    12063                     0x3000 | CS8900_PPP_AUTO_INCREMENT | reg);
    121   return cs8900_io_get_reg (dev, CS8900_IO_BASE + CS8900_IO_PP_DATA_PORT0);
     64  data = cs8900_io_get_reg (cs, CS8900_IO_PP_DATA_PORT0);
     65  rtems_interrupt_enable (level);
     66  return data;
    12267}
    12368
    12469static inline unsigned long
    125 io_pp_get_reg_32 (int dev, unsigned short reg)
    126 {
    127   cs8900_io_set_reg (dev, CS8900_IO_BASE + CS8900_IO_PACKET_PAGE_PTR,
     70io_pp_get_reg_32 (cs8900_device *cs, unsigned short reg)
     71{
     72  rtems_interrupt_level level;
     73  unsigned long         data;
     74  rtems_interrupt_disable (level);
     75  cs8900_io_set_reg (cs, CS8900_IO_PACKET_PAGE_PTR,
    12876                     0x3000 | CS8900_PPP_AUTO_INCREMENT | reg);
    129   return ((cs8900_io_get_reg (dev, CS8900_IO_BASE + CS8900_IO_PP_DATA_PORT0) << 16) |
    130           cs8900_io_get_reg (dev, CS8900_IO_BASE + CS8900_IO_PP_DATA_PORT1));
     77  data =  ((cs8900_io_get_reg (cs, CS8900_IO_PP_DATA_PORT0) << 16) |
     78           cs8900_io_get_reg (cs, CS8900_IO_PP_DATA_PORT1));
     79  rtems_interrupt_enable (level);
     80  return data;
    13181}
    13282
    13383static inline void
    134 io_pp_set_reg_16 (int dev, unsigned short reg, unsigned short data)
    135 {
    136   cs8900_io_set_reg (dev, CS8900_IO_BASE + CS8900_IO_PACKET_PAGE_PTR,
     84io_pp_set_reg_16 (cs8900_device *cs, unsigned short reg, unsigned short data)
     85{
     86  rtems_interrupt_level level;
     87  rtems_interrupt_disable (level);
     88  cs8900_io_set_reg (cs, CS8900_IO_PACKET_PAGE_PTR,
    13789                     0x3000 | CS8900_PPP_AUTO_INCREMENT | reg);
    138   cs8900_io_set_reg (dev, CS8900_IO_BASE + CS8900_IO_PP_DATA_PORT0, data);
     90  cs8900_io_set_reg (cs, CS8900_IO_PP_DATA_PORT0, data);
     91  rtems_interrupt_enable (level);
    13992}
    14093
    14194static inline void
    142 io_pp_set_reg_32 (int dev, unsigned short reg, unsigned long data)
    143 {
    144   cs8900_io_set_reg (dev, CS8900_IO_BASE + CS8900_IO_PACKET_PAGE_PTR,
     95io_pp_set_reg_32 (cs8900_device *cs, unsigned short reg, unsigned long data)
     96{
     97  cs8900_io_set_reg (cs, CS8900_IO_PACKET_PAGE_PTR,
    14598                     0x3000 | CS8900_PPP_AUTO_INCREMENT | reg);
    146   cs8900_io_set_reg (dev, CS8900_IO_BASE + CS8900_IO_PP_DATA_PORT0, data >> 16);
    147   cs8900_io_set_reg (dev, CS8900_IO_BASE + CS8900_IO_PP_DATA_PORT1, data);
     99  cs8900_io_set_reg (cs, CS8900_IO_PP_DATA_PORT0, data >> 16);
     100  cs8900_io_set_reg (cs, CS8900_IO_PP_DATA_PORT1, data);
    148101}
    149102
    150103static inline void
    151 io_pp_bit_set_reg_16 (int dev, unsigned short reg, unsigned short mask)
    152 {
    153   io_pp_set_reg_16 (dev, reg, io_pp_get_reg_16 (dev, reg) | mask);
     104io_pp_bit_set_reg_16 (cs8900_device *cs, unsigned short reg, unsigned short mask)
     105{
     106  rtems_interrupt_level level;
     107  rtems_interrupt_disable (level);
     108  io_pp_set_reg_16 (cs, reg, io_pp_get_reg_16 (cs, reg) | mask);
     109  rtems_interrupt_enable (level);
    154110}
    155111
    156112static inline void
    157 io_pp_bit_clear_reg_16 (int dev, unsigned short reg, unsigned short mask)
    158 {
    159   io_pp_set_reg_16 (dev, reg, io_pp_get_reg_16 (dev, reg) & ~mask);
     113io_pp_bit_clear_reg_16 (cs8900_device *cs, unsigned short reg, unsigned short mask)
     114{
     115  rtems_interrupt_level level;
     116  rtems_interrupt_disable (level);
     117  io_pp_set_reg_16 (cs, reg, io_pp_get_reg_16 (cs, reg) & ~mask);
     118  rtems_interrupt_enable (level);
    160119}
    161120
    162121/*
    163122 * Memory Mapped Packet Page interface.
     123 *
     124 * If the BSP does not configure mem_base use the I/O register accesses.
    164125 */
    165126
    166127static inline unsigned short
    167 mem_pp_get_reg (int dev, unsigned short reg)
    168 {
    169   return cs8900_mem_get_reg (dev, CS8900_MEMORY_BASE + reg);
     128mem_pp_get_reg (cs8900_device *cs, unsigned short reg)
     129{
     130  if (!cs->mem_base)
     131    return io_pp_get_reg_16 (cs, reg);
     132  return cs8900_mem_get_reg (cs, reg);
    170133}
    171134
    172135static inline void
    173 mem_pp_set_reg (int dev, unsigned short reg, unsigned short data)
    174 {
    175   cs8900_mem_set_reg (dev, CS8900_MEMORY_BASE + reg, data);
     136mem_pp_set_reg (cs8900_device *cs, unsigned short reg, unsigned short data)
     137{
     138  if (!cs->mem_base)
     139    io_pp_set_reg_16 (cs, reg, data);
     140  else
     141    cs8900_mem_set_reg (cs, reg, data);
    176142}
    177143
    178144static inline void
    179 mem_pp_bit_set_reg (int dev, unsigned short reg, unsigned short mask)
    180 {
    181   mem_pp_set_reg (dev, reg, mem_pp_get_reg (dev, reg) | mask);
     145mem_pp_bit_set_reg (cs8900_device *cs, unsigned short reg, unsigned short mask)
     146{
     147  if (!cs->mem_base)
     148    io_pp_bit_set_reg_16 (cs, reg, mask);
     149  else
     150  {
     151    rtems_interrupt_level level;
     152    rtems_interrupt_disable (level);
     153    mem_pp_set_reg (cs, reg, mem_pp_get_reg (cs, reg) | mask);
     154    rtems_interrupt_enable (level);
     155  }
    182156}
    183157
    184158static inline void
    185 mem_pp_bit_clear_reg (int dev, unsigned short reg, unsigned short mask)
    186 {
    187   mem_pp_set_reg (dev, reg, mem_pp_get_reg (dev, reg) & ~mask);
     159mem_pp_bit_clear_reg (cs8900_device *cs, unsigned short reg, unsigned short mask)
     160{
     161  if (!cs->mem_base)
     162    io_pp_bit_clear_reg_16 (cs, reg, mask);
     163  else
     164  {
     165    rtems_interrupt_level level;
     166    rtems_interrupt_disable (level);
     167    mem_pp_set_reg (cs, reg, mem_pp_get_reg (cs, reg) & ~mask);
     168    rtems_interrupt_enable (level);
     169  }
    188170}
    189171
     
    191173 * Trace defines and control structures.
    192174 */
    193  
     175
    194176#define CS8900_T_INT         (0)
    195177#define CS8900_T_RX_OK       (1)
     
    223205{
    224206  rtems_interrupt_level level;
    225  
     207
    226208  rtems_interrupt_disable (level);
    227  
     209
    228210  if (cs->trace_in < CS8900_TRACE_SIZE)
    229211  {
     
    233215    cs->trace_in++;
    234216  }
    235  
     217
    236218  rtems_interrupt_enable (level);
    237219}
     
    240222#endif
    241223
     224void cs8900_get_mac_addr (cs8900_device *cs, unsigned char *mac_address)
     225{
     226  unsigned short ma;
     227
     228  /*
     229   * Only ever use IO calls for this function as it can be
     230   * called before memory mode has been enabled.
     231   */
     232
     233  ma = io_pp_get_reg_16 (cs, CS8900_PP_IA);
     234  mac_address[0] = ma >> 8;
     235  mac_address[1] = ma;
     236
     237  ma = io_pp_get_reg_16 (cs, CS8900_PP_IA + 2);
     238  mac_address[2] = ma >> 8;
     239  mac_address[3] = ma;
     240
     241  ma = io_pp_get_reg_16 (cs, CS8900_PP_IA + 4);
     242  mac_address[4] = ma >> 8;
     243  mac_address[5] = ma;
     244}
     245
    242246/*
    243247 * Bring the chip online.
     
    249253  unsigned long  prod_id;
    250254  unsigned short status;
    251   int            dev = cs->dev;
    252255
    253256  /*
     
    255258   * We must wait 20msecs.
    256259   */
    257  
    258   io_pp_bit_set_reg_16 (dev, CS8900_PP_SelfCTL, CS8900_SELF_CTRL_RESET);
     260
     261  io_pp_bit_set_reg_16 (cs, CS8900_PP_SelfCTL, CS8900_SELF_CTRL_RESET);
    259262
    260263  rtems_task_wake_after (TOD_MILLISECONDS_TO_TICKS (20));
    261  
    262   status = io_pp_get_reg_16 (dev, CS8900_PP_SelfST);
     264
     265  status = io_pp_get_reg_16 (cs, CS8900_PP_SelfST);
    263266  if (status == 0) {
    264267      printf("Reading status register again\n");
    265       status = io_pp_get_reg_16 (dev, CS8900_PP_SelfST);
    266   }
    267    
     268      status = io_pp_get_reg_16 (cs, CS8900_PP_SelfST);
     269  }
     270
    268271  if (((status & CS8900_SELF_STATUS_INITD) == 0) ||
    269272      ((status & CS8900_SELF_STATUS_INITD) &&
     
    274277            (status & CS8900_SELF_STATUS_INITD) ?
    275278            "EEPROM read/write failed to complete" :
    276             "Failed to complete to reset");     
     279            "Failed to complete to reset");
    277280    return;
    278281  }
    279  
     282
     283  /* Set the RX queue size if not set by the BSP. */
     284
     285  if (cs->rx_queue_size == 0)
     286    cs->rx_queue_size = 10;
     287
    280288  /* Probe the device for its ID */
    281289
    282   prod_id = io_pp_get_reg_32 (dev, CS8900_PP_PROD_ID);
     290  prod_id = io_pp_get_reg_32 (cs, CS8900_PP_PROD_ID);
    283291
    284292  if ((prod_id >> 16) != CS8900_ESIA_ID)
    285293  {
    286     printf ("CS9800: Invalid EISA ID, read product code 0x%08lx\n", prod_id);
     294    printf ("CS8900: Invalid EISA ID, read product code 0x%08lx\n", prod_id);
    287295    return;
    288296  }
     
    290298  if ((prod_id & 0x000000ff) != 0)
    291299  {
    292     printf ("CS9800: Unsupported product id, read product code 0x%08lx\n",
     300    printf ("CS8900: Unsupported product id, read product code 0x%08lx\n",
    293301            prod_id);
    294302    return;
     
    304312   * Switch to memory base accesses as they are faster. No indirect access.
    305313   */
    306  
    307   io_pp_set_reg_16 (dev, CS8900_PP_MEM_BASE, CS8900_MEMORY_BASE);
    308   io_pp_set_reg_16 (dev, CS8900_PP_MEM_BASE + 2, (CS8900_MEMORY_BASE >> 16) & 0xf);
    309  
    310   io_pp_set_reg_16 (dev,
    311                     CS8900_PP_BusCTL,
    312                     CS8900_BUS_CTRL_RESET_RX_DMA |
    313                     CS8900_BUS_CTRL_USE_SA |
    314                     CS8900_BUS_CTRL_MEMORY_ENABLE);
    315   io_pp_set_reg_16 (dev,
    316                     CS8900_PP_BusCTL,
    317                     CS8900_BUS_CTRL_USE_SA |
    318                     CS8900_BUS_CTRL_MEMORY_ENABLE);
     314
     315  if (cs->mem_base)
     316  {
     317    io_pp_set_reg_16 (cs, CS8900_PP_MEM_BASE, cs->mem_base);
     318    io_pp_set_reg_16 (cs, CS8900_PP_MEM_BASE + 2, (cs->mem_base >> 16) & 0xf);
     319
     320    io_pp_set_reg_16 (cs,
     321                      CS8900_PP_BusCTL,
     322                      CS8900_BUS_CTRL_RESET_RX_DMA |
     323                      CS8900_BUS_CTRL_USE_SA |
     324                      CS8900_BUS_CTRL_MEMORY_ENABLE);
     325    io_pp_set_reg_16 (cs,
     326                      CS8900_PP_BusCTL,
     327                      CS8900_BUS_CTRL_USE_SA |
     328                      CS8900_BUS_CTRL_MEMORY_ENABLE);
     329  }
    319330
    320331  /*
     
    328339   */
    329340
    330   mem_pp_set_reg (dev, CS8900_PP_LineCFG, CS8900_LINE_CTRL_10BASET);
    331  
     341  mem_pp_set_reg (cs, CS8900_PP_LineCFG, CS8900_LINE_CTRL_10BASET);
     342
    332343  /*
    333344   * Ask the user for the MAC address, the program into the device.
     
    335346
    336347#define MACO(o) cs->arpcom.ac_enaddr[o]
    337  
    338   mem_pp_set_reg (dev, CS8900_PP_IA,
     348
     349  mem_pp_set_reg (cs, CS8900_PP_IA,
    339350                  (((unsigned int) MACO (1)) << 8) |
    340351                  ((unsigned int) MACO (0)));
    341   mem_pp_set_reg (dev, CS8900_PP_IA + 2,
     352  mem_pp_set_reg (cs, CS8900_PP_IA + 2,
    342353                  (((unsigned int) MACO (3)) << 8) |
    343354                  ((unsigned int) MACO (2)));
    344   mem_pp_set_reg (dev, CS8900_PP_IA + 4,
     355  mem_pp_set_reg (cs, CS8900_PP_IA + 4,
    345356                  (((unsigned int) MACO (5)) << 8) |
    346357                  ((unsigned int) MACO (4)));
     
    350361   */
    351362
    352   mem_pp_set_reg (dev, CS8900_PP_BufCFG,
     363  mem_pp_set_reg (cs, CS8900_PP_BufCFG,
    353364                  CS8900_BUFFER_CONFIG_RDY_FOR_TX |
    354365                  CS8900_BUFFER_CONFIG_TX_UNDERRUN |
     
    360371   */
    361372
    362   mem_pp_set_reg (dev, CS8900_PP_RxCFG,
     373  mem_pp_set_reg (cs, CS8900_PP_RxCFG,
    363374                  CS8900_RX_CONFIG_RX_OK |
    364375                  CS8900_RX_CONFIG_CRC_ERROR |
     
    370381   */
    371382
    372   mem_pp_set_reg (dev, CS8900_PP_RxCTL,
     383  mem_pp_set_reg (cs, CS8900_PP_RxCTL,
    373384                  CS8900_RX_CTRL_RX_OK |
    374385                  CS8900_RX_CTRL_MULTICAST |
    375386                  CS8900_RX_CTRL_INDIVIDUAL |
    376387                  CS8900_RX_CTRL_BROADCAST);
    377  
     388
    378389  /*
    379390   * Set the Transmitter configuration.
    380391   */
    381392
    382   mem_pp_set_reg (dev, CS8900_PP_TxCFG,
     393  mem_pp_set_reg (cs, CS8900_PP_TxCFG,
    383394                  CS8900_TX_CONFIG_TX_OK |
    384395                  CS8900_TX_CONFIG_OUT_OF_WINDOW |
     
    390401   */
    391402
    392   cs8900_attach_interrupt (dev, cs);
    393  
     403  cs8900_attach_interrupt (cs);
     404
    394405  /*
    395406   * Program the interrupt level we require then enable interrupts.
    396    */
    397 
    398   mem_pp_set_reg (dev, CS8900_PP_INT, 0);
    399 
    400   mem_pp_bit_set_reg (dev, CS8900_PP_BusCTL,
     407   *
     408   * Note, this will need to change to support other levels.
     409   */
     410
     411  mem_pp_set_reg (cs, CS8900_PP_INT, cs->irq_level & 3);
     412
     413  mem_pp_bit_set_reg (cs, CS8900_PP_BusCTL,
    401414                      CS8900_BUS_CTRL_ENABLE_INT);
    402415}
     
    406419{
    407420  cs8900_device  *cs = csp;
    408   int            dev = cs->dev;
    409421  unsigned short isq = 0;
    410422  struct mbuf    *m;
     
    415427  while (1)
    416428  {
    417     isq = mem_pp_get_reg (dev, CS8900_PP_ISQ);
     429    isq = mem_pp_get_reg (cs, CS8900_PP_ISQ);
    418430
    419431    cs8900_trace (cs, CS8900_T_INT, isq);
    420432
    421     WATCHDOG_TOGGLE ();
    422    
    423433    /*
    424434     * No more interrupts to service.
     
    427437    if (isq == 0)
    428438      return;
    429    
     439
    430440    switch (isq & 0x1f)
    431441    {
     
    448458            m->m_nextpkt = 0;
    449459            cs->rx_ready_len--;
    450            
     460
    451461            p = mtod (m, unsigned char *);
    452      
    453             m->m_pkthdr.len = cs8900_get_data_block (dev, p);
     462
     463            m->m_pkthdr.len = cs8900_get_data_block (cs, p);
    454464
    455465            if (cs->rx_loaded_tail == 0)
     
    462472            if (cs->rx_loaded_len == 1)
    463473            {
    464               cs8900_trace (cs, CS8900_T_RX_OK, cs->rx_loaded_len); 
     474              cs8900_trace (cs, CS8900_T_RX_OK, cs->rx_loaded_len);
    465475              rtems_event_send (cs->rx_task, CS8900_RX_OK_EVENT);
    466476            }
     
    469479          {
    470480            ++cs->eth_stats.rx_dropped;
    471            
    472             cs8900_trace (cs, CS8900_T_RX_DROPPED, cs->rx_loaded_len);     
     481
     482            cs8900_trace (cs, CS8900_T_RX_DROPPED, cs->rx_loaded_len);
    473483
    474484            if (cs->rx_loaded_len == 0)
     
    483493          if (isq & CS8900_RX_EVENT_RUNT)
    484494            ++cs->eth_stats.rx_runt_errors;
    485          
     495
    486496          if (isq & CS8900_RX_EVENT_EXTRA_DATA)
    487497            ++cs->eth_stats.rx_oversize_errors;
     
    490500
    491501      case 0x08:
    492        
     502
    493503        /*
    494504         * TxEvent.
     
    503513
    504514          cs->tx_active = 0;
    505        
     515
    506516          rtems_event_send (cs->tx_task, CS8900_TX_OK_EVENT);
    507517        }
     
    509519
    510520      case 0x0c:
    511        
     521
    512522        /*
    513523         * BufEvent.
    514524         */
    515        
     525
    516526        if (isq & CS8900_BUFFER_EVENT_RDY_FOR_TX)
    517527        {
     
    535545
    536546      case 0x10:
    537        
     547
    538548        /*
    539549         * RxMiss.
    540550         */
    541        
     551
    542552        cs->eth_stats.rx_missed_errors +=
    543           mem_pp_get_reg (dev, CS8900_PP_RxMISS) >> 6;
     553          mem_pp_get_reg (cs, CS8900_PP_RxMISS) >> 6;
    544554        break;
    545555
    546556      case 0x12:
    547        
     557
    548558        /*
    549559         * TxCol.
     
    551561
    552562        cs->eth_stats.tx_collisions +=
    553           mem_pp_get_reg (dev, CS8900_PP_TxCol) >> 6;
     563          mem_pp_get_reg (cs, CS8900_PP_TxCol) >> 6;
    554564        break;
    555565
     
    558568    }
    559569  }
    560  
     570
    561571}
    562572
    563573int
    564 cs8900_link_active (int dev)
    565 {
    566   return ((mem_pp_get_reg (dev, CS8900_PP_LineST) & CS8900_LINE_STATUS_LINK_OK) ?
     574cs8900_link_active (cs8900_device *cs)
     575{
     576  return ((mem_pp_get_reg (cs, CS8900_PP_LineST) & CS8900_LINE_STATUS_LINK_OK) ?
    567577          1 : 0);
    568578}
     
    574584  struct mbuf           *m;
    575585  rtems_interrupt_level level;
    576  
     586
    577587  /*
    578588   * Hold a single queue of mbuf's at the interface. This
     
    580590   */
    581591
    582   while (cs->rx_ready_len < CS8900_RX_QUEUE_SIZE)
     592  while (cs->rx_ready_len < cs->rx_queue_size)
    583593  {
    584594    MGETHDR (m, M_DONTWAIT, MT_DATA);
    585    
     595
    586596    if (!m)
    587597    {
    588598      ++cs->eth_stats.rx_no_mbufs;
    589       cs8900_trace (cs, CS8900_T_NO_MBUF, cs->eth_stats.rx_no_mbufs);     
     599      cs8900_trace (cs, CS8900_T_NO_MBUF, cs->eth_stats.rx_no_mbufs);
    590600      return;
    591601    }
    592          
     602
    593603    MCLGET (m, M_DONTWAIT);
    594    
     604
    595605    if (!m->m_ext.ext_buf)
    596606    {
    597607      ++cs->eth_stats.rx_no_clusters;
    598       cs8900_trace (cs, CS8900_T_NO_CLUSTERS, cs->eth_stats.rx_no_clusters);     
     608      cs8900_trace (cs, CS8900_T_NO_CLUSTERS, cs->eth_stats.rx_no_clusters);
    599609      m_free (m);
    600610      return;
     
    604614
    605615    rtems_interrupt_disable (level);
    606    
     616
    607617    if (cs->rx_ready_tail == 0)
    608618      cs->rx_ready_head = m;
     
    620630{
    621631  cs8900_device         *cs = arg;
    622   int                   dev = cs->dev;
    623632  struct ifnet          *ifp = &cs->arpcom.ac_if;
    624633  rtems_event_set       events;
     
    631640   * Turn the receiver and transmitter on.
    632641   */
    633  
    634   mem_pp_bit_set_reg (dev, CS8900_PP_LineCFG,
     642
     643  mem_pp_bit_set_reg (cs, CS8900_PP_LineCFG,
    635644                      CS8900_LINE_CTRL_RX_ON |
    636645                      CS8900_LINE_CTRL_TX_ON);
    637  
     646
    638647  /*
    639648   * Start the software interrupt watchdog.
    640649   */
    641  
    642   rtems_interrupt_disable (level);
    643   mem_pp_bit_set_reg (dev, CS8900_PP_BufCFG,
     650
     651  mem_pp_bit_set_reg (cs, CS8900_PP_BufCFG,
    644652                      CS8900_BUFFER_CONFIG_SW_INT);
    645653  ++cs->eth_stats.int_swint_req;
    646   rtems_interrupt_enable (level);
    647  
     654
    648655  /*
    649656   * Loop reading packets.
     
    653660  {
    654661    cs8900_rx_refill_queue (cs);
    655    
     662
    656663    sc = rtems_bsdnet_event_receive (CS8900_RX_OK_EVENT,
    657664                                     RTEMS_WAIT | RTEMS_EVENT_ANY,
     
    660667
    661668    cs8900_rx_refill_queue (cs);
    662    
     669
    663670    if (sc == RTEMS_TIMEOUT)
    664671    {
     
    676683        printf ("cs8900: int lockup, isq flush\n");
    677684
    678         mem_pp_bit_clear_reg (dev, CS8900_PP_BusCTL,
     685        mem_pp_bit_clear_reg (cs, CS8900_PP_BusCTL,
    679686                              CS8900_BUS_CTRL_ENABLE_INT);
    680        
    681         while (mem_pp_get_reg (dev, CS8900_PP_ISQ) != 0);
    682        
     687
     688        while (mem_pp_get_reg (cs, CS8900_PP_ISQ) != 0);
     689
    683690        cs->eth_stats.int_swint_req = cs->eth_stats.int_swint_res = 0;
    684691        ++cs->eth_stats.int_lockup;
    685        
    686         mem_pp_bit_set_reg (dev, CS8900_PP_BusCTL,
     692
     693        mem_pp_bit_set_reg (cs, CS8900_PP_BusCTL,
    687694                            CS8900_BUS_CTRL_ENABLE_INT);
    688695      }
    689      
    690       rtems_interrupt_disable (level);
    691       mem_pp_bit_set_reg (dev, CS8900_PP_BufCFG,
     696
     697      mem_pp_bit_set_reg (cs, CS8900_PP_BufCFG,
    692698                          CS8900_BUFFER_CONFIG_SW_INT);
    693699      ++cs->eth_stats.int_swint_req;
    694       rtems_interrupt_enable (level);
    695700    }
    696701
    697702    cs8900_trace (cs, CS8900_T_RX_BEGIN, cs->rx_loaded_len);
    698    
     703
    699704    while (cs->rx_loaded_len)
    700705    {
    701706      rtems_interrupt_disable (level);
    702    
     707
    703708      m = cs->rx_loaded_head;
    704709      if (m)
     
    709714        m->m_nextpkt = 0;
    710715        cs->rx_loaded_len--;
    711        
     716
    712717        rtems_interrupt_enable (level);
    713        
     718
    714719        m->m_pkthdr.rcvif = ifp;
    715        
     720
    716721        cs->eth_stats.rx_bytes += m->m_pkthdr.len;
    717        
     722
    718723        m->m_len = m->m_pkthdr.len = m->m_pkthdr.len - sizeof (struct ether_header);
    719        
     724
    720725        eh = mtod (m, struct ether_header *);
    721726        m->m_data += sizeof (struct ether_header);
    722      
     727
    723728        ++cs->eth_stats.rx_packets;
    724        
     729
    725730        ether_input (ifp, eh, m);
    726731      }
     
    738743{
    739744  cs8900_device     *cs = arg;
    740   int               dev = cs->dev;
    741745  struct ifnet      *ifp = &cs->arpcom.ac_if;
    742746  rtems_event_set   events;
     
    777781    else
    778782    {
    779       if (cs8900_link_active (dev))
     783      if (cs8900_link_active (cs))
    780784      {
    781785        int resending;
    782        
     786
    783787        do
    784788        {
     
    786790
    787791          resending = 0;
    788          
     792
    789793          cs->tx_active = 1;
    790          
    791           mem_pp_set_reg (dev, CS8900_PP_TxCMD,
     794
     795          mem_pp_set_reg (cs, CS8900_PP_TxCMD,
    792796                          CS8900_TX_CMD_STATUS_TX_START_ENTIRE |
    793797                          CS8900_TX_CMD_STATUS_FORCE);
    794           mem_pp_set_reg (dev, CS8900_PP_TxLength, m->m_pkthdr.len);
    795          
    796           buf_status = mem_pp_get_reg (dev, CS8900_PP_BusST);
     798          mem_pp_set_reg (cs, CS8900_PP_TxLength, m->m_pkthdr.len);
     799
     800          buf_status = mem_pp_get_reg (cs, CS8900_PP_BusST);
    797801
    798802          /*
     
    808812             * If the buffer is not read enable the interrupt and then wait.
    809813             */
    810            
     814
    811815            if ((buf_status & CS8900_BUS_STATUS_RDY_FOR_TX_NOW) == 0)
    812816            {
     
    831835            if (!resending)
    832836            {
    833               cs8900_tx_load (dev, m);
     837              cs8900_tx_load (cs, m);
    834838              cs->eth_stats.tx_packets++;
    835839              cs->eth_stats.tx_bytes += m->m_pkthdr.len;
     
    838842        }
    839843        while (resending);
    840        
     844
    841845        m_freem (m);
    842        
     846
    843847        do
    844848        {
     
    876880cs8900_stop (cs8900_device *cs)
    877881{
    878   int dev = cs->dev;
    879 
    880   mem_pp_bit_clear_reg (dev, CS8900_PP_LineCFG,
     882  mem_pp_bit_clear_reg (cs, CS8900_PP_LineCFG,
    881883                        CS8900_LINE_CTRL_RX_ON |
    882884                        CS8900_LINE_CTRL_TX_ON);
    883  
    884   mem_pp_bit_clear_reg (dev, CS8900_PP_BusCTL,
     885
     886  mem_pp_bit_clear_reg (cs, CS8900_PP_BusCTL,
    885887                        CS8900_BUS_CTRL_ENABLE_INT);
    886888}
     
    918920cs8900_stats (cs8900_device *cs)
    919921{
    920   int           dev = cs->dev;
    921922  int           i;
    922923  int           max_label = 0;
     
    925926
    926927  cs->eth_stats.rx_missed_errors +=
    927     mem_pp_get_reg (dev, CS8900_PP_RxMISS) >> 6;
    928    
     928    mem_pp_get_reg (cs, CS8900_PP_RxMISS) >> 6;
     929
    929930  cs->eth_stats.tx_collisions +=
    930     mem_pp_get_reg (dev, CS8900_PP_TxCol) >> 6;
    931  
     931    mem_pp_get_reg (cs, CS8900_PP_TxCol) >> 6;
     932
    932933  printf ("Network Driver Stats for CS8900 :\n");
    933934
     
    944945          max_label, "rx ready len", cs->rx_ready_len,
    945946          max_label, "rx loaded len", cs->rx_loaded_len);
    946  
     947
    947948  for (i = 0;
    948949       i < (sizeof (eth_statistics_labels) / sizeof (const char *));
     
    951952    printf ("%*s - %10lu",
    952953            max_label, eth_statistics_labels[i], value[i]);
    953    
     954
    954955    i++;
    955    
     956
    956957    if (i < (sizeof (eth_statistics_labels) / sizeof (const char *)))
    957958      printf (" %*s - %10lu",
     
    961962
    962963#if CS8900_TRACE
    963  
     964
    964965  for (i = 0; i < cs->trace_in; i++)
    965966  {
    966967    printf ("%8ld.%03ld ", cs->trace_time[i] / 1000, cs->trace_time[i] % 1000);
    967    
     968
    968969    if (cs->trace_key[i] < sizeof (cs8900_trace_labels) / sizeof (char*))
    969970      printf ("%s : ", cs8900_trace_labels[cs->trace_key[i]]);
     
    10031004            printf ("tx request");
    10041005            break;
    1005          
     1006
    10061007          case 0x1e:
    10071008            printf ("tx wait 4 tx");
    10081009            break;
    1009          
     1010
    10101011          case 0x1d:
    10111012            printf ("tx already active");
    10121013            break;
    1013          
     1014
    10141015          default:
    10151016            printf ("unknown event");
     
    10201021    else
    10211022      printf ("0x%08lx", cs->trace_var[i]);
    1022    
     1023
    10231024    printf ("\n");
    10241025  }
    10251026
    10261027  cs->trace_in = 0;
    1027  
     1028
    10281029#endif
    10291030}
     
    10331034{
    10341035  cs8900_device *cs  = arg;
    1035   int           dev  = cs->dev;
    10361036  struct ifnet  *ifp = &cs->arpcom.ac_if;
    10371037
     
    10421042     * Set up the hardware.
    10431043     */
    1044    
     1044
    10451045    cs8900_hardware_init (cs);
    10461046
     
    10481048     * Start driver task. We have only one task.
    10491049     */
    1050    
     1050
    10511051    cs->rx_task = rtems_bsdnet_newproc ("CSr0", 4096, cs8900_rx_task, cs);
    10521052    cs->tx_task = rtems_bsdnet_newproc ("CSt0", 4096, cs8900_tx_task, cs);
     
    10601060  else
    10611061#endif
    1062  
     1062
    10631063  /*
    10641064   * Tell the world that we're running.
    10651065   */
    1066  
     1066
    10671067  ifp->if_flags |= IFF_RUNNING;
    10681068
    10691069  /*
    1070    * Set the Line Control to bring the receive and transmitter online. 
    1071    */
    1072 
    1073   mem_pp_bit_set_reg (dev, CS8900_PP_LineCFG,
     1070   * Set the Line Control to bring the receive and transmitter online.
     1071   */
     1072
     1073  mem_pp_bit_set_reg (cs, CS8900_PP_LineCFG,
    10741074                      CS8900_LINE_CTRL_RX_ON |
    10751075                      CS8900_LINE_CTRL_TX_ON);
    10761076
    1077   mem_pp_bit_set_reg (dev, CS8900_PP_BusCTL,
     1077  mem_pp_bit_set_reg (cs, CS8900_PP_BusCTL,
    10781078                      CS8900_BUS_CTRL_ENABLE_INT);
    10791079}
     
    10891089    case SIOCGIFADDR:
    10901090    case SIOCSIFADDR:
    1091      
     1091
    10921092      error = ether_ioctl (ifp, cmd, data);
    10931093      break;
    10941094
    10951095    case SIOCSIFFLAGS:
    1096      
     1096
    10971097      switch (ifp->if_flags & (IFF_UP | IFF_RUNNING))
    10981098      {
    10991099        case IFF_RUNNING:
    1100          
     1100
    11011101          cs8900_stop (cs);
    11021102          break;
    11031103
    11041104        case IFF_UP:
    1105          
     1105
    11061106          cs8900_init (cs);
    11071107          break;
    11081108
    11091109        case IFF_UP | IFF_RUNNING:
    1110          
     1110
    11111111          cs8900_stop (cs);
    11121112          cs8900_init (cs);
     
    11191119
    11201120    case SIO_RTEMS_SHOW_STATS:
    1121      
     1121
    11221122      cs8900_stats (cs);
    11231123      break;
     
    11451145    * Parse driver name
    11461146   */
    1147  
     1147
    11481148  if ((unit = rtems_bsdnet_parse_driver_name (config, &name)) < 0)
    11491149    return 0;
    1150  
    1151   /*
    1152    * Is driver free?
    1153    */
    1154  
    1155   if (unit >= CS8900_DEVICES)
    1156   {
    1157     printf ("Bad CS8900 unit number for device `%s'.\n", config->name);
    1158     return 0;
    1159   }
    1160  
    1161   cs      = &cs8900[unit];
     1150
     1151  cs      = config->drv_ctrl;
    11621152  cs->dev = unit;
    11631153  ifp     = &cs->arpcom.ac_if;
     
    11741164     * Process options
    11751165     */
    1176    
     1166
    11771167    if (config->hardware_address)
    11781168      memcpy (cs->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
    11791169    else
    1180       cs8900_get_mac_addr (unit, cs->arpcom.ac_enaddr);
    1181  
     1170      cs8900_get_mac_addr (cs, cs->arpcom.ac_enaddr);
     1171
    11821172    if (config->mtu)
    11831173      mtu = config->mtu;
    11841174    else
    11851175      mtu = ETHERMTU;
    1186    
     1176
    11871177    cs->accept_bcast = !config->ignore_broadcast;
    1188    
     1178
    11891179    /*
    11901180     * Set up network interface values.
    11911181     */
    1192    
     1182
    11931183    ifp->if_softc  = cs;
    11941184    ifp->if_unit   = unit;
     
    12001190    ifp->if_output = ether_output;
    12011191    ifp->if_flags  = IFF_BROADCAST | IFF_SIMPLEX;
    1202    
     1192
    12031193    if (ifp->if_snd.ifq_maxlen == 0)
    12041194      ifp->if_snd.ifq_maxlen = ifqmaxlen;
    1205    
     1195
    12061196    /*
    12071197     * Attach the interface to the stack.
    12081198     */
    1209    
     1199
    12101200    if_attach (ifp);
    12111201    ether_ifattach (ifp);
     
    12201210
    12211211    cs8900_stop (cs);
    1222     cs8900_detach_interrupt (unit);
    1223   }
    1224  
     1212    cs8900_detach_interrupt (cs);
     1213  }
     1214
    12251215  return 1;
    1226  
    1227 }
     1216}
  • c/src/libchip/network/cs8900.h

    r27192b8 r00bf7745  
    11/*
    22  ------------------------------------------------------------------------
    3   $Id$
     3  cs8900.h,v 1.3 2002/09/07 23:09:47 joel Exp
    44  ------------------------------------------------------------------------
    55 
    6   My Right Boot, a boot ROM for embedded hardware.
    7  
    86  Copyright Cybertec Pty Ltd, 2000
    97  All rights reserved Cybertec Pty Ltd, 2000
    108 
     9  Port to the DIMM PC copyright (c) 2004 Angelo Fraietta
     10    This project has been assisted by the Commonwealth Government
     11    through the Australia Council, its arts funding and advisory body.
     12
    1113  COPYRIGHT (c) 1989-1998.
    1214  On-Line Applications Research Corporation (OAR).
     
    1416  The license and distribution terms for this file may be
    1517  found in the file LICENSE in this distribution or at
    16   http://www.rtems.com/license/LICENSE.
     18  http://www.OARcorp.com/rtems/license.html.
    1719 
    1820  ------------------------------------------------------------------------
    1921
    20   CS8900 net boot driver.
     22  CS8900 RTEMS driver.
     23
     24  This is a generic driver that requires a BSP backend. The BSP backend
     25  provides the glue to the specific bus for the target hardware. It has
     26  been tested with Coldfire processors, and the PC. These targets have
     27  completely different bus, byte order and interrupt structures.
     28
     29  An example BSP backend is provided in the pci386 BSP.
     30 
     31  The BSP provides the following functions:
     32
     33    cs8900_io_set_reg
     34    cs8900_io_get_reg
     35    cs8900_mem_set_reg
     36    cs8900_mem_get_reg
     37    cs8900_put_data_block
     38    cs8900_get_data_block
     39    cs8900_tx_load
     40    cs8900_attach_interrupt
     41    cs8900_detach_interrupt
     42
     43  The header file provides documentation for these functions. There
     44  are four types of functions.
     45
     46  The I/O set/get functions access the CS8900 I/O registers via the
     47  I/O Mode. For example on a PC with an ISA bus you would use the
     48  IA32 in/out port instructions. The cs8900_device structure passed
     49  to these functions provide these functions with the I/O base
     50  address. The BSP must provide these functions.
     51
     52  The Memory set/get functions access the CS8900 internal registers
     53  and frame buffers directly from a 4K byte block of host memory.
     54  Memory mode provides a faster access to the CS8900. The cs8900_device
     55  structure passed to these functions provides the memory base
     56  address. The BSP needs to provide these functions but they do not
     57  need to be implemented if the mem_base field is set to 0. The
     58  driver will use I/O mode only.
     59
     60  The Block transfer functions are used to read or write a block
     61  of memory from the CS8900. This saves the driver making a number
     62  of small calls. The BSP driver must know if I/O or Memory mode
     63  can be used.
     64
     65  The final group of functions is to handle interrupts. The BSP
     66  must take care of save and restoring any interrupt state
     67  information.
     68
     69  The BSP declares a 'cs8900_device' structure for each device being
     70  attached to the networking stack. It also creates a
     71  'struct rtems_bsdnet_ifconfig' which is used to attach the interface
     72  to the networking stack. The following code declares the BSD config:
     73 
     74    static cs8900_device cs8900;
     75
     76    static struct rtems_bsdnet_ifconfig cs8900_ifconfig =
     77     {
     78       "cs0",
     79       cs8900_driver_attach,
     80       NULL,
     81       NULL,
     82       NULL,
     83       NULL,
     84       0,
     85       0,
     86       0,
     87       0,
     88       0,
     89       0,
     90       0,
     91       0
     92     };
     93
     94   The device linked to the BSD config structure with:
     95
     96     cs8900_ifconfig.drv_ctrl = &cs8900;
     97
     98   If you have a specific hardware address you should point the BSD
     99   config structure to that address. If you do not the driver will read
     100   the MAC address from the CS8900. This assumes the CS8900 has read
     101   the address from an external EEPROM or has been setup by a BIOS or
     102   boot monitor. For EEPROM less you need to supply the MAC address.
     103
     104   Set the I/O and Memory base addresses. If the Memory base address
     105   is 0 the driver will use I/O mode only. A typical initialisation
     106   looks like:
     107
     108     printf ("RTEMS BSD Network initialisation.\n");
     109     rtems_bsdnet_initialize_network ();
     110
     111     #define ETHERNET_IO_BASE   0x300
     112     #define ETHERNET_MEM_BASE  0
     113     #define ETHERNET_IRQ_LEVEL 0
     114
     115     cs8900_device *cs = &cs8900;
     116     
     117     memset (cs, 0, sizeof (cs8900_device));
     118 
     119     cs->dev = 0;
     120     cs->io_base = ETHERNET_IO_BASE;
     121     cs->mem_base = ETHERNET_MEM_BASE;
     122     cs->irq_level = ETHERNET_IRQ_LEVEL;
     123     cs->rx_queue_size = 30;
     124
     125     cs8900_ifconfig.drv_ctrl = &cs8900;
     126     
     127     printf ("CS8900 initialisation\n");
     128   
     129     rtems_bsdnet_attach (&cs8900_ifconfig);
     130     
     131     flags = IFF_UP;
     132     if (rtems_bsdnet_ifconfig (cs8900_ifconfig.name,
     133                                SIOCSIFFLAGS,
     134                                &flags) < 0)
     135     {
     136       printf ("error: can't bring up %s: %s\n",
     137               cs8900_ifconfig.name, strerror (errno));
     138       return;
     139     }
     140
     141     rtems_bsdnet_do_bootp_and_rootfs ();
     142
     143   The IRQ level is the one documented in the CS8900 datasheet and below
     144   in the CS8900 device structure. You need to map your target IRQ to the
     145   CS8900 in the BSP driver.
    21146
    22147 */
     
    329454
    330455/*
     456 * The default receive queue size. If the BSP sets this field to
     457 * 0 this default is used.
     458 */
     459#define CS8900_RX_QUEUE_SIZE (30)
     460
     461/*
    331462 * Stats, more for debugging than anything else.
    332463 */
     
    382513
    383514  /*
     515   * Memory base addresses. Making mem_base 0 forces the
     516   * driver to perform only I/O space accesses.
     517   */
     518
     519  unsigned long  io_base;
     520  unsigned long  mem_base;
     521
     522  /*
     523   * The IRQ level as defined in the datasheet for the CS8900.
     524   *
     525   *      ISA BUS   Pin    Value
     526   *       IRQ10   INTRQ0    0
     527   *       IRQ11   INTRQ1    1
     528   *       IRQ12   INTRQ2    2
     529   *       IRQ5    INTRQ3    3
     530   */
     531
     532  int            irq_level;
     533
     534  /*
     535   * The MAC address.
     536   */
     537
     538  unsigned char mac_address[6];
     539
     540  /*
    384541   * The bsdnet information structure. 
    385542   */
     
    400557   * The queues. FIXME : these should be changed to be mbuf lists.
    401558   */
     559
    402560  struct mbuf    *rx_ready_head;
    403561  struct mbuf    *rx_ready_tail;
     
    408566  int            rx_loaded_len;
    409567
     568  /*
     569   * Number of mbufs queued for the interrupt handler to
     570   * loop reading.
     571   */
     572
     573  int            rx_queue_size;
     574 
    410575#if CS8900_TRACE
    411576  unsigned short trace_key[CS8900_TRACE_SIZE];
     
    415580#endif
    416581
    417   /*
     582  /**
    418583   * Standard(!) ethernet statistics
    419584   */
     
    424589
    425590/*
    426  * Link is active, and RX count.
    427  */
    428 
    429 int           cs8900_link_active (int dev);
    430 int           cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
    431                                     int                          attaching);
    432 rtems_isr     cs8900_interrupt (rtems_vector_number v, void *cs);
    433 
    434 /*
    435  * Functions Users Provide to implement the driver.
    436  */
    437 
    438 void           cs8900_attach_interrupt (int dev, cs8900_device *cs);
    439 void           cs8900_detach_interrupt (int dev);
    440 void           cs8900_get_mac_addr (int dev, unsigned char *mac_address);
    441 void           cs8900_io_set_reg (int dev, unsigned short reg, unsigned short data);
    442 unsigned short cs8900_io_get_reg (int dev, unsigned short reg);
    443 void           cs8900_mem_set_reg (int dev, unsigned long reg, unsigned short data);
    444 unsigned short cs8900_mem_get_reg (int dev, unsigned long reg);
    445 void           cs8900_put_data_block (int dev, int len, unsigned char *data);
    446 unsigned short cs8900_get_data_block (int dev, unsigned char *data);
    447 void           cs8900_tx_load (int dev, struct mbuf *m);
     591 * Link active returns the state of the PHY.
     592 *
     593 * @param cs Pointer to the device structure.
     594 */
     595
     596int cs8900_link_active (cs8900_device *cs);
     597
     598/**
     599 * The RTEMS network stack driver attach function that is loaded into the
     600 * the rtems_bsdnet_ifconfig struct. The network stack will call this
     601 * function when attaching the driver. The BSP must load the 'drv_ctrl'
     602 * field of the structure before calling the 'rtems_bsdnet_attach'
     603 * function.
     604 *
     605 * @param config The RTEMS BSD config structure.
     606 *
     607 * @param attaching True is the stack is attaching the interface.
     608 *
     609 * @retval int Set to 1 if the device has attached.
     610 */
     611
     612int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
     613                          int                          attaching);
     614         
     615/**
     616 * The BSP specific interrupt wrapper calls this function when a device
     617 * interrupt occurs.
     618 *
     619 * @param v The RTEMS vector number that generated the interrupt.
     620 *
     621 * @param cs Pointer to the device structure passed to the interrupt
     622 *           catch function provided by the BSP.
     623 *
     624 * @retval rtems_isr The standard ISR return type.
     625 */
     626
     627rtems_isr cs8900_interrupt (rtems_vector_number v, void *cs);
     628
     629/**
     630 * Get the MAC address for the interface.
     631 *
     632 * @param cs Pointer to the device structure.
     633 *
     634 * @param mac_address Pointer to the memory to load the MAC address. This
     635 *                    is a 6 byte buffer so do not exceeed the bounds.
     636 */
     637
     638void cs8900_get_mac_addr (cs8900_device *cs, unsigned char *mac_address);
     639
     640/**
     641 * Catch the device interrupt. When the interrupt is called call the
     642 * function 'cs8900_interrupt'.
     643 *
     644 * BSP to provide this function.
     645 *
     646 * @param cs Pointer to the device structure.
     647 */
     648
     649void cs8900_attach_interrupt (cs8900_device *cs);
     650
     651/**
     652 * Detach the device interrupt.
     653 *
     654 * BSP to provide this function.
     655 *
     656 * @param cs Pointer to the device structure.
     657 */
     658
     659void cs8900_detach_interrupt (cs8900_device *cs);
     660
     661/**
     662 * Write to an IO space register.
     663 *
     664 * BSP to provide this function.
     665 *
     666 * @param cs Pointer to the device structure.
     667 *
     668 * @param reg Register offset from the IO base.
     669 *
     670 * @param data The data to be written to the register.
     671 */
     672
     673void cs8900_io_set_reg (cs8900_device *cs,
     674                        unsigned short reg, unsigned short data);
     675
     676/**
     677 * Read an IO space register.
     678 *
     679 * BSP to provide this function.
     680 *
     681 * @param cs Pointer to the device structure.
     682 *
     683 * @param reg Register offset from the IO base.
     684 *
     685 * @retval unsigned short The register data.
     686 */
     687
     688unsigned short cs8900_io_get_reg (cs8900_device *cs, unsigned short reg);
     689
     690/**
     691 * Write to a memory space register. Will only be called is the mem_base
     692 * field of the 'cs' struct is not 0.
     693 *
     694 * BSP to provide this function.
     695 *
     696 * @param cs Pointer to the device structure.
     697 *
     698 * @param reg Register offset from the memory base.
     699 *
     700 * @param data The data to be written to the register.
     701 */
     702
     703void cs8900_mem_set_reg (cs8900_device *cs,
     704                         unsigned long reg, unsigned short data);
     705
     706/**
     707 * Read a memory space register. Will only be called is the mem_base
     708 * field of the 'cs' struct is not 0.
     709 *
     710 * BSP to provide this function.
     711 *
     712 * @param cs Pointer to the device structure.
     713 *
     714 * @param reg Register offset from the IO base.
     715 *
     716 * @retval unsigned short The register data.
     717 */
     718
     719unsigned short cs8900_mem_get_reg (cs8900_device *cs, unsigned long reg);
     720
     721/**
     722 * Write a block of data to the interface. The BSP codes if this is an IO or
     723 * memory space write.
     724 *
     725 * BSP to provide this function.
     726 *
     727 * @param cs Pointer to the device structure.
     728 *
     729 * @param len The length of data to write.
     730 *
     731 * @param data Pointer to the data to be written.
     732 */
     733
     734void cs8900_put_data_block (cs8900_device *cs, int len, unsigned char *data);
     735
     736/**
     737 * Read a block of data from the interface. The BSP codes if this is an IO or
     738 * memory space write. The read must not be longer than the MTU size.
     739 *
     740 * BSP to provide this function.
     741 *
     742 * @param cs Pointer to the device structure.
     743 *
     744 * @param data Pointer to the buffer where the data is to be written.
     745 *
     746 * @retval unsigned short The number of bytes read from the device.
     747 */
     748
     749unsigned short cs8900_get_data_block (cs8900_device *cs, unsigned char *data);
     750
     751/**
     752 * Load a mbuf chain to the device ready for tranmission.
     753 *
     754 * BSP to provide this function.
     755 *
     756 * @param cs Pointer to the device structure.
     757 *
     758 * @param m Pointer to the head of an mbuf chain.
     759 */
     760
     761void cs8900_tx_load (cs8900_device *cs, struct mbuf *m);
    448762
    449763#endif
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