1 | #include "config.h" |
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2 | #include "stddefs.h" |
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3 | #include "cpuio.h" |
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4 | #include "genlib.h" |
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5 | #include "cache.h" |
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6 | #include "warmstart.h" |
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7 | #include "timer.h" |
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8 | #include "am335x.h" |
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9 | #include "uart16550.h" |
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10 | #include "cli.h" |
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11 | |
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12 | int |
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13 | getUartDivisor(int baud, unsigned char *hi, unsigned char *lo) |
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14 | { |
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15 | *lo = ((48000000/16)/baud) & 0x00ff; |
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16 | *hi = (((48000000/16)/baud) & 0xff00) >> 8; |
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17 | return(0); |
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18 | } |
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19 | |
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20 | /* devInit(): |
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21 | * As a bare minimum, initialize the console UART here using the |
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22 | * incoming 'baud' value as the baud rate. |
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23 | */ |
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24 | int |
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25 | devInit(int baud) |
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26 | { |
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27 | return(0); |
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28 | } |
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29 | |
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30 | /* ConsoleBaudSet(): |
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31 | * Provide a means to change the baud rate of the running |
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32 | * console interface. If the incoming value is not a valid |
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33 | * baud rate, then default to 9600. |
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34 | * In the early stages of a new port this can be left empty. |
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35 | * Return 0 if successful; else -1. |
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36 | */ |
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37 | /*int |
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38 | ConsoleBaudSet(int baud) |
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39 | { |
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40 | // ADD_CODE_HERE |
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41 | return(0); |
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42 | }*/ |
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43 | |
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44 | /* target_console_empty(): |
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45 | * Target-specific portion of flush_console() in chario.c. |
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46 | * This function returns 1 if there are no characters waiting to |
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47 | * be put out on the UART; else return 0 indicating that the UART |
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48 | * is still busy outputting characters from its FIFO. |
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49 | * In the early stages of a new port this can simply return 1. |
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50 | */ |
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51 | /*int |
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52 | target_console_empty(void) |
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53 | { |
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54 | // if (UART_OUTPUT_BUFFER_IS_EMPTY()) <- FIX CODE HERE |
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55 | return(0); |
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56 | return(1); |
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57 | }*/ |
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58 | |
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59 | /* intsoff(): |
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60 | * Disable all system interrupts here and return a value that can |
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61 | * be used by intsrestore() (later) to restore the interrupt state. |
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62 | */ |
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63 | ulong |
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64 | intsoff(void) |
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65 | { |
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66 | ulong status = 0; |
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67 | |
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68 | /* ADD_CODE_HERE */ |
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69 | return(status); |
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70 | } |
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71 | |
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72 | /* intsrestore(): |
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73 | * Re-establish system interrupts here by using the status value |
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74 | * that was returned by an earlier call to intsoff(). |
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75 | */ |
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76 | void |
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77 | intsrestore(ulong status) |
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78 | { |
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79 | /* ADD_CODE_HERE */ |
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80 | } |
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81 | |
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82 | /* cacheInitForTarget(): |
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83 | * Establish target specific function pointers and |
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84 | * enable i-cache... |
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85 | * Refer to $core/cache.c for a description of the function pointers. |
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86 | * NOTE: |
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87 | * If cache (either I or D or both) is enabled, then it is important |
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88 | * that the appropriate cacheflush/invalidate function be established. |
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89 | * This is very important because programs (i.e. cpu instructions) are |
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90 | * transferred to memory using data memory accesses and could |
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91 | * potentially result in cache coherency problems. |
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92 | */ |
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93 | void |
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94 | cacheInitForTarget(void) |
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95 | { |
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96 | /* ADD_CODE_HERE */ |
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97 | } |
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98 | |
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99 | /* target_reset(): |
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100 | * The default (absolute minimum) action to be taken by this function |
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101 | * is to call monrestart(INITIALIZE). It would be better if there was |
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102 | * some target-specific function that would really cause the target |
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103 | * to reset... |
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104 | */ |
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105 | void |
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106 | target_reset(void) |
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107 | { |
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108 | // flushDcache(0,0); |
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109 | // disableDcache(); |
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110 | // invalidateIcache(0,0); |
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111 | // disableIcache(); |
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112 | monrestart(INITIALIZE); |
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113 | } |
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114 | |
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115 | /* Override the default exception handlers provided by the AM335x |
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116 | * internal ROM code with uMon's custom exception handlers |
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117 | */ |
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118 | void |
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119 | ram_vector_install(void) |
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120 | { |
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121 | extern unsigned long abort_data; |
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122 | extern unsigned long abort_prefetch; |
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123 | extern unsigned long undefined_instruction; |
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124 | extern unsigned long software_interrupt; |
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125 | extern unsigned long interrupt_request; |
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126 | extern unsigned long fast_interrupt_request; |
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127 | extern unsigned long not_assigned; |
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128 | |
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129 | *(ulong **)0x4030ce24 = &undefined_instruction; |
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130 | *(ulong **)0x4030ce28 = &software_interrupt; |
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131 | *(ulong **)0x4030ce2c = &abort_prefetch; |
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132 | *(ulong **)0x4030ce30 = &abort_data; |
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133 | *(ulong **)0x4030ce34 = ¬_assigned; |
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134 | *(ulong **)0x4030ce38 = &interrupt_request; |
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135 | *(ulong **)0x4030ce3c = &fast_interrupt_request; |
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136 | } |
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137 | |
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138 | void |
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139 | pinMuxInit(void) |
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140 | { |
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141 | // Set pin mux configuration for UART0 RX/TX pins |
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142 | CNTL_MODULE_REG(CONF_UART0_RXD) = SLEWSLOW | RX_ON | |
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143 | PULL_OFF | MUXMODE_0; |
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144 | CNTL_MODULE_REG(CONF_UART0_TXD) = SLEWSLOW | RX_OFF | |
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145 | PULL_OFF | MUXMODE_0; |
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146 | |
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147 | // Configure GPIO pins tied to four USR LEDS... |
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148 | // GPIO1_21: USER0 LED (D2) |
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149 | CNTL_MODULE_REG(CONF_GPMC_A5) = SLEWSLOW | RX_ON | |
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150 | PULL_OFF | MUXMODE_7; |
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151 | // GPIO1_22: USER1 LED (D3) |
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152 | CNTL_MODULE_REG(CONF_GPMC_A6) = SLEWSLOW | RX_ON | |
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153 | PULL_OFF | MUXMODE_7; |
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154 | // GPIO1_23: USER2 LED (D4) |
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155 | CNTL_MODULE_REG(CONF_GPMC_A7) = SLEWSLOW | RX_ON | |
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156 | PULL_OFF | MUXMODE_7; |
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157 | // GPIO1_24: USER3 LED (D5) |
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158 | CNTL_MODULE_REG(CONF_GPMC_A8) = SLEWSLOW | RX_ON | |
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159 | PULL_OFF | MUXMODE_7; |
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160 | } |
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161 | |
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162 | void |
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163 | InitGPIO1(void) |
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164 | { |
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165 | // GPIO_CTRL: Enable GPIO1 module |
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166 | GPIO1_REG(0x130) = 0; |
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167 | |
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168 | // GPIO_OE: 25-24 are outputs... |
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169 | GPIO1_REG(0x134) &= ~(USR0_LED | USR1_LED | USR2_LED | USR3_LED); |
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170 | |
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171 | // All LEDs off... |
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172 | GPIO1_REG(0x13c) &= ~(USR0_LED | USR1_LED | USR2_LED | USR3_LED); |
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173 | } |
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174 | |
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175 | /* If any CPU IO wasn't initialized in reset.S, do it here... |
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176 | * This just provides a "C-level" IO init opportunity. |
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177 | */ |
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178 | void |
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179 | initCPUio(void) |
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180 | { |
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181 | ram_vector_install(); |
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182 | |
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183 | // Enable the control module: |
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184 | CM_WKUP_REG(CM_WKUP_CONTROL_CLKCTRL) |= 2; |
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185 | |
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186 | // Enable clock for UART0: |
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187 | CM_WKUP_REG(CM_WKUP_UART0_CLKCTRL) |= 2; |
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188 | |
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189 | // Enable clock for GPIO1: |
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190 | CM_PER_REG(CM_DIV_M3_DPLL_PER) |= 2; |
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191 | |
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192 | pinMuxInit(); |
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193 | |
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194 | InitUART(DEFAULT_BAUD_RATE); |
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195 | InitGPIO1(); |
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196 | |
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197 | // Set UART0 mode to 16x |
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198 | UART0_REG(UART_MDR1) &= ~7; |
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199 | } |
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200 | |
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201 | int |
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202 | led(int num, int on) |
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203 | { |
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204 | unsigned long bit; |
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205 | |
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206 | switch(num) { |
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207 | case 0: // D0 |
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208 | bit = USR0_LED; |
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209 | break; |
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210 | case 1: // D1 |
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211 | bit = USR1_LED; |
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212 | break; |
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213 | case 2: // D2 |
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214 | bit = USR2_LED; |
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215 | break; |
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216 | case 3: // D3 |
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217 | bit = USR3_LED; |
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218 | break; |
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219 | default: |
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220 | return(-1); |
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221 | } |
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222 | |
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223 | // GPIO21-24: |
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224 | if (on) |
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225 | GPIO1_REG(0x13c) |= bit; |
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226 | else |
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227 | GPIO1_REG(0x13c) &= ~bit; |
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228 | return(0); |
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229 | } |
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230 | |
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231 | void |
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232 | target_blinkled(void) |
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233 | { |
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234 | #if INCLUDE_BLINKLED |
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235 | static uint8_t ledstate; |
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236 | static struct elapsed_tmr tmr; |
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237 | |
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238 | #define STATLED_ON() led(0,1) |
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239 | #define STATLED_OFF() led(0,0) |
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240 | #ifndef BLINKON_MSEC |
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241 | #define BLINKON_MSEC 10000 |
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242 | #define BLINKOFF_MSEC 10000 |
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243 | #endif |
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244 | |
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245 | switch(ledstate) { |
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246 | case 0: |
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247 | startElapsedTimer(&tmr,BLINKON_MSEC); |
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248 | STATLED_ON(); |
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249 | ledstate = 1; |
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250 | break; |
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251 | case 1: |
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252 | if(msecElapsed(&tmr)) { |
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253 | STATLED_OFF(); |
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254 | ledstate = 2; |
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255 | startElapsedTimer(&tmr,BLINKOFF_MSEC); |
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256 | } |
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257 | break; |
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258 | case 2: |
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259 | if(msecElapsed(&tmr)) { |
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260 | STATLED_ON(); |
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261 | ledstate = 1; |
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262 | startElapsedTimer(&tmr,BLINKON_MSEC); |
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263 | } |
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264 | break; |
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265 | } |
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266 | #endif |
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267 | } |
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