source: umon/ports/beagleboneblack/cpuio.c @ 82f6941

Last change on this file since 82f6941 was 82f6941, checked in by Jarielle Catbagan <jcatbagan93@…>, on Jul 16, 2015 at 11:26:39 AM

BBB: cpuio.c: Fixed indentation

  • Property mode set to 100644
File size: 5.8 KB
Line 
1#include "config.h"
2#include "stddefs.h"
3#include "cpuio.h"
4#include "genlib.h"
5#include "cache.h"
6#include "warmstart.h"
7#include "timer.h"
8#include "am335x.h"
9#include "uart16550.h"
10#include "cli.h"
11
12int
13getUartDivisor(int baud, unsigned char *hi, unsigned char *lo)
14{
15        *lo = ((48000000/16)/baud) & 0x00ff;
16        *hi = (((48000000/16)/baud) & 0xff00) >> 8;
17        return(0);
18}
19
20/* devInit():
21 * As a bare minimum, initialize the console UART here using the
22 * incoming 'baud' value as the baud rate.
23 */
24int
25devInit(int baud)
26{
27        return(0);
28}
29
30/* ConsoleBaudSet():
31 * Provide a means to change the baud rate of the running
32 * console interface.  If the incoming value is not a valid
33 * baud rate, then default to 9600.
34 * In the early stages of a new port this can be left empty.
35 * Return 0 if successful; else -1.
36 */
37/*int
38ConsoleBaudSet(int baud)
39{
40        // ADD_CODE_HERE
41        return(0);
42}*/
43
44/* target_console_empty():
45 * Target-specific portion of flush_console() in chario.c.
46 * This function returns 1 if there are no characters waiting to
47 * be put out on the UART; else return 0 indicating that the UART
48 * is still busy outputting characters from its FIFO.
49 * In the early stages of a new port this can simply return 1.
50 */
51/*int
52target_console_empty(void)
53{
54        // if (UART_OUTPUT_BUFFER_IS_EMPTY())  <- FIX CODE HERE
55                return(0);
56        return(1);
57}*/
58
59/* intsoff():
60 * Disable all system interrupts here and return a value that can
61 * be used by intsrestore() (later) to restore the interrupt state.
62 */
63ulong
64intsoff(void)
65{
66        ulong status = 0;
67
68        /* ADD_CODE_HERE */
69        return(status);
70}
71
72/* intsrestore():
73 * Re-establish system interrupts here by using the status value
74 * that was returned by an earlier call to intsoff().
75 */
76void
77intsrestore(ulong status)
78{
79        /* ADD_CODE_HERE */
80}
81
82/* cacheInitForTarget():
83 * Establish target specific function pointers and
84 * enable i-cache...
85 * Refer to $core/cache.c for a description of the function pointers.
86 * NOTE:
87 * If cache (either I or D or both) is enabled, then it is important
88 * that the appropriate cacheflush/invalidate function be established.
89 * This is very important because programs (i.e. cpu instructions) are
90 * transferred to memory using data memory accesses and could
91 * potentially result in cache coherency problems.
92 */
93void
94cacheInitForTarget(void)
95{
96        /* ADD_CODE_HERE */
97}
98
99/* target_reset():
100 * The default (absolute minimum) action to be taken by this function
101 * is to call monrestart(INITIALIZE).  It would be better if there was
102 * some target-specific function that would really cause the target
103 * to reset...
104 */
105void
106target_reset(void)
107{
108//      flushDcache(0,0);
109//      disableDcache();
110//      invalidateIcache(0,0);
111//      disableIcache();
112        monrestart(INITIALIZE);
113}
114
115/* Override the default exception handlers provided by the AM335x
116 * internal ROM code with uMon's custom exception handlers
117 */
118void
119ram_vector_install(void)
120{
121        extern unsigned long abort_data;
122        extern unsigned long abort_prefetch;
123        extern unsigned long undefined_instruction;
124        extern unsigned long software_interrupt;
125        extern unsigned long interrupt_request;
126        extern unsigned long fast_interrupt_request;
127        extern unsigned long not_assigned;
128
129        *(ulong **)0x4030ce24 = &undefined_instruction;
130        *(ulong **)0x4030ce28 = &software_interrupt;
131        *(ulong **)0x4030ce2c = &abort_prefetch;
132        *(ulong **)0x4030ce30 = &abort_data;
133        *(ulong **)0x4030ce34 = &not_assigned;
134        *(ulong **)0x4030ce38 = &interrupt_request;
135        *(ulong **)0x4030ce3c = &fast_interrupt_request;
136}
137
138void
139pinMuxInit(void)
140{
141        // Set pin mux configuration for UART0 RX/TX pins
142        CNTL_MODULE_REG(CONF_UART0_RXD) = SLEWSLOW | RX_ON |
143                PULL_OFF | MUXMODE_0;
144        CNTL_MODULE_REG(CONF_UART0_TXD) = SLEWSLOW | RX_OFF |
145                PULL_OFF | MUXMODE_0;
146
147        // Configure GPIO pins tied to four USR LEDS...
148        // GPIO1_21: USER0 LED (D2)
149        CNTL_MODULE_REG(CONF_GPMC_A5) = SLEWSLOW | RX_ON |
150                PULL_OFF | MUXMODE_7;
151        // GPIO1_22: USER1 LED (D3)
152        CNTL_MODULE_REG(CONF_GPMC_A6) = SLEWSLOW | RX_ON |
153                PULL_OFF | MUXMODE_7;
154        // GPIO1_23: USER2 LED (D4)
155        CNTL_MODULE_REG(CONF_GPMC_A7) = SLEWSLOW | RX_ON |
156                PULL_OFF | MUXMODE_7;
157        // GPIO1_24: USER3 LED (D5)
158        CNTL_MODULE_REG(CONF_GPMC_A8) = SLEWSLOW | RX_ON |
159                PULL_OFF | MUXMODE_7;
160}
161
162void
163InitGPIO1(void)
164{
165        // GPIO_CTRL: Enable GPIO1 module
166        GPIO1_REG(0x130) = 0;
167
168        // GPIO_OE: 25-24 are outputs...
169        GPIO1_REG(0x134) &= ~(USR0_LED | USR1_LED | USR2_LED | USR3_LED);
170
171        // All LEDs off...
172        GPIO1_REG(0x13c) &= ~(USR0_LED | USR1_LED | USR2_LED | USR3_LED);
173}
174
175/* If any CPU IO wasn't initialized in reset.S, do it here...
176 * This just provides a "C-level" IO init opportunity.
177 */
178void
179initCPUio(void)
180{
181        ram_vector_install();
182
183        // Enable the control module:
184        CM_WKUP_REG(CM_WKUP_CONTROL_CLKCTRL) |= 2;
185
186        // Enable clock for UART0:
187        CM_WKUP_REG(CM_WKUP_UART0_CLKCTRL) |= 2;
188
189        // Enable clock for GPIO1:
190        CM_PER_REG(CM_DIV_M3_DPLL_PER) |= 2;
191
192        pinMuxInit();
193
194        InitUART(DEFAULT_BAUD_RATE);
195        InitGPIO1();
196
197        // Set UART0 mode to 16x
198        UART0_REG(UART_MDR1) &= ~7;
199}
200
201int
202led(int num, int on)
203{
204        unsigned long bit;
205
206        switch(num) {
207                case 0: // D0
208                        bit = USR0_LED;
209                        break;
210                case 1: // D1
211                        bit = USR1_LED;
212                        break;
213                case 2: // D2
214                        bit = USR2_LED;
215                        break;
216                case 3: // D3
217                        bit = USR3_LED;
218                        break;
219                default:
220                        return(-1);
221        }
222
223        // GPIO21-24:
224        if (on)
225            GPIO1_REG(0x13c) |= bit;
226        else
227            GPIO1_REG(0x13c) &= ~bit;
228        return(0);
229}
230
231void
232target_blinkled(void)
233{
234#if INCLUDE_BLINKLED
235        static uint8_t ledstate;
236        static struct elapsed_tmr tmr;
237
238#define STATLED_ON()    led(0,1)
239#define STATLED_OFF()   led(0,0)
240#ifndef BLINKON_MSEC
241#define BLINKON_MSEC 10000
242#define BLINKOFF_MSEC 10000
243#endif
244
245        switch(ledstate) {
246                case 0:
247                        startElapsedTimer(&tmr,BLINKON_MSEC);
248                        STATLED_ON();
249                        ledstate = 1;
250                        break;
251                case 1:
252                        if(msecElapsed(&tmr)) {
253                                STATLED_OFF();
254                                ledstate = 2;
255                                startElapsedTimer(&tmr,BLINKOFF_MSEC);
256                        }
257                        break;
258                case 2:
259                        if(msecElapsed(&tmr)) {
260                                STATLED_ON();
261                                ledstate = 1;
262                                startElapsedTimer(&tmr,BLINKON_MSEC);
263                        }
264                        break;
265        }
266#endif
267}
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