[dee5246] | 1 | #include "config.h" |
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[11c6677] | 2 | #include "stddefs.h" |
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[dee5246] | 3 | #include "cpuio.h" |
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| 4 | #include "genlib.h" |
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[11c6677] | 5 | #include "cache.h" |
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[dee5246] | 6 | #include "warmstart.h" |
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[11c6677] | 7 | #include "timer.h" |
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[d77ed25] | 8 | #include "am335x.h" |
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| 9 | #include "uart16550.h" |
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[dee5246] | 10 | |
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| 11 | int |
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| 12 | getUartDivisor(int baud, unsigned char *hi, unsigned char *lo) |
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| 13 | { |
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| 14 | *lo = ((48000000/16)/baud) & 0x00ff; |
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| 15 | *hi = (((48000000/16)/baud) & 0xff00) >> 8; |
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| 16 | return(0); |
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| 17 | } |
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| 18 | |
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[11c6677] | 19 | /* devInit(): |
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| 20 | * As a bare minimum, initialize the console UART here using the |
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| 21 | * incoming 'baud' value as the baud rate. |
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| 22 | */ |
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| 23 | void |
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[dee5246] | 24 | devInit(int baud) |
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| 25 | { |
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[11c6677] | 26 | /* ADD_CODE_HERE */ |
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[dee5246] | 27 | } |
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| 28 | |
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[11c6677] | 29 | /* ConsoleBaudSet(): |
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| 30 | * Provide a means to change the baud rate of the running |
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| 31 | * console interface. If the incoming value is not a valid |
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| 32 | * baud rate, then default to 9600. |
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| 33 | * In the early stages of a new port this can be left empty. |
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| 34 | * Return 0 if successful; else -1. |
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[dee5246] | 35 | */ |
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[11c6677] | 36 | /*int |
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| 37 | ConsoleBaudSet(int baud) |
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[dee5246] | 38 | { |
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[11c6677] | 39 | // ADD_CODE_HERE |
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| 40 | return(0); |
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| 41 | }*/ |
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| 42 | |
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| 43 | /* target_console_empty(): |
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| 44 | * Target-specific portion of flush_console() in chario.c. |
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| 45 | * This function returns 1 if there are no characters waiting to |
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| 46 | * be put out on the UART; else return 0 indicating that the UART |
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| 47 | * is still busy outputting characters from its FIFO. |
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| 48 | * In the early stages of a new port this can simply return 1. |
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| 49 | */ |
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| 50 | /*int |
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| 51 | target_console_empty(void) |
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[dee5246] | 52 | { |
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[11c6677] | 53 | // if (UART_OUTPUT_BUFFER_IS_EMPTY()) <- FIX CODE HERE |
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| 54 | return(0); |
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| 55 | return(1); |
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| 56 | }*/ |
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| 57 | |
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| 58 | /* intsoff(): |
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| 59 | * Disable all system interrupts here and return a value that can |
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| 60 | * be used by intsrestore() (later) to restore the interrupt state. |
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[dee5246] | 61 | */ |
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[11c6677] | 62 | ulong |
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| 63 | intsoff(void) |
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[dee5246] | 64 | { |
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[d6c7226] | 65 | ulong status = 0; |
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[dee5246] | 66 | |
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[11c6677] | 67 | /* ADD_CODE_HERE */ |
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| 68 | return(status); |
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[dee5246] | 69 | } |
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| 70 | |
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[11c6677] | 71 | /* intsrestore(): |
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| 72 | * Re-establish system interrupts here by using the status value |
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| 73 | * that was returned by an earlier call to intsoff(). |
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| 74 | */ |
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[dee5246] | 75 | void |
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[11c6677] | 76 | intsrestore(ulong status) |
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[dee5246] | 77 | { |
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[11c6677] | 78 | /* ADD_CODE_HERE */ |
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[dee5246] | 79 | } |
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| 80 | |
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[11c6677] | 81 | /* cacheInitForTarget(): |
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| 82 | * Establish target specific function pointers and |
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| 83 | * enable i-cache... |
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| 84 | * Refer to $core/cache.c for a description of the function pointers. |
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| 85 | * NOTE: |
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| 86 | * If cache (either I or D or both) is enabled, then it is important |
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| 87 | * that the appropriate cacheflush/invalidate function be established. |
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| 88 | * This is very important because programs (i.e. cpu instructions) are |
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| 89 | * transferred to memory using data memory accesses and could |
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| 90 | * potentially result in cache coherency problems. |
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[dee5246] | 91 | */ |
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[11c6677] | 92 | void |
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| 93 | cacheInitForTarget(void) |
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[dee5246] | 94 | { |
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[11c6677] | 95 | /* ADD_CODE_HERE */ |
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[dee5246] | 96 | } |
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| 97 | |
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[11c6677] | 98 | /* target_reset(): |
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| 99 | * The default (absolute minimum) action to be taken by this function |
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| 100 | * is to call monrestart(INITIALIZE). It would be better if there was |
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| 101 | * some target-specific function that would really cause the target |
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| 102 | * to reset... |
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[dee5246] | 103 | */ |
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| 104 | void |
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[11c6677] | 105 | target_reset(void) |
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[dee5246] | 106 | { |
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[11c6677] | 107 | // flushDcache(0,0); |
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| 108 | // disableDcache(); |
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| 109 | // invalidateIcache(0,0); |
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| 110 | // disableIcache(); |
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| 111 | monrestart(INITIALIZE); |
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[dee5246] | 112 | } |
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| 113 | |
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[a5f94c8] | 114 | /* Override the default exception handlers provided by the AM335x |
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| 115 | * internal ROM code with uMon's custom exception handlers |
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| 116 | */ |
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| 117 | void |
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| 118 | ram_vector_install(void) |
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| 119 | { |
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| 120 | extern unsigned long abort_data; |
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| 121 | extern unsigned long abort_prefetch; |
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| 122 | extern unsigned long undefined_instruction; |
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| 123 | extern unsigned long software_interrupt; |
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| 124 | extern unsigned long interrupt_request; |
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| 125 | extern unsigned long fast_interrupt_request; |
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| 126 | extern unsigned long not_assigned; |
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| 127 | |
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| 128 | *(ulong **)0x4030ce24 = &undefined_instruction; |
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| 129 | *(ulong **)0x4030ce28 = &software_interrupt; |
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| 130 | *(ulong **)0x4030ce2c = &abort_prefetch; |
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| 131 | *(ulong **)0x4030ce30 = &abort_data; |
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| 132 | *(ulong **)0x4030ce34 = ¬_assigned; |
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| 133 | *(ulong **)0x4030ce38 = &interrupt_request; |
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| 134 | *(ulong **)0x4030ce3c = &fast_interrupt_request; |
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| 135 | } |
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| 136 | |
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[d77ed25] | 137 | void |
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| 138 | pinMuxInit(void) |
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| 139 | { |
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| 140 | // Set pin mux configuration for UART0 RX/TX pins |
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| 141 | CNTL_MODULE_REG(CONF_UART0_RXD) = SLEWSLOW | RX_ON | |
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| 142 | PULL_OFF | MUXMODE_0; |
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| 143 | CNTL_MODULE_REG(CONF_UART0_TXD) = SLEWSLOW | RX_OFF | |
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| 144 | PULL_OFF | MUXMODE_0; |
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| 145 | } |
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| 146 | |
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[11c6677] | 147 | /* If any CPU IO wasn't initialized in reset.S, do it here... |
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| 148 | * This just provides a "C-level" IO init opportunity. |
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[dee5246] | 149 | */ |
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| 150 | void |
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[11c6677] | 151 | initCPUio(void) |
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[dee5246] | 152 | { |
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[a5f94c8] | 153 | ram_vector_install(); |
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[d77ed25] | 154 | |
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| 155 | // Enable the control module: |
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| 156 | CM_WKUP_REG(CM_WKUP_CONTROL_CLKCTRL) |= 2; |
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| 157 | |
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| 158 | // Enable clock for UART0: |
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| 159 | CM_WKUP_REG(CM_WKUP_UART0_CLKCTRL) |= 2; |
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| 160 | |
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| 161 | pinMuxInit(); |
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| 162 | |
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| 163 | InitUART(DEFAULT_BAUD_RATE); |
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| 164 | |
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| 165 | // Set UART0 mode to 16x |
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| 166 | UART0_REG(UART_MDR1) &= ~7; |
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[dee5246] | 167 | } |
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