1 | //========================================================================== |
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2 | // |
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3 | // cpu_i2c.c |
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4 | // |
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5 | // Author(s): Michael Kelly - Cogent Computer Systems, Inc. |
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6 | // Date: 03/30/2002 |
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7 | // Description: CSB272 - 405GP Single Board IIC Routines |
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8 | // |
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9 | //========================================================================== |
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10 | |
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11 | #include "config.h" |
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12 | #include "cpuio.h" |
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13 | #include "genlib.h" |
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14 | #include "stddefs.h" |
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15 | |
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16 | //-------------------------------------------------------------------------- |
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17 | // some 405GP I2C register and bit defines |
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18 | // |
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19 | #define I2C_XCTL *(vulong *)(0xef60050f) // extended control register |
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20 | #define I2C_XCTL_SRST 0x01000000 // Soft Reset Bit - must be set |
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21 | // to 1 to use direct control |
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22 | |
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23 | #define I2C_DCTL *(vulong *)(0xef600510) // direct control of IIC bits |
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24 | #define I2C_DCTL_SDA_OUT 0x08000000 // SDA Out, 0 = drive low, 1 = tri-state |
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25 | #define I2C_DCTL_SCL_OUT 0x04000000 // SCL Out, 0 = drive low, 1 = tri-state |
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26 | #define I2C_DCTL_SDA_IN 0x02000000 // SDA In, Direct Read |
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27 | #define I2C_DCTL_SCL_IN 0x01000000 // SCL In, Direct Read |
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28 | |
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29 | //-------------------------------------------------------------------------- |
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30 | // Low level I2C Macros |
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31 | // |
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32 | #define I2C_SCL_CLR I2C_DCTL &= ~(I2C_DCTL_SCL_OUT) |
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33 | #define I2C_SCL_SET I2C_DCTL |= (I2C_DCTL_SCL_OUT) |
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34 | |
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35 | #define I2C_SDA_CLR I2C_DCTL &= ~(I2C_DCTL_SDA_OUT) |
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36 | #define I2C_SDA_SET I2C_DCTL |= (I2C_DCTL_SDA_OUT) |
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37 | |
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38 | #define I2C_SDA_RD I2C_DCTL & I2C_DCTL_SDA_IN |
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39 | #define I2C_SCL_RD I2C_DCTL & I2C_DCTL_SCL_IN |
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40 | |
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41 | #define I2C_DELAY udelay(100) |
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42 | |
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43 | //-------------------------------------------------------------------------- |
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44 | // function prototypes |
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45 | // |
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46 | ulong i2c_init(void); |
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47 | ulong i2c_wr_device(uchar dev, uchar reg, uchar data); |
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48 | ulong i2c_rd_device(uchar dev, uchar reg, uchar *data); |
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49 | ulong i2c_wr_byte(uchar data); |
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50 | uchar i2c_rd_byte(void); |
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51 | void i2c_start(void); |
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52 | void i2c_stop(void); |
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53 | |
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54 | extern void udelay(int delay); |
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55 | |
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56 | extern ulong sed_disp_mode; |
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57 | |
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58 | //-------------------------------------------------------------------------- |
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59 | // i2c_init() |
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60 | // |
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61 | // Initialize the I2C registers for direct I2C control |
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62 | ulong i2c_init() |
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63 | { |
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64 | // place the automatic I2C logic in reset |
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65 | I2C_XCTL |= I2C_XCTL_SRST; |
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66 | |
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67 | // Set the SCL and SDA outputs into tristate |
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68 | I2C_DCTL |= (I2C_DCTL_SDA_OUT | I2C_DCTL_SCL_OUT); |
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69 | |
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70 | return 0; |
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71 | |
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72 | } |
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73 | |
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74 | //-------------------------------------------------------------------------- |
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75 | // i2c_wr_device() |
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76 | // |
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77 | // This function writes an 8-bit value to the I2C device at the requested |
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78 | // register. |
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79 | // |
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80 | ulong i2c_wr_device(uchar dev, uchar reg, uchar data) |
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81 | { |
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82 | |
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83 | // issue a start command |
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84 | i2c_start(); |
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85 | |
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86 | // write the 7-bit device address with write = 0 |
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87 | if(i2c_wr_byte((dev << 1) & 0xfe)){ |
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88 | return -1; |
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89 | } |
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90 | // Write the 8-bit register address |
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91 | if(i2c_wr_byte(reg)){ |
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92 | return -1; |
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93 | } |
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94 | // Write the 8-bit data value |
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95 | if(i2c_wr_byte(data)){ |
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96 | return -1; |
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97 | } |
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98 | |
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99 | // issue a stop |
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100 | i2c_stop(); |
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101 | |
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102 | return 0; |
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103 | } |
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104 | |
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105 | //-------------------------------------------------------------------------- |
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106 | // i2c_rd_device() |
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107 | // |
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108 | // This function reads an 8-bit value from the I2C device at the requested |
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109 | // register. |
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110 | // |
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111 | ulong i2c_rd_device(uchar dev, uchar reg, uchar *data) |
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112 | { |
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113 | |
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114 | // issue a start command |
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115 | i2c_start(); |
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116 | |
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117 | // write the 7-bit device address with write = 0 |
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118 | if(i2c_wr_byte((dev << 1) & 0xfe)){ |
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119 | return -1; |
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120 | } |
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121 | // Write the 8-bit register address |
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122 | if(i2c_wr_byte(reg)){ |
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123 | return -1; |
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124 | } |
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125 | // repeat the start command |
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126 | i2c_start(); |
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127 | // write the 7-bit device address again plus data direction (read = 1) |
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128 | if(i2c_wr_byte((dev << 1) | 0x01)){ |
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129 | return -1; |
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130 | } |
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131 | *data = i2c_rd_byte(); |
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132 | |
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133 | // issue a stop |
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134 | i2c_stop(); |
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135 | |
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136 | return 0; |
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137 | } |
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138 | |
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139 | //-------------------------------------------------------------------------- |
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140 | // i2c_wr_byte() |
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141 | // |
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142 | // This function writes an 8-bit value to the I2C bus, MSB first. |
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143 | // Data is written by changing SDA during SCL low, then bringing |
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144 | // SCL high. SCL is returned low to setup for the next transition. |
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145 | // |
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146 | ulong i2c_wr_byte(uchar data) |
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147 | { |
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148 | |
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149 | int i; |
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150 | |
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151 | for (i = 0; i < 8; i++){ |
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152 | if (data & 0x80) { |
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153 | // write a 1 bit |
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154 | I2C_SDA_SET; |
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155 | I2C_DELAY; |
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156 | I2C_SCL_SET; |
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157 | I2C_DELAY; |
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158 | I2C_SCL_CLR; |
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159 | I2C_DELAY; |
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160 | } |
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161 | else { |
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162 | // write a 0 bit |
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163 | I2C_SDA_CLR; |
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164 | I2C_DELAY; |
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165 | I2C_SCL_SET; |
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166 | I2C_DELAY; |
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167 | I2C_SCL_CLR; |
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168 | I2C_DELAY; |
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169 | } |
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170 | data = data << 1; |
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171 | } |
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172 | // Release SDA, bring SCL high, then read SDA. |
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173 | // A low indicates an acknowledge. |
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174 | I2C_SDA_SET; |
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175 | I2C_DELAY; |
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176 | I2C_SCL_SET; |
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177 | I2C_DELAY; |
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178 | if(I2C_SDA_RD){ // a high means no ack |
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179 | // re-enable SDA for output |
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180 | I2C_SCL_CLR; |
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181 | I2C_DELAY; |
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182 | return -1; |
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183 | } |
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184 | |
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185 | I2C_SCL_CLR; |
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186 | I2C_DELAY; |
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187 | |
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188 | return 0; |
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189 | } |
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190 | |
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191 | //-------------------------------------------------------------------------- |
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192 | // i2c_rd_byte() |
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193 | // |
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194 | // This function reads an 8-bit data value from the I2C bus, MSB first. |
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195 | // Data is read from SDA after each low to high SCL transition. |
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196 | // |
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197 | uchar i2c_rd_byte() |
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198 | { |
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199 | |
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200 | int i; |
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201 | uchar volatile data; |
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202 | |
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203 | data = 0; |
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204 | |
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205 | for (i = 0; i < 8; i++){ |
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206 | data = data << 1; |
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207 | data = data & 0xfe; |
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208 | // clock the data out of the slave |
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209 | I2C_SCL_SET; |
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210 | I2C_DELAY; |
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211 | // check it |
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212 | if (I2C_SDA_RD){ |
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213 | data = data | 0x01; |
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214 | } |
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215 | I2C_SCL_CLR; |
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216 | I2C_DELAY; |
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217 | } |
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218 | // generate an extra SCL transition |
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219 | // The slave generates no acknowledge for reads. |
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220 | I2C_SCL_SET; |
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221 | I2C_DELAY; |
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222 | I2C_SCL_CLR; |
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223 | I2C_DELAY; |
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224 | |
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225 | return data; |
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226 | } |
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227 | |
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228 | |
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229 | //-------------------------------------------------------------------------- |
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230 | // i2c_start() |
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231 | // |
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232 | // This function issues an I2C start command which is a high to low |
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233 | // transition on SDA while SCL is high. |
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234 | // |
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235 | void i2c_start() |
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236 | { |
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237 | |
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238 | I2C_SDA_SET; |
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239 | I2C_DELAY; |
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240 | I2C_SCL_SET; |
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241 | I2C_DELAY; |
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242 | I2C_SDA_CLR; |
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243 | I2C_DELAY; |
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244 | I2C_SCL_CLR; |
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245 | I2C_DELAY; |
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246 | I2C_SDA_SET; |
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247 | I2C_DELAY; |
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248 | } |
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249 | |
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250 | //-------------------------------------------------------------------------- |
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251 | // i2c_stop() |
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252 | // |
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253 | // This function issues an I2C stop command which is a low to high |
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254 | // transition on SDA while SCL is high. |
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255 | // |
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256 | void i2c_stop() |
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257 | { |
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258 | |
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259 | I2C_SDA_CLR; |
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260 | I2C_DELAY; |
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261 | I2C_SCL_SET; |
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262 | I2C_DELAY; |
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263 | I2C_SDA_SET; |
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264 | I2C_DELAY; |
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265 | I2C_SCL_CLR; |
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266 | I2C_DELAY; |
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267 | } |
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268 | |
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269 | |
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