source: umon/main/cpu/arm/arm.h @ 87db514

Last change on this file since 87db514 was 87db514, checked in by Amar Takhar <amar@…>, on 04/16/15 at 19:26:21

Initial commit of the umon repository.

Prior to this three changes were made:

  • Remove umon_ prefix from parent directories.
  • Collapse main/target/ into main/
  • Remove ports/template/flashtest.scr.ucon script.
  • Property mode set to 100644
File size: 2.4 KB
Line 
1/**************************************************************************
2 *
3 * Copyright (c) 2013 Alcatel-Lucent
4 *
5 * Alcatel Lucent licenses this file to You under the Apache License,
6 * Version 2.0 (the "License"); you may not use this file except in
7 * compliance with the License.  A copy of the License is contained the
8 * file LICENSE at the top level of this repository.
9 * You may also obtain a copy of the License at:
10 *
11 *      http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 **************************************************************************
20 *
21 * arm.h
22 *
23 * PSR Bits
24 *
25 * Original author:     Ed Sutter (ed.sutter@alcatel-lucent.com)
26 *
27 */
28#define PSR_THUMB_STATE                 0x00000020
29#define PSR_IMASK_IRQ                   0x00000080
30#define PSR_IMASK_FRQ                   0x00000040
31#define PSR_CONDITION_NEGATIVE  0x80000000
32#define PSR_CONDITION_ZERO              0x40000000
33#define PSR_CONDITION_CARRY             0x20000000
34#define PSR_CONDITION_OVERFLOW  0x10000000
35#define PSR_MODE_MASK                   0x0000001f
36
37/* Mode bits within PSR:
38 */
39#define ABORT_MODE                      0x00000017
40#define FASTINTRQST_MODE        0x00000011
41#define INTRQST_MODE            0x00000012
42#define SUPERVISOR_MODE         0x00000013
43#define SYSTEM_MODE                     0x0000001f
44#define UNDEFINED_MODE          0x0000001b
45#define USER_MODE                       0x00000010
46
47/* Exception types:
48 */
49#define EXCTYPE_UNDEF           1
50#define EXCTYPE_ABORTP          2
51#define EXCTYPE_ABORTD          3
52#define EXCTYPE_IRQ                     4
53#define EXCTYPE_FIRQ            5
54#define EXCTYPE_SWI                     6
55#define EXCTYPE_NOTASSGN        7
56
57/* Link register adjustments for each exception:
58 * These adjustments are used by the exception handler to establish the
59 * address at which the exception occurred.
60 */
61#define LRADJ_UNDEF                     4
62#define LRADJ_ABORTP            4
63#define LRADJ_ABORTD            8
64#define LRADJ_IRQ                       4
65#define LRADJ_FIRQ                      4
66#define LRADJ_SWI                       4
67
68/* Vector numbers used by assign_handler and the mon_assignhandler()
69 * API function...
70 */
71#define VEC_RST              0
72#define VEC_UND              1
73#define VEC_SWI              2
74#define VEC_ABP              3
75#define VEC_ABD              4
76#define VEC_IRQ              5
77#define VEC_RESERVED         6
78#define VEC_FIQ              7
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