source: rtems/testsuites/validation/tc-signal-catch.c @ 586e06e

Last change on this file since 586e06e was 586e06e, checked in by Sebastian Huber <sebastian.huber@…>, on 03/11/21 at 20:40:03

validation: Improve wording

  • Property mode set to 100644
File size: 46.0 KB
RevLine 
[3e7d658]1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/**
4 * @file
5 *
6 * @ingroup RTEMSTestCaseRtemsSignalReqCatch
7 */
8
9/*
10 * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34/*
35 * This file is part of the RTEMS quality process and was automatically
36 * generated.  If you find something that needs to be fixed or
37 * worded better please post a report or patch to an RTEMS mailing list
38 * or raise a bug report:
39 *
40 * https://www.rtems.org/bugs.html
41 *
42 * For information on updating and regenerating please refer to the How-To
43 * section in the Software Requirements Engineering chapter of the
44 * RTEMS Software Engineering manual.  The manual is provided as a part of
45 * a release.  For development sources please refer to the online
46 * documentation at:
47 *
48 * https://docs.rtems.org
49 */
50
51#ifdef HAVE_CONFIG_H
52#include "config.h"
53#endif
54
55#include <rtems.h>
[83b1b25d]56#include <string.h>
57#include <rtems/score/smpbarrier.h>
[3e7d658]58
59#include <rtems/test.h>
60
61/**
62 * @defgroup RTEMSTestCaseRtemsSignalReqCatch spec:/rtems/signal/req/catch
63 *
64 * @ingroup RTEMSTestSuiteTestsuitesValidation0
65 * @ingroup RTEMSTestSuiteTestsuitesValidation1
66 *
67 * @{
68 */
69
[83b1b25d]70typedef enum {
71  RtemsSignalReqCatch_Pre_Pending_Yes,
72  RtemsSignalReqCatch_Pre_Pending_No,
73  RtemsSignalReqCatch_Pre_Pending_NA
74} RtemsSignalReqCatch_Pre_Pending;
75
[3e7d658]76typedef enum {
77  RtemsSignalReqCatch_Pre_Handler_Invalid,
78  RtemsSignalReqCatch_Pre_Handler_Valid,
79  RtemsSignalReqCatch_Pre_Handler_NA
80} RtemsSignalReqCatch_Pre_Handler;
81
82typedef enum {
83  RtemsSignalReqCatch_Pre_Preempt_Yes,
84  RtemsSignalReqCatch_Pre_Preempt_No,
85  RtemsSignalReqCatch_Pre_Preempt_NA
86} RtemsSignalReqCatch_Pre_Preempt;
87
88typedef enum {
89  RtemsSignalReqCatch_Pre_Timeslice_Yes,
90  RtemsSignalReqCatch_Pre_Timeslice_No,
91  RtemsSignalReqCatch_Pre_Timeslice_NA
92} RtemsSignalReqCatch_Pre_Timeslice;
93
94typedef enum {
95  RtemsSignalReqCatch_Pre_ASR_Yes,
96  RtemsSignalReqCatch_Pre_ASR_No,
97  RtemsSignalReqCatch_Pre_ASR_NA
98} RtemsSignalReqCatch_Pre_ASR;
99
100typedef enum {
101  RtemsSignalReqCatch_Pre_IntLvl_Zero,
102  RtemsSignalReqCatch_Pre_IntLvl_Positive,
103  RtemsSignalReqCatch_Pre_IntLvl_NA
104} RtemsSignalReqCatch_Pre_IntLvl;
105
106typedef enum {
107  RtemsSignalReqCatch_Post_Status_Ok,
108  RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
109  RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
110  RtemsSignalReqCatch_Post_Status_NA
111} RtemsSignalReqCatch_Post_Status;
112
113typedef enum {
114  RtemsSignalReqCatch_Post_Send_New,
115  RtemsSignalReqCatch_Post_Send_NotDef,
116  RtemsSignalReqCatch_Post_Send_NA
117} RtemsSignalReqCatch_Post_Send;
118
119typedef enum {
120  RtemsSignalReqCatch_Post_Preempt_Yes,
121  RtemsSignalReqCatch_Post_Preempt_No,
122  RtemsSignalReqCatch_Post_Preempt_NA
123} RtemsSignalReqCatch_Post_Preempt;
124
125typedef enum {
126  RtemsSignalReqCatch_Post_Timeslice_Yes,
127  RtemsSignalReqCatch_Post_Timeslice_No,
128  RtemsSignalReqCatch_Post_Timeslice_NA
129} RtemsSignalReqCatch_Post_Timeslice;
130
131typedef enum {
132  RtemsSignalReqCatch_Post_ASR_Yes,
133  RtemsSignalReqCatch_Post_ASR_No,
134  RtemsSignalReqCatch_Post_ASR_NA
135} RtemsSignalReqCatch_Post_ASR;
136
137typedef enum {
138  RtemsSignalReqCatch_Post_IntLvl_Zero,
139  RtemsSignalReqCatch_Post_IntLvl_Positive,
140  RtemsSignalReqCatch_Post_IntLvl_NA
141} RtemsSignalReqCatch_Post_IntLvl;
142
143/**
144 * @brief Test context for spec:/rtems/signal/req/catch test case.
145 */
146typedef struct {
[83b1b25d]147  rtems_id runner_id;
148
149  rtems_id worker_id;
150
151  uint32_t pending_signals;
152
153  SMP_barrier_Control barrier;
154
155  SMP_barrier_State runner_barrier_state;
156
[3e7d658]157  uint32_t default_handler_calls;
158
159  uint32_t handler_calls;
160
161  rtems_mode handler_mode;
162
163  rtems_mode normal_mode;
164
165  rtems_asr_entry handler;
166
167  rtems_mode mode;
168
169  rtems_status_code catch_status;
170
171  rtems_status_code send_status;
172
173  /**
174   * @brief This member defines the pre-condition states for the next action.
175   */
[83b1b25d]176  size_t pcs[ 6 ];
[3e7d658]177
178  /**
179   * @brief This member indicates if the test action loop is currently
180   *   executed.
181   */
182  bool in_action_loop;
183} RtemsSignalReqCatch_Context;
184
185static RtemsSignalReqCatch_Context
186  RtemsSignalReqCatch_Instance;
187
[83b1b25d]188static const char * const RtemsSignalReqCatch_PreDesc_Pending[] = {
189  "Yes",
190  "No",
191  "NA"
192};
193
[3e7d658]194static const char * const RtemsSignalReqCatch_PreDesc_Handler[] = {
195  "Invalid",
196  "Valid",
197  "NA"
198};
199
200static const char * const RtemsSignalReqCatch_PreDesc_Preempt[] = {
201  "Yes",
202  "No",
203  "NA"
204};
205
206static const char * const RtemsSignalReqCatch_PreDesc_Timeslice[] = {
207  "Yes",
208  "No",
209  "NA"
210};
211
212static const char * const RtemsSignalReqCatch_PreDesc_ASR[] = {
213  "Yes",
214  "No",
215  "NA"
216};
217
218static const char * const RtemsSignalReqCatch_PreDesc_IntLvl[] = {
219  "Zero",
220  "Positive",
221  "NA"
222};
223
224static const char * const * const RtemsSignalReqCatch_PreDesc[] = {
[83b1b25d]225  RtemsSignalReqCatch_PreDesc_Pending,
[3e7d658]226  RtemsSignalReqCatch_PreDesc_Handler,
227  RtemsSignalReqCatch_PreDesc_Preempt,
228  RtemsSignalReqCatch_PreDesc_Timeslice,
229  RtemsSignalReqCatch_PreDesc_ASR,
230  RtemsSignalReqCatch_PreDesc_IntLvl,
231  NULL
232};
233
234typedef RtemsSignalReqCatch_Context Context;
235
236static void DefaultHandler( rtems_signal_set signal_set )
237{
238  Context *ctx;
239
240  ctx = T_fixture_context();
241  ++ctx->default_handler_calls;
242
[83b1b25d]243  if ( ctx->pending_signals != 0 && ctx->default_handler_calls == 1 ) {
244    T_eq_u32( signal_set, 0x600df00d );
245  } else {
246    T_eq_u32( signal_set, 0xdeadbeef );
247  }
[3e7d658]248}
249
250static void SignalHandler( rtems_signal_set signal_set )
251{
252  Context          *ctx;
253  rtems_status_code sc;
254
255  ctx = T_fixture_context();
256  ++ctx->handler_calls;
257
258  sc = rtems_task_mode(
259    RTEMS_DEFAULT_MODES,
260    RTEMS_CURRENT_MODE,
261    &ctx->handler_mode
262  );
263  T_rsc_success( sc );
264
[83b1b25d]265  if ( ctx->pending_signals != 0 && ctx->handler_calls == 1 ) {
266    T_eq_u32( signal_set, 0x600df00d );
267  } else {
268    T_eq_u32( signal_set, 0xdeadbeef );
269  }
[3e7d658]270}
271
272static void CheckHandlerMode( Context *ctx, rtems_mode mask, rtems_mode mode )
273{
274  if ( ctx->catch_status == RTEMS_SUCCESSFUL && ctx->handler != NULL ) {
275    T_ne_u32( ctx->handler_mode, 0xffffffff );
276    T_eq_u32( ctx->handler_mode & mask, mode );
277  }
278}
279
[83b1b25d]280static void Worker( rtems_task_argument arg )
281{
282  Context          *ctx;
283  SMP_barrier_State barrier_state;
284
285  ctx = (Context *) arg;
286  _SMP_barrier_State_initialize( &barrier_state );
287
288  while ( true ) {
289    rtems_status_code sc;
290
291    _SMP_barrier_Wait( &ctx->barrier, &barrier_state, 2 );
292
293    sc = rtems_signal_send( ctx->runner_id, 0x600df00d );
294    T_rsc_success( sc );
295
296    _SMP_barrier_Wait( &ctx->barrier, &barrier_state, 2 );
297  }
298}
299
300static void RtemsSignalReqCatch_Pre_Pending_Prepare(
301  RtemsSignalReqCatch_Context    *ctx,
302  RtemsSignalReqCatch_Pre_Pending state
303)
304{
305  switch ( state ) {
306    case RtemsSignalReqCatch_Pre_Pending_Yes: {
307      /*
[586e06e]308       * Where the system has more than one processor, while the calling task
309       * has pending signals, the rtems_signal_catch() directive shall be
310       * called. Where the system has exactly one processor, while the calling
311       * task has no pending signals, the rtems_signal_catch() directive shall
312       * be called.
[83b1b25d]313       */
314      ctx->pending_signals = ( rtems_scheduler_get_processor_maximum() > 1 ) ? 1 : 0;
315      break;
316    }
317
318    case RtemsSignalReqCatch_Pre_Pending_No: {
319      /*
[586e06e]320       * While the calling task has no pending signals, the
321       * rtems_signal_catch() directive shall be called.
[83b1b25d]322       */
323      ctx->pending_signals = 0;
324      break;
325    }
326
327    case RtemsSignalReqCatch_Pre_Pending_NA:
328      break;
329  }
330}
331
[3e7d658]332static void RtemsSignalReqCatch_Pre_Handler_Prepare(
333  RtemsSignalReqCatch_Context    *ctx,
334  RtemsSignalReqCatch_Pre_Handler state
335)
336{
337  switch ( state ) {
338    case RtemsSignalReqCatch_Pre_Handler_Invalid: {
[54c9630]339      /*
340       * The ``asr_handler`` parameter shall be NULL.
341       */
[3e7d658]342      ctx->handler = NULL;
343      break;
344    }
345
346    case RtemsSignalReqCatch_Pre_Handler_Valid: {
[54c9630]347      /*
348       * The ``asr_handler`` parameter shall be a valid ASR handler.
349       */
[3e7d658]350      ctx->handler = SignalHandler;
351      break;
352    }
353
354    case RtemsSignalReqCatch_Pre_Handler_NA:
355      break;
356  }
357}
358
359static void RtemsSignalReqCatch_Pre_Preempt_Prepare(
360  RtemsSignalReqCatch_Context    *ctx,
361  RtemsSignalReqCatch_Pre_Preempt state
362)
363{
364  switch ( state ) {
365    case RtemsSignalReqCatch_Pre_Preempt_Yes: {
[54c9630]366      /*
[c0c4b8b]367       * The ``mode_set`` parameter shall specify that preemption is enabled.
[54c9630]368       */
[3e7d658]369      #if defined(RTEMS_SMP)
370      if ( rtems_configuration_get_maximum_processors() == 1 ) {
371        ctx->normal_mode |= RTEMS_NO_PREEMPT;
372      }
373      #else
374      ctx->normal_mode |= RTEMS_NO_PREEMPT;
375      #endif
376      break;
377    }
378
379    case RtemsSignalReqCatch_Pre_Preempt_No: {
[54c9630]380      /*
[c0c4b8b]381       * The ``mode_set`` parameter shall specify that preemption is disabled.
[54c9630]382       */
[3e7d658]383      ctx->mode |= RTEMS_NO_PREEMPT;
384      break;
385    }
386
387    case RtemsSignalReqCatch_Pre_Preempt_NA:
388      break;
389  }
390}
391
392static void RtemsSignalReqCatch_Pre_Timeslice_Prepare(
393  RtemsSignalReqCatch_Context      *ctx,
394  RtemsSignalReqCatch_Pre_Timeslice state
395)
396{
397  switch ( state ) {
398    case RtemsSignalReqCatch_Pre_Timeslice_Yes: {
[54c9630]399      /*
[c0c4b8b]400       * The ``mode_set`` parameter shall specify that timeslicing is enabled.
[54c9630]401       */
[3e7d658]402      ctx->mode |= RTEMS_TIMESLICE;
403      break;
404    }
405
406    case RtemsSignalReqCatch_Pre_Timeslice_No: {
[54c9630]407      /*
[c0c4b8b]408       * The ``mode_set`` parameter shall specify that timeslicing is disabled.
[54c9630]409       */
[3e7d658]410      ctx->normal_mode |= RTEMS_TIMESLICE;
411      break;
412    }
413
414    case RtemsSignalReqCatch_Pre_Timeslice_NA:
415      break;
416  }
417}
418
419static void RtemsSignalReqCatch_Pre_ASR_Prepare(
420  RtemsSignalReqCatch_Context *ctx,
421  RtemsSignalReqCatch_Pre_ASR  state
422)
423{
424  switch ( state ) {
425    case RtemsSignalReqCatch_Pre_ASR_Yes: {
[54c9630]426      /*
[c0c4b8b]427       * The ``mode_set`` parameter shall specify that ASR processing is
428       * enabled.
[54c9630]429       */
[3e7d658]430      /* We cannot disable ASR processing at normal task level for this test */
431      break;
432    }
433
434    case RtemsSignalReqCatch_Pre_ASR_No: {
[54c9630]435      /*
[c0c4b8b]436       * The ``mode_set`` parameter shall specify that ASR processing is
437       * disabled.
[54c9630]438       */
[3e7d658]439      ctx->mode |= RTEMS_NO_ASR;
440      break;
441    }
442
443    case RtemsSignalReqCatch_Pre_ASR_NA:
444      break;
445  }
446}
447
448static void RtemsSignalReqCatch_Pre_IntLvl_Prepare(
449  RtemsSignalReqCatch_Context   *ctx,
450  RtemsSignalReqCatch_Pre_IntLvl state
451)
452{
453  switch ( state ) {
454    case RtemsSignalReqCatch_Pre_IntLvl_Zero: {
[54c9630]455      /*
[c0c4b8b]456       * The ``mode_set`` parameter shall specify an interrupt level of zero.
[54c9630]457       */
[3e7d658]458      #if !defined(RTEMS_SMP) && CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE
459      ctx->normal_mode |= RTEMS_INTERRUPT_LEVEL( 1 );
460      #endif
461      break;
462    }
463
464    case RtemsSignalReqCatch_Pre_IntLvl_Positive: {
[54c9630]465      /*
[c0c4b8b]466       * The ``mode_set`` parameter shall specify a positive interrupt level.
[54c9630]467       */
[3e7d658]468      ctx->mode |= RTEMS_INTERRUPT_LEVEL( 1 );
469      break;
470    }
471
472    case RtemsSignalReqCatch_Pre_IntLvl_NA:
473      break;
474  }
475}
476
477static void RtemsSignalReqCatch_Post_Status_Check(
478  RtemsSignalReqCatch_Context    *ctx,
479  RtemsSignalReqCatch_Post_Status state
480)
481{
482  switch ( state ) {
483    case RtemsSignalReqCatch_Post_Status_Ok: {
[54c9630]484      /*
[c0c4b8b]485       * The return status of rtems_signal_catch() shall be RTEMS_SUCCESSFUL.
[54c9630]486       */
[3e7d658]487      T_rsc_success( ctx->catch_status );
488      break;
489    }
490
491    case RtemsSignalReqCatch_Post_Status_NotImplNoPreempt: {
[54c9630]492      /*
493       * Where the system is configured with SMP support, if the scheduler does
494       * not support the no-preempt mode, then the return status of
[c0c4b8b]495       * rtems_signal_catch() shall be RTEMS_NOT_IMPLEMENTED, otherwise the
496       * return status shall be RTEMS_SUCCESSFUL.
[54c9630]497       */
[3e7d658]498      #if defined(RTEMS_SMP)
499      if ( rtems_configuration_get_maximum_processors() > 1 ) {
500        T_rsc( ctx->catch_status, RTEMS_NOT_IMPLEMENTED );
501      } else {
502        T_rsc_success( ctx->catch_status );
503      }
504      #else
505      T_rsc_success( ctx->catch_status );
506      #endif
507      break;
508    }
509
510    case RtemsSignalReqCatch_Post_Status_NotImplIntLvl: {
[54c9630]511      /*
512       * Where the system is configured with SMP support and the configured
513       * processor maximum is greater than one, or the CPU port enabled robust
514       * thread dispatching, the return status of rtems_signal_catch() shall be
[c0c4b8b]515       * RTEMS_NOT_IMPLEMENTED, otherwise the return status shall be
516       * RTEMS_SUCCESSFUL.
[54c9630]517       */
[3e7d658]518      #if CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE
519      T_rsc( ctx->catch_status, RTEMS_NOT_IMPLEMENTED );
520      #elif defined(RTEMS_SMP)
521      if ( rtems_configuration_get_maximum_processors() > 1 ) {
522        T_rsc( ctx->catch_status, RTEMS_NOT_IMPLEMENTED );
523      } else {
524        T_rsc_success( ctx->catch_status );
525      }
526      #else
527      T_rsc_success( ctx->catch_status );
528      #endif
529      break;
530    }
531
532    case RtemsSignalReqCatch_Post_Status_NA:
533      break;
534  }
535}
536
537static void RtemsSignalReqCatch_Post_Send_Check(
538  RtemsSignalReqCatch_Context  *ctx,
539  RtemsSignalReqCatch_Post_Send state
540)
541{
542  switch ( state ) {
543    case RtemsSignalReqCatch_Post_Send_New: {
[54c9630]544      /*
[c0c4b8b]545       * When a signal set is sent to the caller of rtems_signal_catch() and
546       * the call was successful, the ASR processing shall be done with the
547       * specified handler, otherwise the ASR information of the caller shall
548       * be unchanged.
[54c9630]549       */
[3e7d658]550      T_rsc_success( ctx->send_status );
551
552      if ( ctx->catch_status == RTEMS_SUCCESSFUL ) {
553        T_eq_u32( ctx->default_handler_calls, 0 );
[83b1b25d]554        T_eq_u32( ctx->handler_calls, 1 + ctx->pending_signals );
[3e7d658]555        T_ne_u32( ctx->handler_mode, 0xffffffff );
556      } else {
[83b1b25d]557        T_eq_u32( ctx->default_handler_calls, 1 + ctx->pending_signals );
[3e7d658]558        T_eq_u32( ctx->handler_calls, 0 );
559        T_eq_u32( ctx->handler_mode, 0xffffffff );
560      }
561      break;
562    }
563
564    case RtemsSignalReqCatch_Post_Send_NotDef: {
[54c9630]565      /*
[c0c4b8b]566       * When a signal set is sent to the caller of rtems_signal_catch() and
567       * the call was successful, the ASR processing shall be deactivated and
568       * all pending signals shall be cleared, otherwise the ASR information of
569       * the caller shall be unchanged.
[54c9630]570       */
[3e7d658]571      if ( ctx->catch_status == RTEMS_SUCCESSFUL ) {
572        T_rsc( ctx->send_status, RTEMS_NOT_DEFINED );
573        T_eq_u32( ctx->default_handler_calls, 0 );
574        T_eq_u32( ctx->handler_calls, 0 );
575        T_eq_u32( ctx->handler_mode, 0xffffffff );
576      } else {
577        T_rsc_success( ctx->send_status );
[83b1b25d]578        T_eq_u32( ctx->default_handler_calls, 1 + ctx->pending_signals );
[3e7d658]579        T_eq_u32( ctx->handler_calls, 0 );
580        T_eq_u32( ctx->handler_mode, 0xffffffff );
581      }
582      break;
583    }
584
585    case RtemsSignalReqCatch_Post_Send_NA:
586      break;
587  }
588}
589
590static void RtemsSignalReqCatch_Post_Preempt_Check(
591  RtemsSignalReqCatch_Context     *ctx,
592  RtemsSignalReqCatch_Post_Preempt state
593)
594{
595  switch ( state ) {
596    case RtemsSignalReqCatch_Post_Preempt_Yes: {
[54c9630]597      /*
[c0c4b8b]598       * When a signal set is sent to the caller of rtems_signal_catch() and
599       * the call with a valid handler was successful, the ASR processing shall
600       * be done with preemption enabled.
[54c9630]601       */
[3e7d658]602      CheckHandlerMode( ctx, RTEMS_PREEMPT_MASK, RTEMS_PREEMPT );
603      break;
604    }
605
606    case RtemsSignalReqCatch_Post_Preempt_No: {
[54c9630]607      /*
[c0c4b8b]608       * When a signal set is sent to the caller of rtems_signal_catch() and
609       * the call with a valid handler was successful, the ASR processing shall
610       * be done with preemption disabled.
[54c9630]611       */
[3e7d658]612      CheckHandlerMode( ctx, RTEMS_PREEMPT_MASK, RTEMS_NO_PREEMPT );
613      break;
614    }
615
616    case RtemsSignalReqCatch_Post_Preempt_NA:
617      break;
618  }
619}
620
621static void RtemsSignalReqCatch_Post_Timeslice_Check(
622  RtemsSignalReqCatch_Context       *ctx,
623  RtemsSignalReqCatch_Post_Timeslice state
624)
625{
626  switch ( state ) {
627    case RtemsSignalReqCatch_Post_Timeslice_Yes: {
[54c9630]628      /*
[c0c4b8b]629       * When a signal set is sent to the caller of rtems_signal_catch() and
630       * the call with a valid handler was successful, the ASR processing shall
631       * be done with timeslicing enabled.
[54c9630]632       */
[3e7d658]633      CheckHandlerMode( ctx, RTEMS_TIMESLICE_MASK, RTEMS_TIMESLICE );
634      break;
635    }
636
637    case RtemsSignalReqCatch_Post_Timeslice_No: {
[54c9630]638      /*
[c0c4b8b]639       * When a signal set is sent to the caller of rtems_signal_catch() and
640       * the call with a valid handler was successful, the ASR processing shall
641       * be done with timeslicing disabled.
[54c9630]642       */
[3e7d658]643      CheckHandlerMode( ctx, RTEMS_TIMESLICE_MASK, RTEMS_NO_TIMESLICE );
644      break;
645    }
646
647    case RtemsSignalReqCatch_Post_Timeslice_NA:
648      break;
649  }
650}
651
652static void RtemsSignalReqCatch_Post_ASR_Check(
653  RtemsSignalReqCatch_Context *ctx,
654  RtemsSignalReqCatch_Post_ASR state
655)
656{
657  switch ( state ) {
658    case RtemsSignalReqCatch_Post_ASR_Yes: {
[54c9630]659      /*
[c0c4b8b]660       * When a signal set is sent to the caller of rtems_signal_catch() and
661       * the call with a valid handler was successful, the ASR processing shall
662       * be done with ASR processing enabled.
[54c9630]663       */
[3e7d658]664      CheckHandlerMode( ctx, RTEMS_ASR_MASK, RTEMS_ASR );
665      break;
666    }
667
668    case RtemsSignalReqCatch_Post_ASR_No: {
[54c9630]669      /*
[c0c4b8b]670       * When a signal set is sent to the caller of rtems_signal_catch() and
671       * the call with a valid handler was successful, the ASR processing shall
672       * be done with ASR processing disabled.
[54c9630]673       */
[3e7d658]674      CheckHandlerMode( ctx, RTEMS_ASR_MASK, RTEMS_NO_ASR );
675      break;
676    }
677
678    case RtemsSignalReqCatch_Post_ASR_NA:
679      break;
680  }
681}
682
683static void RtemsSignalReqCatch_Post_IntLvl_Check(
684  RtemsSignalReqCatch_Context    *ctx,
685  RtemsSignalReqCatch_Post_IntLvl state
686)
687{
688  switch ( state ) {
689    case RtemsSignalReqCatch_Post_IntLvl_Zero: {
[54c9630]690      /*
[c0c4b8b]691       * When a signal set is sent to the caller of rtems_signal_catch() and
692       * the call with a valid handler was successful, the ASR processing shall
693       * be done with interrupts enabled.
[54c9630]694       */
[3e7d658]695      CheckHandlerMode( ctx, RTEMS_INTERRUPT_MASK, RTEMS_INTERRUPT_LEVEL( 0 ) );
696      break;
697    }
698
699    case RtemsSignalReqCatch_Post_IntLvl_Positive: {
[54c9630]700      /*
[c0c4b8b]701       * When a signal set is sent to the caller of rtems_signal_catch() and
702       * the call with a valid handler was successful, the ASR processing shall
703       * be done with interrupts disabled according to the specified interrupt
704       * level.
[54c9630]705       */
[3e7d658]706      CheckHandlerMode( ctx, RTEMS_INTERRUPT_MASK, RTEMS_INTERRUPT_LEVEL( 1 ) );
707      break;
708    }
709
710    case RtemsSignalReqCatch_Post_IntLvl_NA:
711      break;
712  }
713}
714
[83b1b25d]715static void RtemsSignalReqCatch_Setup( RtemsSignalReqCatch_Context *ctx )
716{
717  memset( ctx, 0, sizeof( *ctx ) );
718  ctx->runner_id = rtems_task_self();
719  _SMP_barrier_Control_initialize( &ctx->barrier );
720  _SMP_barrier_State_initialize( &ctx->runner_barrier_state );
721
722  if ( rtems_scheduler_get_processor_maximum() > 1 ) {
723    rtems_status_code sc;
724    rtems_id          scheduler_id;
725
726    sc = rtems_task_create(
727      rtems_build_name( 'W', 'O', 'R', 'K' ),
728      1,
729      RTEMS_MINIMUM_STACK_SIZE,
730      RTEMS_DEFAULT_MODES,
731      RTEMS_DEFAULT_ATTRIBUTES,
732      &ctx->worker_id
733    );
734    T_assert_rsc_success( sc );
735
736    sc = rtems_scheduler_ident_by_processor( 1, &scheduler_id );
737    T_assert_rsc_success( sc );
738
739    sc = rtems_task_set_scheduler( ctx->worker_id, scheduler_id, 1 );
740    T_assert_rsc_success( sc );
741
742    sc = rtems_task_start(
743      ctx->worker_id,
744      Worker,
745      (rtems_task_argument) ctx
746    );
747    T_assert_rsc_success( sc );
748  }
749}
750
751static void RtemsSignalReqCatch_Setup_Wrap( void *arg )
752{
753  RtemsSignalReqCatch_Context *ctx;
754
755  ctx = arg;
756  ctx->in_action_loop = false;
757  RtemsSignalReqCatch_Setup( ctx );
758}
759
[3e7d658]760static void RtemsSignalReqCatch_Teardown( RtemsSignalReqCatch_Context *ctx )
761{
762  rtems_status_code sc;
763
[83b1b25d]764  if ( ctx->worker_id != 0 ) {
765    sc = rtems_task_delete( ctx->worker_id );
766    T_rsc_success( sc );
767  }
768
[3e7d658]769  sc = rtems_signal_catch( NULL, RTEMS_DEFAULT_MODES );
770  T_rsc_success( sc );
771}
772
773static void RtemsSignalReqCatch_Teardown_Wrap( void *arg )
774{
775  RtemsSignalReqCatch_Context *ctx;
776
777  ctx = arg;
778  ctx->in_action_loop = false;
779  RtemsSignalReqCatch_Teardown( ctx );
780}
781
782static size_t RtemsSignalReqCatch_Scope( void *arg, char *buf, size_t n )
783{
784  RtemsSignalReqCatch_Context *ctx;
785
786  ctx = arg;
787
788  if ( ctx->in_action_loop ) {
789    return T_get_scope( RtemsSignalReqCatch_PreDesc, buf, n, ctx->pcs );
790  }
791
792  return 0;
793}
794
795static T_fixture RtemsSignalReqCatch_Fixture = {
[83b1b25d]796  .setup = RtemsSignalReqCatch_Setup_Wrap,
[3e7d658]797  .stop = NULL,
798  .teardown = RtemsSignalReqCatch_Teardown_Wrap,
799  .scope = RtemsSignalReqCatch_Scope,
800  .initial_context = &RtemsSignalReqCatch_Instance
801};
802
803static const uint8_t RtemsSignalReqCatch_TransitionMap[][ 6 ] = {
804  {
805    RtemsSignalReqCatch_Post_Status_Ok,
806    RtemsSignalReqCatch_Post_Send_NotDef,
807    RtemsSignalReqCatch_Post_Preempt_Yes,
808    RtemsSignalReqCatch_Post_Timeslice_Yes,
809    RtemsSignalReqCatch_Post_ASR_Yes,
810    RtemsSignalReqCatch_Post_IntLvl_Zero
811  }, {
812    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
813    RtemsSignalReqCatch_Post_Send_NotDef,
814    RtemsSignalReqCatch_Post_Preempt_Yes,
815    RtemsSignalReqCatch_Post_Timeslice_Yes,
816    RtemsSignalReqCatch_Post_ASR_Yes,
817    RtemsSignalReqCatch_Post_IntLvl_Positive
818  }, {
819    RtemsSignalReqCatch_Post_Status_Ok,
820    RtemsSignalReqCatch_Post_Send_NotDef,
821    RtemsSignalReqCatch_Post_Preempt_Yes,
822    RtemsSignalReqCatch_Post_Timeslice_Yes,
823    RtemsSignalReqCatch_Post_ASR_No,
824    RtemsSignalReqCatch_Post_IntLvl_Zero
825  }, {
826    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
827    RtemsSignalReqCatch_Post_Send_NotDef,
828    RtemsSignalReqCatch_Post_Preempt_Yes,
829    RtemsSignalReqCatch_Post_Timeslice_Yes,
830    RtemsSignalReqCatch_Post_ASR_No,
831    RtemsSignalReqCatch_Post_IntLvl_Positive
832  }, {
833    RtemsSignalReqCatch_Post_Status_Ok,
834    RtemsSignalReqCatch_Post_Send_NotDef,
835    RtemsSignalReqCatch_Post_Preempt_Yes,
836    RtemsSignalReqCatch_Post_Timeslice_No,
837    RtemsSignalReqCatch_Post_ASR_Yes,
838    RtemsSignalReqCatch_Post_IntLvl_Zero
839  }, {
840    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
841    RtemsSignalReqCatch_Post_Send_NotDef,
842    RtemsSignalReqCatch_Post_Preempt_Yes,
843    RtemsSignalReqCatch_Post_Timeslice_No,
844    RtemsSignalReqCatch_Post_ASR_Yes,
845    RtemsSignalReqCatch_Post_IntLvl_Positive
846  }, {
847    RtemsSignalReqCatch_Post_Status_Ok,
848    RtemsSignalReqCatch_Post_Send_NotDef,
849    RtemsSignalReqCatch_Post_Preempt_Yes,
850    RtemsSignalReqCatch_Post_Timeslice_No,
851    RtemsSignalReqCatch_Post_ASR_No,
852    RtemsSignalReqCatch_Post_IntLvl_Zero
853  }, {
854    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
855    RtemsSignalReqCatch_Post_Send_NotDef,
856    RtemsSignalReqCatch_Post_Preempt_Yes,
857    RtemsSignalReqCatch_Post_Timeslice_No,
858    RtemsSignalReqCatch_Post_ASR_No,
859    RtemsSignalReqCatch_Post_IntLvl_Positive
860  }, {
861    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
862    RtemsSignalReqCatch_Post_Send_NotDef,
863    RtemsSignalReqCatch_Post_Preempt_No,
864    RtemsSignalReqCatch_Post_Timeslice_Yes,
865    RtemsSignalReqCatch_Post_ASR_Yes,
866    RtemsSignalReqCatch_Post_IntLvl_Zero
867  }, {
868    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
869    RtemsSignalReqCatch_Post_Send_NotDef,
870    RtemsSignalReqCatch_Post_Preempt_No,
871    RtemsSignalReqCatch_Post_Timeslice_Yes,
872    RtemsSignalReqCatch_Post_ASR_Yes,
873    RtemsSignalReqCatch_Post_IntLvl_Positive
874  }, {
875    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
876    RtemsSignalReqCatch_Post_Send_NotDef,
877    RtemsSignalReqCatch_Post_Preempt_No,
878    RtemsSignalReqCatch_Post_Timeslice_Yes,
879    RtemsSignalReqCatch_Post_ASR_No,
880    RtemsSignalReqCatch_Post_IntLvl_Zero
881  }, {
882    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
883    RtemsSignalReqCatch_Post_Send_NotDef,
884    RtemsSignalReqCatch_Post_Preempt_No,
885    RtemsSignalReqCatch_Post_Timeslice_Yes,
886    RtemsSignalReqCatch_Post_ASR_No,
887    RtemsSignalReqCatch_Post_IntLvl_Positive
888  }, {
889    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
890    RtemsSignalReqCatch_Post_Send_NotDef,
891    RtemsSignalReqCatch_Post_Preempt_No,
892    RtemsSignalReqCatch_Post_Timeslice_No,
893    RtemsSignalReqCatch_Post_ASR_Yes,
894    RtemsSignalReqCatch_Post_IntLvl_Zero
895  }, {
896    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
897    RtemsSignalReqCatch_Post_Send_NotDef,
898    RtemsSignalReqCatch_Post_Preempt_No,
899    RtemsSignalReqCatch_Post_Timeslice_No,
900    RtemsSignalReqCatch_Post_ASR_Yes,
901    RtemsSignalReqCatch_Post_IntLvl_Positive
902  }, {
903    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
904    RtemsSignalReqCatch_Post_Send_NotDef,
905    RtemsSignalReqCatch_Post_Preempt_No,
906    RtemsSignalReqCatch_Post_Timeslice_No,
907    RtemsSignalReqCatch_Post_ASR_No,
908    RtemsSignalReqCatch_Post_IntLvl_Zero
909  }, {
910    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
911    RtemsSignalReqCatch_Post_Send_NotDef,
912    RtemsSignalReqCatch_Post_Preempt_No,
913    RtemsSignalReqCatch_Post_Timeslice_No,
914    RtemsSignalReqCatch_Post_ASR_No,
915    RtemsSignalReqCatch_Post_IntLvl_Positive
916  }, {
917    RtemsSignalReqCatch_Post_Status_Ok,
918    RtemsSignalReqCatch_Post_Send_New,
919    RtemsSignalReqCatch_Post_Preempt_Yes,
920    RtemsSignalReqCatch_Post_Timeslice_Yes,
921    RtemsSignalReqCatch_Post_ASR_Yes,
922    RtemsSignalReqCatch_Post_IntLvl_Zero
923  }, {
924    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
925    RtemsSignalReqCatch_Post_Send_New,
926    RtemsSignalReqCatch_Post_Preempt_Yes,
927    RtemsSignalReqCatch_Post_Timeslice_Yes,
928    RtemsSignalReqCatch_Post_ASR_Yes,
929    RtemsSignalReqCatch_Post_IntLvl_Positive
930  }, {
931    RtemsSignalReqCatch_Post_Status_Ok,
932    RtemsSignalReqCatch_Post_Send_New,
933    RtemsSignalReqCatch_Post_Preempt_Yes,
934    RtemsSignalReqCatch_Post_Timeslice_Yes,
935    RtemsSignalReqCatch_Post_ASR_No,
936    RtemsSignalReqCatch_Post_IntLvl_Zero
937  }, {
938    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
939    RtemsSignalReqCatch_Post_Send_New,
940    RtemsSignalReqCatch_Post_Preempt_Yes,
941    RtemsSignalReqCatch_Post_Timeslice_Yes,
942    RtemsSignalReqCatch_Post_ASR_No,
943    RtemsSignalReqCatch_Post_IntLvl_Positive
944  }, {
945    RtemsSignalReqCatch_Post_Status_Ok,
946    RtemsSignalReqCatch_Post_Send_New,
947    RtemsSignalReqCatch_Post_Preempt_Yes,
948    RtemsSignalReqCatch_Post_Timeslice_No,
949    RtemsSignalReqCatch_Post_ASR_Yes,
950    RtemsSignalReqCatch_Post_IntLvl_Zero
951  }, {
952    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
953    RtemsSignalReqCatch_Post_Send_New,
954    RtemsSignalReqCatch_Post_Preempt_Yes,
955    RtemsSignalReqCatch_Post_Timeslice_No,
956    RtemsSignalReqCatch_Post_ASR_Yes,
957    RtemsSignalReqCatch_Post_IntLvl_Positive
958  }, {
959    RtemsSignalReqCatch_Post_Status_Ok,
960    RtemsSignalReqCatch_Post_Send_New,
961    RtemsSignalReqCatch_Post_Preempt_Yes,
962    RtemsSignalReqCatch_Post_Timeslice_No,
963    RtemsSignalReqCatch_Post_ASR_No,
964    RtemsSignalReqCatch_Post_IntLvl_Zero
965  }, {
966    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
967    RtemsSignalReqCatch_Post_Send_New,
968    RtemsSignalReqCatch_Post_Preempt_Yes,
969    RtemsSignalReqCatch_Post_Timeslice_No,
970    RtemsSignalReqCatch_Post_ASR_No,
971    RtemsSignalReqCatch_Post_IntLvl_Positive
972  }, {
973    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
974    RtemsSignalReqCatch_Post_Send_New,
975    RtemsSignalReqCatch_Post_Preempt_No,
976    RtemsSignalReqCatch_Post_Timeslice_Yes,
977    RtemsSignalReqCatch_Post_ASR_Yes,
978    RtemsSignalReqCatch_Post_IntLvl_Zero
979  }, {
980    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
981    RtemsSignalReqCatch_Post_Send_New,
982    RtemsSignalReqCatch_Post_Preempt_No,
983    RtemsSignalReqCatch_Post_Timeslice_Yes,
984    RtemsSignalReqCatch_Post_ASR_Yes,
985    RtemsSignalReqCatch_Post_IntLvl_Positive
986  }, {
987    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
988    RtemsSignalReqCatch_Post_Send_New,
989    RtemsSignalReqCatch_Post_Preempt_No,
990    RtemsSignalReqCatch_Post_Timeslice_Yes,
991    RtemsSignalReqCatch_Post_ASR_No,
992    RtemsSignalReqCatch_Post_IntLvl_Zero
993  }, {
994    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
995    RtemsSignalReqCatch_Post_Send_New,
996    RtemsSignalReqCatch_Post_Preempt_No,
997    RtemsSignalReqCatch_Post_Timeslice_Yes,
998    RtemsSignalReqCatch_Post_ASR_No,
999    RtemsSignalReqCatch_Post_IntLvl_Positive
1000  }, {
1001    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1002    RtemsSignalReqCatch_Post_Send_New,
1003    RtemsSignalReqCatch_Post_Preempt_No,
1004    RtemsSignalReqCatch_Post_Timeslice_No,
1005    RtemsSignalReqCatch_Post_ASR_Yes,
1006    RtemsSignalReqCatch_Post_IntLvl_Zero
1007  }, {
1008    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1009    RtemsSignalReqCatch_Post_Send_New,
1010    RtemsSignalReqCatch_Post_Preempt_No,
1011    RtemsSignalReqCatch_Post_Timeslice_No,
1012    RtemsSignalReqCatch_Post_ASR_Yes,
1013    RtemsSignalReqCatch_Post_IntLvl_Positive
1014  }, {
1015    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1016    RtemsSignalReqCatch_Post_Send_New,
1017    RtemsSignalReqCatch_Post_Preempt_No,
1018    RtemsSignalReqCatch_Post_Timeslice_No,
1019    RtemsSignalReqCatch_Post_ASR_No,
1020    RtemsSignalReqCatch_Post_IntLvl_Zero
1021  }, {
1022    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1023    RtemsSignalReqCatch_Post_Send_New,
1024    RtemsSignalReqCatch_Post_Preempt_No,
1025    RtemsSignalReqCatch_Post_Timeslice_No,
1026    RtemsSignalReqCatch_Post_ASR_No,
1027    RtemsSignalReqCatch_Post_IntLvl_Positive
[83b1b25d]1028  }, {
1029    RtemsSignalReqCatch_Post_Status_Ok,
1030    RtemsSignalReqCatch_Post_Send_NotDef,
1031    RtemsSignalReqCatch_Post_Preempt_Yes,
1032    RtemsSignalReqCatch_Post_Timeslice_Yes,
1033    RtemsSignalReqCatch_Post_ASR_Yes,
1034    RtemsSignalReqCatch_Post_IntLvl_Zero
1035  }, {
1036    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1037    RtemsSignalReqCatch_Post_Send_NotDef,
1038    RtemsSignalReqCatch_Post_Preempt_Yes,
1039    RtemsSignalReqCatch_Post_Timeslice_Yes,
1040    RtemsSignalReqCatch_Post_ASR_Yes,
1041    RtemsSignalReqCatch_Post_IntLvl_Positive
1042  }, {
1043    RtemsSignalReqCatch_Post_Status_Ok,
1044    RtemsSignalReqCatch_Post_Send_NotDef,
1045    RtemsSignalReqCatch_Post_Preempt_Yes,
1046    RtemsSignalReqCatch_Post_Timeslice_Yes,
1047    RtemsSignalReqCatch_Post_ASR_No,
1048    RtemsSignalReqCatch_Post_IntLvl_Zero
1049  }, {
1050    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1051    RtemsSignalReqCatch_Post_Send_NotDef,
1052    RtemsSignalReqCatch_Post_Preempt_Yes,
1053    RtemsSignalReqCatch_Post_Timeslice_Yes,
1054    RtemsSignalReqCatch_Post_ASR_No,
1055    RtemsSignalReqCatch_Post_IntLvl_Positive
1056  }, {
1057    RtemsSignalReqCatch_Post_Status_Ok,
1058    RtemsSignalReqCatch_Post_Send_NotDef,
1059    RtemsSignalReqCatch_Post_Preempt_Yes,
1060    RtemsSignalReqCatch_Post_Timeslice_No,
1061    RtemsSignalReqCatch_Post_ASR_Yes,
1062    RtemsSignalReqCatch_Post_IntLvl_Zero
1063  }, {
1064    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1065    RtemsSignalReqCatch_Post_Send_NotDef,
1066    RtemsSignalReqCatch_Post_Preempt_Yes,
1067    RtemsSignalReqCatch_Post_Timeslice_No,
1068    RtemsSignalReqCatch_Post_ASR_Yes,
1069    RtemsSignalReqCatch_Post_IntLvl_Positive
1070  }, {
1071    RtemsSignalReqCatch_Post_Status_Ok,
1072    RtemsSignalReqCatch_Post_Send_NotDef,
1073    RtemsSignalReqCatch_Post_Preempt_Yes,
1074    RtemsSignalReqCatch_Post_Timeslice_No,
1075    RtemsSignalReqCatch_Post_ASR_No,
1076    RtemsSignalReqCatch_Post_IntLvl_Zero
1077  }, {
1078    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1079    RtemsSignalReqCatch_Post_Send_NotDef,
1080    RtemsSignalReqCatch_Post_Preempt_Yes,
1081    RtemsSignalReqCatch_Post_Timeslice_No,
1082    RtemsSignalReqCatch_Post_ASR_No,
1083    RtemsSignalReqCatch_Post_IntLvl_Positive
1084  }, {
1085    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1086    RtemsSignalReqCatch_Post_Send_NotDef,
1087    RtemsSignalReqCatch_Post_Preempt_No,
1088    RtemsSignalReqCatch_Post_Timeslice_Yes,
1089    RtemsSignalReqCatch_Post_ASR_Yes,
1090    RtemsSignalReqCatch_Post_IntLvl_Zero
1091  }, {
1092    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1093    RtemsSignalReqCatch_Post_Send_NotDef,
1094    RtemsSignalReqCatch_Post_Preempt_No,
1095    RtemsSignalReqCatch_Post_Timeslice_Yes,
1096    RtemsSignalReqCatch_Post_ASR_Yes,
1097    RtemsSignalReqCatch_Post_IntLvl_Positive
1098  }, {
1099    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1100    RtemsSignalReqCatch_Post_Send_NotDef,
1101    RtemsSignalReqCatch_Post_Preempt_No,
1102    RtemsSignalReqCatch_Post_Timeslice_Yes,
1103    RtemsSignalReqCatch_Post_ASR_No,
1104    RtemsSignalReqCatch_Post_IntLvl_Zero
1105  }, {
1106    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1107    RtemsSignalReqCatch_Post_Send_NotDef,
1108    RtemsSignalReqCatch_Post_Preempt_No,
1109    RtemsSignalReqCatch_Post_Timeslice_Yes,
1110    RtemsSignalReqCatch_Post_ASR_No,
1111    RtemsSignalReqCatch_Post_IntLvl_Positive
1112  }, {
1113    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1114    RtemsSignalReqCatch_Post_Send_NotDef,
1115    RtemsSignalReqCatch_Post_Preempt_No,
1116    RtemsSignalReqCatch_Post_Timeslice_No,
1117    RtemsSignalReqCatch_Post_ASR_Yes,
1118    RtemsSignalReqCatch_Post_IntLvl_Zero
1119  }, {
1120    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1121    RtemsSignalReqCatch_Post_Send_NotDef,
1122    RtemsSignalReqCatch_Post_Preempt_No,
1123    RtemsSignalReqCatch_Post_Timeslice_No,
1124    RtemsSignalReqCatch_Post_ASR_Yes,
1125    RtemsSignalReqCatch_Post_IntLvl_Positive
1126  }, {
1127    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1128    RtemsSignalReqCatch_Post_Send_NotDef,
1129    RtemsSignalReqCatch_Post_Preempt_No,
1130    RtemsSignalReqCatch_Post_Timeslice_No,
1131    RtemsSignalReqCatch_Post_ASR_No,
1132    RtemsSignalReqCatch_Post_IntLvl_Zero
1133  }, {
1134    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1135    RtemsSignalReqCatch_Post_Send_NotDef,
1136    RtemsSignalReqCatch_Post_Preempt_No,
1137    RtemsSignalReqCatch_Post_Timeslice_No,
1138    RtemsSignalReqCatch_Post_ASR_No,
1139    RtemsSignalReqCatch_Post_IntLvl_Positive
1140  }, {
1141    RtemsSignalReqCatch_Post_Status_Ok,
1142    RtemsSignalReqCatch_Post_Send_New,
1143    RtemsSignalReqCatch_Post_Preempt_Yes,
1144    RtemsSignalReqCatch_Post_Timeslice_Yes,
1145    RtemsSignalReqCatch_Post_ASR_Yes,
1146    RtemsSignalReqCatch_Post_IntLvl_Zero
1147  }, {
1148    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1149    RtemsSignalReqCatch_Post_Send_New,
1150    RtemsSignalReqCatch_Post_Preempt_Yes,
1151    RtemsSignalReqCatch_Post_Timeslice_Yes,
1152    RtemsSignalReqCatch_Post_ASR_Yes,
1153    RtemsSignalReqCatch_Post_IntLvl_Positive
1154  }, {
1155    RtemsSignalReqCatch_Post_Status_Ok,
1156    RtemsSignalReqCatch_Post_Send_New,
1157    RtemsSignalReqCatch_Post_Preempt_Yes,
1158    RtemsSignalReqCatch_Post_Timeslice_Yes,
1159    RtemsSignalReqCatch_Post_ASR_No,
1160    RtemsSignalReqCatch_Post_IntLvl_Zero
1161  }, {
1162    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1163    RtemsSignalReqCatch_Post_Send_New,
1164    RtemsSignalReqCatch_Post_Preempt_Yes,
1165    RtemsSignalReqCatch_Post_Timeslice_Yes,
1166    RtemsSignalReqCatch_Post_ASR_No,
1167    RtemsSignalReqCatch_Post_IntLvl_Positive
1168  }, {
1169    RtemsSignalReqCatch_Post_Status_Ok,
1170    RtemsSignalReqCatch_Post_Send_New,
1171    RtemsSignalReqCatch_Post_Preempt_Yes,
1172    RtemsSignalReqCatch_Post_Timeslice_No,
1173    RtemsSignalReqCatch_Post_ASR_Yes,
1174    RtemsSignalReqCatch_Post_IntLvl_Zero
1175  }, {
1176    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1177    RtemsSignalReqCatch_Post_Send_New,
1178    RtemsSignalReqCatch_Post_Preempt_Yes,
1179    RtemsSignalReqCatch_Post_Timeslice_No,
1180    RtemsSignalReqCatch_Post_ASR_Yes,
1181    RtemsSignalReqCatch_Post_IntLvl_Positive
1182  }, {
1183    RtemsSignalReqCatch_Post_Status_Ok,
1184    RtemsSignalReqCatch_Post_Send_New,
1185    RtemsSignalReqCatch_Post_Preempt_Yes,
1186    RtemsSignalReqCatch_Post_Timeslice_No,
1187    RtemsSignalReqCatch_Post_ASR_No,
1188    RtemsSignalReqCatch_Post_IntLvl_Zero
1189  }, {
1190    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1191    RtemsSignalReqCatch_Post_Send_New,
1192    RtemsSignalReqCatch_Post_Preempt_Yes,
1193    RtemsSignalReqCatch_Post_Timeslice_No,
1194    RtemsSignalReqCatch_Post_ASR_No,
1195    RtemsSignalReqCatch_Post_IntLvl_Positive
1196  }, {
1197    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1198    RtemsSignalReqCatch_Post_Send_New,
1199    RtemsSignalReqCatch_Post_Preempt_No,
1200    RtemsSignalReqCatch_Post_Timeslice_Yes,
1201    RtemsSignalReqCatch_Post_ASR_Yes,
1202    RtemsSignalReqCatch_Post_IntLvl_Zero
1203  }, {
1204    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1205    RtemsSignalReqCatch_Post_Send_New,
1206    RtemsSignalReqCatch_Post_Preempt_No,
1207    RtemsSignalReqCatch_Post_Timeslice_Yes,
1208    RtemsSignalReqCatch_Post_ASR_Yes,
1209    RtemsSignalReqCatch_Post_IntLvl_Positive
1210  }, {
1211    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1212    RtemsSignalReqCatch_Post_Send_New,
1213    RtemsSignalReqCatch_Post_Preempt_No,
1214    RtemsSignalReqCatch_Post_Timeslice_Yes,
1215    RtemsSignalReqCatch_Post_ASR_No,
1216    RtemsSignalReqCatch_Post_IntLvl_Zero
1217  }, {
1218    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1219    RtemsSignalReqCatch_Post_Send_New,
1220    RtemsSignalReqCatch_Post_Preempt_No,
1221    RtemsSignalReqCatch_Post_Timeslice_Yes,
1222    RtemsSignalReqCatch_Post_ASR_No,
1223    RtemsSignalReqCatch_Post_IntLvl_Positive
1224  }, {
1225    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1226    RtemsSignalReqCatch_Post_Send_New,
1227    RtemsSignalReqCatch_Post_Preempt_No,
1228    RtemsSignalReqCatch_Post_Timeslice_No,
1229    RtemsSignalReqCatch_Post_ASR_Yes,
1230    RtemsSignalReqCatch_Post_IntLvl_Zero
1231  }, {
1232    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1233    RtemsSignalReqCatch_Post_Send_New,
1234    RtemsSignalReqCatch_Post_Preempt_No,
1235    RtemsSignalReqCatch_Post_Timeslice_No,
1236    RtemsSignalReqCatch_Post_ASR_Yes,
1237    RtemsSignalReqCatch_Post_IntLvl_Positive
1238  }, {
1239    RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
1240    RtemsSignalReqCatch_Post_Send_New,
1241    RtemsSignalReqCatch_Post_Preempt_No,
1242    RtemsSignalReqCatch_Post_Timeslice_No,
1243    RtemsSignalReqCatch_Post_ASR_No,
1244    RtemsSignalReqCatch_Post_IntLvl_Zero
1245  }, {
1246    RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
1247    RtemsSignalReqCatch_Post_Send_New,
1248    RtemsSignalReqCatch_Post_Preempt_No,
1249    RtemsSignalReqCatch_Post_Timeslice_No,
1250    RtemsSignalReqCatch_Post_ASR_No,
1251    RtemsSignalReqCatch_Post_IntLvl_Positive
[3e7d658]1252  }
1253};
1254
1255static const struct {
1256  uint8_t Skip : 1;
[83b1b25d]1257  uint8_t Pre_Pending_NA : 1;
[3e7d658]1258  uint8_t Pre_Handler_NA : 1;
1259  uint8_t Pre_Preempt_NA : 1;
1260  uint8_t Pre_Timeslice_NA : 1;
1261  uint8_t Pre_ASR_NA : 1;
1262  uint8_t Pre_IntLvl_NA : 1;
1263} RtemsSignalReqCatch_TransitionInfo[] = {
1264  {
[83b1b25d]1265    0, 0, 0, 0, 0, 0, 0
1266  }, {
1267    0, 0, 0, 0, 0, 0, 0
1268  }, {
1269    0, 0, 0, 0, 0, 0, 0
1270  }, {
1271    0, 0, 0, 0, 0, 0, 0
1272  }, {
1273    0, 0, 0, 0, 0, 0, 0
1274  }, {
1275    0, 0, 0, 0, 0, 0, 0
1276  }, {
1277    0, 0, 0, 0, 0, 0, 0
1278  }, {
1279    0, 0, 0, 0, 0, 0, 0
1280  }, {
1281    0, 0, 0, 0, 0, 0, 0
1282  }, {
1283    0, 0, 0, 0, 0, 0, 0
1284  }, {
1285    0, 0, 0, 0, 0, 0, 0
1286  }, {
1287    0, 0, 0, 0, 0, 0, 0
1288  }, {
1289    0, 0, 0, 0, 0, 0, 0
1290  }, {
1291    0, 0, 0, 0, 0, 0, 0
1292  }, {
1293    0, 0, 0, 0, 0, 0, 0
1294  }, {
1295    0, 0, 0, 0, 0, 0, 0
1296  }, {
1297    0, 0, 0, 0, 0, 0, 0
[3e7d658]1298  }, {
[83b1b25d]1299    0, 0, 0, 0, 0, 0, 0
[3e7d658]1300  }, {
[83b1b25d]1301    0, 0, 0, 0, 0, 0, 0
[3e7d658]1302  }, {
[83b1b25d]1303    0, 0, 0, 0, 0, 0, 0
[3e7d658]1304  }, {
[83b1b25d]1305    0, 0, 0, 0, 0, 0, 0
[3e7d658]1306  }, {
[83b1b25d]1307    0, 0, 0, 0, 0, 0, 0
[3e7d658]1308  }, {
[83b1b25d]1309    0, 0, 0, 0, 0, 0, 0
[3e7d658]1310  }, {
[83b1b25d]1311    0, 0, 0, 0, 0, 0, 0
[3e7d658]1312  }, {
[83b1b25d]1313    0, 0, 0, 0, 0, 0, 0
[3e7d658]1314  }, {
[83b1b25d]1315    0, 0, 0, 0, 0, 0, 0
[3e7d658]1316  }, {
[83b1b25d]1317    0, 0, 0, 0, 0, 0, 0
[3e7d658]1318  }, {
[83b1b25d]1319    0, 0, 0, 0, 0, 0, 0
[3e7d658]1320  }, {
[83b1b25d]1321    0, 0, 0, 0, 0, 0, 0
[3e7d658]1322  }, {
[83b1b25d]1323    0, 0, 0, 0, 0, 0, 0
[3e7d658]1324  }, {
[83b1b25d]1325    0, 0, 0, 0, 0, 0, 0
[3e7d658]1326  }, {
[83b1b25d]1327    0, 0, 0, 0, 0, 0, 0
[3e7d658]1328  }, {
[83b1b25d]1329    0, 0, 0, 0, 0, 0, 0
[3e7d658]1330  }, {
[83b1b25d]1331    0, 0, 0, 0, 0, 0, 0
[3e7d658]1332  }, {
[83b1b25d]1333    0, 0, 0, 0, 0, 0, 0
[3e7d658]1334  }, {
[83b1b25d]1335    0, 0, 0, 0, 0, 0, 0
[3e7d658]1336  }, {
[83b1b25d]1337    0, 0, 0, 0, 0, 0, 0
[3e7d658]1338  }, {
[83b1b25d]1339    0, 0, 0, 0, 0, 0, 0
[3e7d658]1340  }, {
[83b1b25d]1341    0, 0, 0, 0, 0, 0, 0
[3e7d658]1342  }, {
[83b1b25d]1343    0, 0, 0, 0, 0, 0, 0
[3e7d658]1344  }, {
[83b1b25d]1345    0, 0, 0, 0, 0, 0, 0
[3e7d658]1346  }, {
[83b1b25d]1347    0, 0, 0, 0, 0, 0, 0
[3e7d658]1348  }, {
[83b1b25d]1349    0, 0, 0, 0, 0, 0, 0
[3e7d658]1350  }, {
[83b1b25d]1351    0, 0, 0, 0, 0, 0, 0
[3e7d658]1352  }, {
[83b1b25d]1353    0, 0, 0, 0, 0, 0, 0
[3e7d658]1354  }, {
[83b1b25d]1355    0, 0, 0, 0, 0, 0, 0
[3e7d658]1356  }, {
[83b1b25d]1357    0, 0, 0, 0, 0, 0, 0
[3e7d658]1358  }, {
[83b1b25d]1359    0, 0, 0, 0, 0, 0, 0
1360  }, {
1361    0, 0, 0, 0, 0, 0, 0
1362  }, {
1363    0, 0, 0, 0, 0, 0, 0
1364  }, {
1365    0, 0, 0, 0, 0, 0, 0
1366  }, {
1367    0, 0, 0, 0, 0, 0, 0
1368  }, {
1369    0, 0, 0, 0, 0, 0, 0
1370  }, {
1371    0, 0, 0, 0, 0, 0, 0
1372  }, {
1373    0, 0, 0, 0, 0, 0, 0
1374  }, {
1375    0, 0, 0, 0, 0, 0, 0
1376  }, {
1377    0, 0, 0, 0, 0, 0, 0
1378  }, {
1379    0, 0, 0, 0, 0, 0, 0
1380  }, {
1381    0, 0, 0, 0, 0, 0, 0
1382  }, {
1383    0, 0, 0, 0, 0, 0, 0
1384  }, {
1385    0, 0, 0, 0, 0, 0, 0
1386  }, {
1387    0, 0, 0, 0, 0, 0, 0
1388  }, {
1389    0, 0, 0, 0, 0, 0, 0
1390  }, {
1391    0, 0, 0, 0, 0, 0, 0
[3e7d658]1392  }
1393};
1394
1395static void RtemsSignalReqCatch_Prepare( RtemsSignalReqCatch_Context *ctx )
1396{
1397  rtems_status_code sc;
1398
1399  ctx->default_handler_calls = 0;
1400  ctx->handler_calls = 0;
1401  ctx->handler_mode = 0xffffffff;
1402  ctx->normal_mode = RTEMS_DEFAULT_MODES;
1403  ctx->handler = NULL;
1404  ctx->mode = RTEMS_DEFAULT_MODES;
1405
1406  sc = rtems_signal_catch( DefaultHandler, RTEMS_NO_ASR );
1407  T_rsc_success( sc );
1408}
1409
1410static void RtemsSignalReqCatch_Action( RtemsSignalReqCatch_Context *ctx )
1411{
1412  rtems_status_code sc;
1413  rtems_mode        mode;
1414
[83b1b25d]1415  if ( ctx->pending_signals != 0 ) {
1416    rtems_interrupt_level level;
1417
1418    rtems_interrupt_local_disable(level);
1419    _SMP_barrier_Wait( &ctx->barrier, &ctx->runner_barrier_state, 2 );
1420    _SMP_barrier_Wait( &ctx->barrier, &ctx->runner_barrier_state, 2 );
1421    ctx->catch_status = rtems_signal_catch( ctx->handler, ctx->mode );
1422    rtems_interrupt_local_enable(level);
1423  } else {
1424    ctx->catch_status = rtems_signal_catch( ctx->handler, ctx->mode );
1425  }
[3e7d658]1426
1427  sc = rtems_task_mode( ctx->normal_mode, RTEMS_ALL_MODE_MASKS, &mode );
1428  T_rsc_success( sc );
1429
1430  ctx->send_status = rtems_signal_send( RTEMS_SELF, 0xdeadbeef );
1431
1432  sc = rtems_task_mode( mode, RTEMS_ALL_MODE_MASKS, &mode );
1433  T_rsc_success( sc );
1434}
1435
1436/**
1437 * @fn void T_case_body_RtemsSignalReqCatch( void )
1438 */
1439T_TEST_CASE_FIXTURE( RtemsSignalReqCatch, &RtemsSignalReqCatch_Fixture )
1440{
1441  RtemsSignalReqCatch_Context *ctx;
1442  size_t index;
1443
1444  ctx = T_fixture_context();
1445  ctx->in_action_loop = true;
1446  index = 0;
1447
1448  for (
[83b1b25d]1449    ctx->pcs[ 0 ] = RtemsSignalReqCatch_Pre_Pending_Yes;
1450    ctx->pcs[ 0 ] < RtemsSignalReqCatch_Pre_Pending_NA;
[3e7d658]1451    ++ctx->pcs[ 0 ]
1452  ) {
[83b1b25d]1453    if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Pending_NA ) {
1454      ctx->pcs[ 0 ] = RtemsSignalReqCatch_Pre_Pending_NA;
1455      index += ( RtemsSignalReqCatch_Pre_Pending_NA - 1 )
1456        * RtemsSignalReqCatch_Pre_Handler_NA
[3e7d658]1457        * RtemsSignalReqCatch_Pre_Preempt_NA
1458        * RtemsSignalReqCatch_Pre_Timeslice_NA
1459        * RtemsSignalReqCatch_Pre_ASR_NA
1460        * RtemsSignalReqCatch_Pre_IntLvl_NA;
1461    }
1462
1463    for (
[83b1b25d]1464      ctx->pcs[ 1 ] = RtemsSignalReqCatch_Pre_Handler_Invalid;
1465      ctx->pcs[ 1 ] < RtemsSignalReqCatch_Pre_Handler_NA;
[3e7d658]1466      ++ctx->pcs[ 1 ]
1467    ) {
[83b1b25d]1468      if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Handler_NA ) {
1469        ctx->pcs[ 1 ] = RtemsSignalReqCatch_Pre_Handler_NA;
1470        index += ( RtemsSignalReqCatch_Pre_Handler_NA - 1 )
1471          * RtemsSignalReqCatch_Pre_Preempt_NA
[3e7d658]1472          * RtemsSignalReqCatch_Pre_Timeslice_NA
1473          * RtemsSignalReqCatch_Pre_ASR_NA
1474          * RtemsSignalReqCatch_Pre_IntLvl_NA;
1475      }
1476
1477      for (
[83b1b25d]1478        ctx->pcs[ 2 ] = RtemsSignalReqCatch_Pre_Preempt_Yes;
1479        ctx->pcs[ 2 ] < RtemsSignalReqCatch_Pre_Preempt_NA;
[3e7d658]1480        ++ctx->pcs[ 2 ]
1481      ) {
[83b1b25d]1482        if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Preempt_NA ) {
1483          ctx->pcs[ 2 ] = RtemsSignalReqCatch_Pre_Preempt_NA;
1484          index += ( RtemsSignalReqCatch_Pre_Preempt_NA - 1 )
1485            * RtemsSignalReqCatch_Pre_Timeslice_NA
[3e7d658]1486            * RtemsSignalReqCatch_Pre_ASR_NA
1487            * RtemsSignalReqCatch_Pre_IntLvl_NA;
1488        }
1489
1490        for (
[83b1b25d]1491          ctx->pcs[ 3 ] = RtemsSignalReqCatch_Pre_Timeslice_Yes;
1492          ctx->pcs[ 3 ] < RtemsSignalReqCatch_Pre_Timeslice_NA;
[3e7d658]1493          ++ctx->pcs[ 3 ]
1494        ) {
[83b1b25d]1495          if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Timeslice_NA ) {
1496            ctx->pcs[ 3 ] = RtemsSignalReqCatch_Pre_Timeslice_NA;
1497            index += ( RtemsSignalReqCatch_Pre_Timeslice_NA - 1 )
1498              * RtemsSignalReqCatch_Pre_ASR_NA
[3e7d658]1499              * RtemsSignalReqCatch_Pre_IntLvl_NA;
1500          }
1501
1502          for (
[83b1b25d]1503            ctx->pcs[ 4 ] = RtemsSignalReqCatch_Pre_ASR_Yes;
1504            ctx->pcs[ 4 ] < RtemsSignalReqCatch_Pre_ASR_NA;
[3e7d658]1505            ++ctx->pcs[ 4 ]
1506          ) {
[83b1b25d]1507            if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_ASR_NA ) {
1508              ctx->pcs[ 4 ] = RtemsSignalReqCatch_Pre_ASR_NA;
1509              index += ( RtemsSignalReqCatch_Pre_ASR_NA - 1 )
1510                * RtemsSignalReqCatch_Pre_IntLvl_NA;
[3e7d658]1511            }
1512
[83b1b25d]1513            for (
1514              ctx->pcs[ 5 ] = RtemsSignalReqCatch_Pre_IntLvl_Zero;
1515              ctx->pcs[ 5 ] < RtemsSignalReqCatch_Pre_IntLvl_NA;
1516              ++ctx->pcs[ 5 ]
1517            ) {
1518              if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_IntLvl_NA ) {
1519                ctx->pcs[ 5 ] = RtemsSignalReqCatch_Pre_IntLvl_NA;
1520                index += ( RtemsSignalReqCatch_Pre_IntLvl_NA - 1 );
1521              }
1522
1523              if ( RtemsSignalReqCatch_TransitionInfo[ index ].Skip ) {
1524                ++index;
1525                continue;
1526              }
1527
1528              RtemsSignalReqCatch_Prepare( ctx );
1529              RtemsSignalReqCatch_Pre_Pending_Prepare( ctx, ctx->pcs[ 0 ] );
1530              RtemsSignalReqCatch_Pre_Handler_Prepare( ctx, ctx->pcs[ 1 ] );
1531              RtemsSignalReqCatch_Pre_Preempt_Prepare( ctx, ctx->pcs[ 2 ] );
1532              RtemsSignalReqCatch_Pre_Timeslice_Prepare( ctx, ctx->pcs[ 3 ] );
1533              RtemsSignalReqCatch_Pre_ASR_Prepare( ctx, ctx->pcs[ 4 ] );
1534              RtemsSignalReqCatch_Pre_IntLvl_Prepare( ctx, ctx->pcs[ 5 ] );
1535              RtemsSignalReqCatch_Action( ctx );
1536              RtemsSignalReqCatch_Post_Status_Check(
1537                ctx,
1538                RtemsSignalReqCatch_TransitionMap[ index ][ 0 ]
1539              );
1540              RtemsSignalReqCatch_Post_Send_Check(
1541                ctx,
1542                RtemsSignalReqCatch_TransitionMap[ index ][ 1 ]
1543              );
1544              RtemsSignalReqCatch_Post_Preempt_Check(
1545                ctx,
1546                RtemsSignalReqCatch_TransitionMap[ index ][ 2 ]
1547              );
1548              RtemsSignalReqCatch_Post_Timeslice_Check(
1549                ctx,
1550                RtemsSignalReqCatch_TransitionMap[ index ][ 3 ]
1551              );
1552              RtemsSignalReqCatch_Post_ASR_Check(
1553                ctx,
1554                RtemsSignalReqCatch_TransitionMap[ index ][ 4 ]
1555              );
1556              RtemsSignalReqCatch_Post_IntLvl_Check(
1557                ctx,
1558                RtemsSignalReqCatch_TransitionMap[ index ][ 5 ]
1559              );
[3e7d658]1560              ++index;
1561            }
1562          }
1563        }
1564      }
1565    }
1566  }
1567}
1568
1569/** @} */
Note: See TracBrowser for help on using the repository browser.