[3378be95] | 1 | /* |
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| 2 | * Copyright (c) 2014 embedded brains GmbH. All rights reserved. |
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| 3 | * |
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| 4 | * embedded brains GmbH |
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| 5 | * Dornierstr. 4 |
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| 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <rtems@embedded-brains.de> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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[c499856] | 12 | * http://www.rtems.org/license/LICENSE. |
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[3378be95] | 13 | */ |
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| 14 | |
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| 15 | #ifdef HAVE_CONFIG_H |
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| 16 | #include "config.h" |
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| 17 | #endif |
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| 18 | |
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| 19 | #include <stdio.h> |
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[7e5c9b89] | 20 | #include <stdlib.h> |
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[3378be95] | 21 | #include <inttypes.h> |
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| 22 | |
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| 23 | #include <rtems.h> |
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| 24 | #include <rtems/counter.h> |
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| 25 | |
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| 26 | #define TESTS_USE_PRINTF |
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| 27 | #include "tmacros.h" |
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| 28 | |
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[6c0301d] | 29 | const char rtems_test_name[] = "SPCACHE 1"; |
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| 30 | |
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[23b14f87] | 31 | #ifdef __or1k__ |
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| 32 | #define I() __asm__ volatile ("l.nop") |
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| 33 | #else |
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| 34 | #define I() __asm__ volatile ("nop") |
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| 35 | #endif |
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[3378be95] | 36 | |
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| 37 | #define I8() I(); I(); I(); I(); I(); I(); I(); I() |
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| 38 | |
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| 39 | #define I64() I8(); I8(); I8(); I8(); I8(); I8(); I8(); I8() |
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| 40 | |
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| 41 | #define I512() I64(); I64(); I64(); I64(); I64(); I64(); I64(); I64() |
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| 42 | |
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| 43 | CPU_STRUCTURE_ALIGNMENT static int data[1024]; |
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| 44 | |
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| 45 | static void test_data_flush_and_invalidate(void) |
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| 46 | { |
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| 47 | if (rtems_cache_get_data_line_size() > 0) { |
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[d50acdbb] | 48 | rtems_interrupt_lock lock; |
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| 49 | rtems_interrupt_lock_context lock_context; |
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[3378be95] | 50 | volatile int *vdata = &data[0]; |
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| 51 | int n = 32; |
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| 52 | int i; |
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| 53 | size_t data_size = n * sizeof(data[0]); |
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[31494ab2] | 54 | bool write_through; |
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[3378be95] | 55 | |
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| 56 | printf("data cache flush and invalidate test\n"); |
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| 57 | |
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[53ad908] | 58 | rtems_interrupt_lock_initialize(&lock, "test"); |
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[d50acdbb] | 59 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 60 | |
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| 61 | for (i = 0; i < n; ++i) { |
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| 62 | vdata[i] = i; |
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| 63 | } |
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| 64 | |
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| 65 | rtems_cache_flush_multiple_data_lines(&data[0], data_size); |
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| 66 | |
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| 67 | for (i = 0; i < n; ++i) { |
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| 68 | rtems_test_assert(vdata[i] == i); |
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| 69 | } |
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| 70 | |
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| 71 | for (i = 0; i < n; ++i) { |
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| 72 | vdata[i] = ~i; |
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| 73 | } |
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| 74 | |
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| 75 | rtems_cache_invalidate_multiple_data_lines(&data[0], data_size); |
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| 76 | |
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[31494ab2] | 77 | write_through = vdata[0] == ~0; |
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| 78 | if (write_through) { |
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| 79 | for (i = 0; i < n; ++i) { |
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| 80 | rtems_test_assert(vdata[i] == ~i); |
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| 81 | } |
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| 82 | } else { |
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| 83 | for (i = 0; i < n; ++i) { |
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| 84 | rtems_test_assert(vdata[i] == i); |
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| 85 | } |
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[3378be95] | 86 | } |
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| 87 | |
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| 88 | for (i = 0; i < n; ++i) { |
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| 89 | vdata[i] = ~i; |
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| 90 | } |
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| 91 | |
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| 92 | rtems_cache_flush_multiple_data_lines(&data[0], data_size); |
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| 93 | rtems_cache_invalidate_multiple_data_lines(&data[0], data_size); |
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| 94 | |
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| 95 | for (i = 0; i < n; ++i) { |
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| 96 | rtems_test_assert(vdata[i] == ~i); |
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| 97 | } |
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| 98 | |
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[d50acdbb] | 99 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[28779c7] | 100 | rtems_interrupt_lock_destroy(&lock); |
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[3378be95] | 101 | |
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[31494ab2] | 102 | printf( |
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| 103 | "data cache operations by line passed the test (%s cache detected)\n", |
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| 104 | write_through ? "write-through" : "copy-back" |
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| 105 | ); |
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[3378be95] | 106 | } else { |
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| 107 | printf( |
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| 108 | "skip data cache flush and invalidate test" |
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| 109 | " due to cache line size of zero\n" |
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| 110 | ); |
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| 111 | } |
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[7981a88] | 112 | |
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| 113 | /* Make sure these are nops */ |
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| 114 | rtems_cache_flush_multiple_data_lines(NULL, 0); |
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| 115 | rtems_cache_invalidate_multiple_data_lines(NULL, 0); |
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[3378be95] | 116 | } |
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| 117 | |
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| 118 | static uint64_t do_some_work(void) |
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| 119 | { |
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| 120 | rtems_counter_ticks a; |
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| 121 | rtems_counter_ticks b; |
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| 122 | rtems_counter_ticks d; |
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| 123 | |
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| 124 | /* This gives 1024 nop instructions */ |
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| 125 | a = rtems_counter_read(); |
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| 126 | I512(); |
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| 127 | I512(); |
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| 128 | b = rtems_counter_read(); |
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| 129 | |
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| 130 | d = rtems_counter_difference(b, a); |
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| 131 | |
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| 132 | return rtems_counter_ticks_to_nanoseconds(d); |
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| 133 | } |
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| 134 | |
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| 135 | static uint64_t load(void) |
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| 136 | { |
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| 137 | rtems_counter_ticks a; |
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| 138 | rtems_counter_ticks b; |
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| 139 | rtems_counter_ticks d; |
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| 140 | size_t i; |
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| 141 | volatile int *vdata = &data[0]; |
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| 142 | |
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| 143 | a = rtems_counter_read(); |
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| 144 | for (i = 0; i < RTEMS_ARRAY_SIZE(data); ++i) { |
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| 145 | vdata[i]; |
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| 146 | } |
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| 147 | b = rtems_counter_read(); |
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| 148 | |
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| 149 | d = rtems_counter_difference(b, a); |
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| 150 | |
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| 151 | return rtems_counter_ticks_to_nanoseconds(d); |
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| 152 | } |
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| 153 | |
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| 154 | static uint64_t store(void) |
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| 155 | { |
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| 156 | rtems_counter_ticks a; |
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| 157 | rtems_counter_ticks b; |
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| 158 | rtems_counter_ticks d; |
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| 159 | size_t i; |
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| 160 | volatile int *vdata = &data[0]; |
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| 161 | |
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| 162 | a = rtems_counter_read(); |
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| 163 | for (i = 0; i < RTEMS_ARRAY_SIZE(data); ++i) { |
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| 164 | vdata[i] = 0; |
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| 165 | } |
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| 166 | b = rtems_counter_read(); |
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| 167 | |
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| 168 | d = rtems_counter_difference(b, a); |
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| 169 | |
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| 170 | return rtems_counter_ticks_to_nanoseconds(d); |
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| 171 | } |
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| 172 | |
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| 173 | static void test_timing(void) |
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| 174 | { |
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[d50acdbb] | 175 | rtems_interrupt_lock lock; |
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| 176 | rtems_interrupt_lock_context lock_context; |
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[3378be95] | 177 | size_t data_size = sizeof(data); |
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| 178 | uint64_t d[3]; |
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[e1d7bf0] | 179 | uint32_t cache_level; |
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| 180 | size_t cache_size; |
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[3378be95] | 181 | |
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[53ad908] | 182 | rtems_interrupt_lock_initialize(&lock, "test"); |
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[d50acdbb] | 183 | |
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[3378be95] | 184 | printf( |
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[e1d7bf0] | 185 | "data cache line size %zi bytes\n" |
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| 186 | "data cache size %zi bytes\n", |
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| 187 | rtems_cache_get_data_line_size(), |
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| 188 | rtems_cache_get_data_cache_size(0) |
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[3378be95] | 189 | ); |
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| 190 | |
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[e1d7bf0] | 191 | cache_level = 1; |
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| 192 | cache_size = rtems_cache_get_data_cache_size(cache_level); |
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| 193 | while (cache_size > 0) { |
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| 194 | printf( |
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| 195 | "data cache level %" PRIu32 " size %zi bytes\n", |
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| 196 | cache_level, |
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| 197 | cache_size |
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| 198 | ); |
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| 199 | ++cache_level; |
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| 200 | cache_size = rtems_cache_get_data_cache_size(cache_level); |
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| 201 | } |
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| 202 | |
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[d50acdbb] | 203 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 204 | |
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| 205 | d[0] = load(); |
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| 206 | d[1] = load(); |
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| 207 | rtems_cache_flush_entire_data(); |
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| 208 | d[2] = load(); |
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| 209 | |
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[d50acdbb] | 210 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[3378be95] | 211 | |
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| 212 | printf( |
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| 213 | "load %zi bytes with flush entire data\n" |
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| 214 | " duration with normal cache %" PRIu64 " ns\n" |
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| 215 | " duration with warm cache %" PRIu64 " ns\n" |
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| 216 | " duration with flushed cache %" PRIu64 " ns\n", |
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| 217 | data_size, |
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| 218 | d[0], |
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| 219 | d[1], |
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| 220 | d[2] |
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| 221 | ); |
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| 222 | |
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[d50acdbb] | 223 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 224 | |
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| 225 | d[0] = load(); |
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| 226 | d[1] = load(); |
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| 227 | rtems_cache_flush_multiple_data_lines(&data[0], sizeof(data)); |
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| 228 | d[2] = load(); |
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| 229 | |
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[d50acdbb] | 230 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[3378be95] | 231 | |
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| 232 | printf( |
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| 233 | "load %zi bytes with flush multiple data\n" |
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| 234 | " duration with normal cache %" PRIu64 " ns\n" |
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| 235 | " duration with warm cache %" PRIu64 " ns\n" |
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| 236 | " duration with flushed cache %" PRIu64 " ns\n", |
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| 237 | data_size, |
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| 238 | d[0], |
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| 239 | d[1], |
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| 240 | d[2] |
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| 241 | ); |
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| 242 | |
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[d50acdbb] | 243 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 244 | |
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| 245 | d[0] = load(); |
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| 246 | d[1] = load(); |
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| 247 | rtems_cache_invalidate_multiple_data_lines(&data[0], sizeof(data)); |
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| 248 | d[2] = load(); |
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| 249 | |
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[d50acdbb] | 250 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[3378be95] | 251 | |
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| 252 | printf( |
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| 253 | "load %zi bytes with invalidate multiple data\n" |
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| 254 | " duration with normal cache %" PRIu64 " ns\n" |
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| 255 | " duration with warm cache %" PRIu64 " ns\n" |
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| 256 | " duration with invalidated cache %" PRIu64 " ns\n", |
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| 257 | data_size, |
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| 258 | d[0], |
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| 259 | d[1], |
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| 260 | d[2] |
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| 261 | ); |
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| 262 | |
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[d50acdbb] | 263 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 264 | |
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| 265 | d[0] = store(); |
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| 266 | d[1] = store(); |
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| 267 | rtems_cache_flush_entire_data(); |
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| 268 | d[2] = store(); |
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| 269 | |
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[d50acdbb] | 270 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[3378be95] | 271 | |
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| 272 | printf( |
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| 273 | "store %zi bytes with flush entire data\n" |
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| 274 | " duration with normal cache %" PRIu64 " ns\n" |
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| 275 | " duration with warm cache %" PRIu64 " ns\n" |
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| 276 | " duration with flushed cache %" PRIu64 " ns\n", |
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| 277 | data_size, |
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| 278 | d[0], |
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| 279 | d[1], |
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| 280 | d[2] |
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| 281 | ); |
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| 282 | |
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[d50acdbb] | 283 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 284 | |
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| 285 | d[0] = store(); |
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| 286 | d[1] = store(); |
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| 287 | rtems_cache_flush_multiple_data_lines(&data[0], sizeof(data)); |
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| 288 | d[2] = store(); |
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| 289 | |
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[d50acdbb] | 290 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[3378be95] | 291 | |
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| 292 | printf( |
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| 293 | "store %zi bytes with flush multiple data\n" |
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| 294 | " duration with normal cache %" PRIu64 " ns\n" |
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| 295 | " duration with warm cache %" PRIu64 " ns\n" |
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| 296 | " duration with flushed cache %" PRIu64 " ns\n", |
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| 297 | data_size, |
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| 298 | d[0], |
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| 299 | d[1], |
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| 300 | d[2] |
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| 301 | ); |
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| 302 | |
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[d50acdbb] | 303 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 304 | |
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| 305 | d[0] = store(); |
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| 306 | d[1] = store(); |
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| 307 | rtems_cache_invalidate_multiple_data_lines(&data[0], sizeof(data)); |
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| 308 | d[2] = store(); |
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| 309 | |
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[d50acdbb] | 310 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[3378be95] | 311 | |
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| 312 | printf( |
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| 313 | "store %zi bytes with invalidate multiple data\n" |
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| 314 | " duration with normal cache %" PRIu64 " ns\n" |
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| 315 | " duration with warm cache %" PRIu64 " ns\n" |
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| 316 | " duration with invalidated cache %" PRIu64 " ns\n", |
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| 317 | data_size, |
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| 318 | d[0], |
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| 319 | d[1], |
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| 320 | d[2] |
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| 321 | ); |
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| 322 | |
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| 323 | printf( |
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[e1d7bf0] | 324 | "instruction cache line size %zi bytes\n" |
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| 325 | "instruction cache size %zi bytes\n", |
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| 326 | rtems_cache_get_instruction_line_size(), |
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| 327 | rtems_cache_get_instruction_cache_size(0) |
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[3378be95] | 328 | ); |
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| 329 | |
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[e1d7bf0] | 330 | cache_level = 1; |
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| 331 | cache_size = rtems_cache_get_instruction_cache_size(cache_level); |
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| 332 | while (cache_size > 0) { |
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| 333 | printf( |
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| 334 | "instruction cache level %" PRIu32 " size %zi bytes\n", |
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| 335 | cache_level, |
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| 336 | cache_size |
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| 337 | ); |
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| 338 | ++cache_level; |
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| 339 | cache_size = rtems_cache_get_instruction_cache_size(cache_level); |
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| 340 | } |
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| 341 | |
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[d50acdbb] | 342 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 343 | |
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| 344 | d[0] = do_some_work(); |
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| 345 | d[1] = do_some_work(); |
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| 346 | rtems_cache_invalidate_entire_instruction(); |
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| 347 | d[2] = do_some_work(); |
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| 348 | |
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[d50acdbb] | 349 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[3378be95] | 350 | |
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| 351 | printf( |
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| 352 | "invalidate entire instruction\n" |
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| 353 | " duration with normal cache %" PRIu64 " ns\n" |
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| 354 | " duration with warm cache %" PRIu64 " ns\n" |
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| 355 | " duration with invalidated cache %" PRIu64 " ns\n", |
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| 356 | d[0], |
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| 357 | d[1], |
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| 358 | d[2] |
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| 359 | ); |
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| 360 | |
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[d50acdbb] | 361 | rtems_interrupt_lock_acquire(&lock, &lock_context); |
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[3378be95] | 362 | |
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| 363 | d[0] = do_some_work(); |
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| 364 | d[1] = do_some_work(); |
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| 365 | rtems_cache_invalidate_multiple_instruction_lines(do_some_work, 4096); |
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| 366 | d[2] = do_some_work(); |
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| 367 | |
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[d50acdbb] | 368 | rtems_interrupt_lock_release(&lock, &lock_context); |
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[3378be95] | 369 | |
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| 370 | printf( |
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| 371 | "invalidate multiple instruction\n" |
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| 372 | " duration with normal cache %" PRIu64 " ns\n" |
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| 373 | " duration with warm cache %" PRIu64 " ns\n" |
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| 374 | " duration with invalidated cache %" PRIu64 " ns\n", |
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| 375 | d[0], |
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| 376 | d[1], |
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| 377 | d[2] |
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| 378 | ); |
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[28779c7] | 379 | |
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| 380 | rtems_interrupt_lock_destroy(&lock); |
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[3378be95] | 381 | } |
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| 382 | |
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[7e5c9b89] | 383 | static void test_cache_aligned_alloc(void) |
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| 384 | { |
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| 385 | void *p0; |
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| 386 | void *p1; |
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| 387 | size_t cls; |
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| 388 | |
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| 389 | printf("test rtems_cache_aligned_malloc()\n"); |
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| 390 | |
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| 391 | p0 = rtems_cache_aligned_malloc(1); |
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| 392 | p1 = rtems_cache_aligned_malloc(1); |
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| 393 | |
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| 394 | rtems_test_assert(p0 != NULL); |
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| 395 | rtems_test_assert(p1 != NULL); |
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| 396 | |
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| 397 | cls = rtems_cache_get_data_line_size(); |
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| 398 | if (cls > 0) { |
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| 399 | size_t m = cls - 1; |
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| 400 | uintptr_t a0 = (uintptr_t) p0; |
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| 401 | uintptr_t a1 = (uintptr_t) p1; |
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| 402 | |
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| 403 | rtems_test_assert(a1 - a0 > cls); |
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| 404 | rtems_test_assert((a0 & m) == 0); |
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| 405 | rtems_test_assert((a1 & m) == 0); |
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| 406 | } |
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| 407 | |
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| 408 | free(p0); |
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| 409 | free(p1); |
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| 410 | } |
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| 411 | |
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[3378be95] | 412 | static void Init(rtems_task_argument arg) |
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| 413 | { |
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[6c0301d] | 414 | TEST_BEGIN(); |
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[3378be95] | 415 | |
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| 416 | test_data_flush_and_invalidate(); |
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| 417 | test_timing(); |
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[7e5c9b89] | 418 | test_cache_aligned_alloc(); |
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[3378be95] | 419 | |
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[6c0301d] | 420 | TEST_END(); |
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[3378be95] | 421 | |
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| 422 | rtems_test_exit(0); |
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| 423 | } |
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| 424 | |
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| 425 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER |
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| 426 | #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER |
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| 427 | |
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| 428 | #define CONFIGURE_USE_IMFS_AS_BASE_FILESYSTEM |
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| 429 | |
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| 430 | #define CONFIGURE_MAXIMUM_TASKS 1 |
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| 431 | |
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[6c0301d] | 432 | #define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION |
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| 433 | |
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[3378be95] | 434 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE |
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| 435 | |
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| 436 | #define CONFIGURE_INIT |
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| 437 | |
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| 438 | #include <rtems/confdefs.h> |
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