1 | /* |
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2 | * Copyright (c) 2014 Aeroflex Gaisler AB. All rights reserved. |
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3 | * Copyright (c) 2017 embedded brains GmbH. |
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4 | * |
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5 | * The license and distribution terms for this file may be |
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6 | * found in the file LICENSE in this distribution or at |
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7 | * http://www.rtems.org/license/LICENSE. |
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8 | */ |
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9 | |
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10 | #ifdef HAVE_CONFIG_H |
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11 | #include "config.h" |
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12 | #endif |
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13 | |
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14 | #include <rtems/score/atomic.h> |
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15 | #include <rtems/score/smpbarrier.h> |
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16 | #include <rtems/score/smpimpl.h> |
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17 | #include <rtems.h> |
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18 | #include <limits.h> |
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19 | #include <setjmp.h> |
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20 | #include <string.h> |
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21 | |
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22 | #include "tmacros.h" |
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23 | |
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24 | const char rtems_test_name[] = "SMPCACHE 1"; |
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25 | |
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26 | #define CPU_COUNT 32 |
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27 | |
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28 | #define WORKER_PRIORITY 100 |
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29 | |
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30 | typedef struct { |
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31 | SMP_barrier_Control barrier; |
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32 | uint32_t count[CPU_COUNT]; |
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33 | bool do_longjmp[CPU_COUNT]; |
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34 | jmp_buf instruction_invalidate_return_context[CPU_COUNT]; |
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35 | } test_context; |
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36 | |
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37 | static test_context ctx = { |
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38 | .barrier = SMP_BARRIER_CONTROL_INITIALIZER, |
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39 | }; |
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40 | |
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41 | static void function_to_flush( void ) |
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42 | { |
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43 | /* Does nothing. Used to give a pointer to instruction address space. */ |
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44 | } |
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45 | |
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46 | static void test_action( void *arg ) |
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47 | { |
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48 | rtems_test_assert(arg == &ctx); |
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49 | |
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50 | ctx.count[rtems_scheduler_get_processor()]++; |
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51 | } |
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52 | |
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53 | typedef void ( *test_case )( void ); |
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54 | |
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55 | static void test_cache_invalidate_entire_instruction( void ) |
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56 | { |
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57 | rtems_cache_invalidate_entire_instruction(); |
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58 | } |
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59 | |
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60 | static void test_cache_invalidate_multiple_instruction_lines( void ) |
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61 | { |
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62 | uint32_t self = rtems_scheduler_get_processor(); |
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63 | |
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64 | ctx.do_longjmp[self] = true; |
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65 | |
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66 | if (setjmp(ctx.instruction_invalidate_return_context[self]) == 0) { |
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67 | rtems_cache_invalidate_multiple_instruction_lines( &function_to_flush, |
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68 | 4 /* arbitrary size */ ); |
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69 | } |
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70 | |
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71 | ctx.do_longjmp[self] = false; |
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72 | } |
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73 | |
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74 | static void barrier( SMP_barrier_State *bs ) |
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75 | { |
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76 | _SMP_barrier_Wait( |
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77 | &ctx.barrier, |
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78 | bs, |
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79 | rtems_scheduler_get_processor_maximum() |
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80 | ); |
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81 | } |
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82 | |
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83 | static void broadcast_test_init( void ) |
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84 | { |
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85 | ctx.count[rtems_scheduler_get_processor()] = 0; |
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86 | } |
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87 | |
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88 | static void broadcast_test_body( void ) |
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89 | { |
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90 | _SMP_Multicast_action( NULL, test_action, &ctx ); |
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91 | } |
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92 | |
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93 | static void broadcast_test_fini( void ) |
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94 | { |
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95 | rtems_test_assert( |
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96 | ctx.count[rtems_scheduler_get_processor()] |
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97 | == rtems_scheduler_get_processor_maximum() |
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98 | ); |
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99 | } |
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100 | |
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101 | static test_case test_cases[] = { |
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102 | test_cache_invalidate_entire_instruction, |
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103 | test_cache_invalidate_multiple_instruction_lines, |
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104 | broadcast_test_body |
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105 | }; |
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106 | |
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107 | static void call_tests( SMP_barrier_State *bs ) |
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108 | { |
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109 | size_t i; |
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110 | |
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111 | broadcast_test_init(); |
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112 | |
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113 | for (i = 0; i < RTEMS_ARRAY_SIZE( test_cases ); ++i) { |
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114 | barrier( bs ); |
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115 | ( *test_cases[ i ] )(); |
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116 | barrier( bs ); |
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117 | } |
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118 | |
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119 | broadcast_test_fini(); |
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120 | } |
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121 | |
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122 | static void call_tests_isr_disabled( SMP_barrier_State *bs ) |
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123 | { |
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124 | size_t i; |
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125 | |
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126 | broadcast_test_init(); |
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127 | |
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128 | for (i = 0; i < RTEMS_ARRAY_SIZE( test_cases ); ++i) { |
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129 | Per_CPU_Control *cpu_self; |
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130 | ISR_Level isr_level; |
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131 | |
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132 | cpu_self = _Thread_Dispatch_disable(); |
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133 | _ISR_Local_disable( isr_level ); |
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134 | barrier( bs ); |
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135 | ( *test_cases[ i ] )(); |
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136 | _ISR_Local_enable( isr_level ); |
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137 | _Thread_Dispatch_enable( cpu_self ); |
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138 | barrier( bs ); |
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139 | } |
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140 | |
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141 | broadcast_test_fini(); |
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142 | } |
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143 | |
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144 | static void call_tests_with_thread_dispatch_disabled( SMP_barrier_State *bs ) |
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145 | { |
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146 | size_t i; |
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147 | |
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148 | broadcast_test_init(); |
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149 | |
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150 | for (i = 0; i < RTEMS_ARRAY_SIZE( test_cases ); ++i) { |
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151 | Per_CPU_Control *cpu_self; |
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152 | |
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153 | cpu_self = _Thread_Dispatch_disable(); |
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154 | barrier( bs ); |
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155 | ( *test_cases[ i ] )(); |
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156 | barrier( bs ); |
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157 | _Thread_Dispatch_enable( cpu_self ); |
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158 | } |
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159 | |
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160 | broadcast_test_fini(); |
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161 | } |
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162 | |
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163 | static void cmlog( const char* str ) |
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164 | { |
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165 | if ( rtems_scheduler_get_processor() == 0 ) |
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166 | printf( "%s", str ); |
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167 | } |
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168 | |
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169 | static void all_tests( void ) |
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170 | { |
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171 | SMP_barrier_State bs = SMP_BARRIER_STATE_INITIALIZER; |
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172 | |
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173 | /* Call test cases */ |
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174 | cmlog( "Calling test cases. " ); |
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175 | call_tests( &bs ); |
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176 | cmlog( "Done!\n"); |
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177 | |
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178 | /* Call test cases with ISR disabled */ |
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179 | cmlog( "Calling test cases with ISR disabled. " ); |
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180 | call_tests_isr_disabled( &bs ); |
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181 | cmlog( "Done!\n" ); |
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182 | |
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183 | /* Call test cases with thread dispatch disabled */ |
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184 | cmlog( "Calling test cases with thread_dispatch_disabled. "); |
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185 | call_tests_with_thread_dispatch_disabled( &bs ); |
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186 | cmlog( "Done!\n"); |
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187 | |
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188 | /* Done. Free up memory. */ |
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189 | _SMP_barrier_Wait( |
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190 | &ctx.barrier, |
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191 | &bs, |
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192 | rtems_scheduler_get_processor_maximum() |
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193 | ); |
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194 | } |
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195 | |
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196 | static void worker_task(rtems_task_argument arg) |
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197 | { |
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198 | rtems_status_code sc; |
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199 | |
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200 | all_tests(); |
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201 | |
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202 | sc = rtems_task_suspend(RTEMS_SELF); |
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203 | rtems_test_assert(sc == RTEMS_SUCCESSFUL); |
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204 | } |
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205 | |
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206 | static void test_smp_cache_manager( void ) |
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207 | { |
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208 | rtems_status_code sc; |
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209 | size_t worker_index; |
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210 | uint32_t cpu_count = rtems_scheduler_get_processor_maximum(); |
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211 | |
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212 | for (worker_index = 1; worker_index < cpu_count; ++worker_index) { |
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213 | rtems_id worker_id; |
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214 | |
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215 | sc = rtems_task_create( |
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216 | rtems_build_name('W', 'R', 'K', '0'+worker_index), |
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217 | WORKER_PRIORITY, |
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218 | RTEMS_MINIMUM_STACK_SIZE, |
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219 | RTEMS_DEFAULT_MODES, |
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220 | RTEMS_DEFAULT_ATTRIBUTES, |
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221 | &worker_id |
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222 | ); |
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223 | rtems_test_assert( sc == RTEMS_SUCCESSFUL ); |
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224 | |
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225 | sc = rtems_task_start( worker_id, worker_task, 0 ); |
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226 | rtems_test_assert( sc == RTEMS_SUCCESSFUL ); |
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227 | } |
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228 | |
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229 | all_tests(); |
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230 | } |
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231 | |
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232 | |
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233 | static void Init(rtems_task_argument arg) |
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234 | { |
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235 | TEST_BEGIN(); |
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236 | |
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237 | test_smp_cache_manager(); |
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238 | |
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239 | TEST_END(); |
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240 | rtems_test_exit(0); |
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241 | } |
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242 | |
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243 | static void fatal_extension( |
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244 | rtems_fatal_source source, |
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245 | bool always_set_to_false, |
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246 | rtems_fatal_code error |
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247 | ) |
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248 | { |
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249 | uint32_t self = rtems_scheduler_get_processor(); |
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250 | |
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251 | if (source == RTEMS_FATAL_SOURCE_EXCEPTION && ctx.do_longjmp[self]) { |
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252 | _ISR_Set_level(0); |
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253 | longjmp(ctx.instruction_invalidate_return_context[self], 1); |
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254 | } |
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255 | } |
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256 | |
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257 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER |
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258 | #define CONFIGURE_APPLICATION_NEEDS_SIMPLE_CONSOLE_DRIVER |
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259 | |
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260 | #define CONFIGURE_MAXIMUM_PROCESSORS CPU_COUNT |
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261 | |
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262 | #define CONFIGURE_MAXIMUM_TASKS CPU_COUNT |
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263 | |
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264 | #define CONFIGURE_MAXIMUM_TIMERS 1 |
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265 | |
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266 | #define CONFIGURE_INITIAL_EXTENSIONS \ |
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267 | { .fatal = fatal_extension }, \ |
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268 | RTEMS_TEST_INITIAL_EXTENSION |
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269 | |
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270 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE |
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271 | |
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272 | #define CONFIGURE_INIT |
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273 | |
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274 | #include <rtems/confdefs.h> |
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