1 | /* |
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2 | * Copyright (c) 2013 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Dornierstr. 4 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <rtems@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.com/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #ifdef HAVE_CONFIG_H |
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16 | #include "config.h" |
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17 | #endif |
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18 | |
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19 | #include <rtems/score/atomic.h> |
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20 | #include <rtems.h> |
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21 | |
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22 | #include "tmacros.h" |
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23 | |
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24 | /* FIXME: Add barrier to Score */ |
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25 | |
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26 | typedef struct { |
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27 | Atomic_Uint value; |
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28 | Atomic_Uint sense; |
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29 | } SMP_barrier_Control; |
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30 | |
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31 | typedef struct { |
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32 | uint_fast32_t sense; |
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33 | } SMP_barrier_State; |
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34 | |
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35 | #define SMP_BARRIER_CONTROL_INITIALIZER \ |
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36 | { ATOMIC_INITIALIZER_UINT( 0 ), ATOMIC_INITIALIZER_UINT( 0 ) } |
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37 | |
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38 | #define SMP_BARRIER_STATE_INITIALIZER { 0 } |
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39 | |
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40 | static void _SMP_barrier_Wait( |
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41 | SMP_barrier_Control *control, |
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42 | SMP_barrier_State *state, |
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43 | uint_fast32_t count |
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44 | ) |
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45 | { |
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46 | uint_fast32_t sense = ~state->sense; |
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47 | uint_fast32_t previous_value; |
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48 | |
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49 | state->sense = sense; |
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50 | |
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51 | previous_value = _Atomic_Fetch_add_uint( |
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52 | &control->value, |
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53 | 1, |
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54 | ATOMIC_ORDER_RELAXED |
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55 | ); |
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56 | |
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57 | if ( previous_value + 1 == count ) { |
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58 | _Atomic_Store_uint( &control->value, 0, ATOMIC_ORDER_RELAXED ); |
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59 | _Atomic_Store_uint( &control->sense, sense, ATOMIC_ORDER_RELEASE ); |
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60 | } else { |
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61 | while ( |
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62 | _Atomic_Load_uint( &control->sense, ATOMIC_ORDER_ACQUIRE ) != sense |
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63 | ) { |
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64 | /* Wait */ |
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65 | } |
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66 | } |
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67 | } |
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68 | |
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69 | #define MASTER_PRIORITY 1 |
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70 | |
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71 | #define WORKER_PRIORITY 2 |
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72 | |
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73 | #define CPU_COUNT 32 |
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74 | |
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75 | typedef struct { |
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76 | Atomic_Uint stop; |
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77 | SMP_barrier_Control barrier; |
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78 | size_t worker_count; |
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79 | rtems_id stop_worker_timer_id; |
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80 | Atomic_Uint global_uint; |
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81 | uint_fast32_t per_worker_uint[CPU_COUNT]; |
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82 | uint32_t flag_counter; |
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83 | Atomic_Flag global_flag; |
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84 | } test_context; |
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85 | |
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86 | typedef struct { |
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87 | void (*init)(test_context *ctx); |
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88 | void (*body)(test_context *ctx, size_t worker_index); |
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89 | void (*fini)(test_context *ctx); |
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90 | } test_case; |
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91 | |
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92 | static test_context test_instance = { |
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93 | .stop = ATOMIC_INITIALIZER_UINT(0), |
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94 | .barrier = SMP_BARRIER_CONTROL_INITIALIZER |
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95 | }; |
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96 | |
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97 | static bool stop(test_context *ctx) |
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98 | { |
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99 | return _Atomic_Load_uint(&ctx->stop, ATOMIC_ORDER_RELAXED) != 0; |
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100 | } |
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101 | |
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102 | static bool is_master_worker(size_t worker_index) |
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103 | { |
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104 | return worker_index == 0; |
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105 | } |
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106 | |
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107 | static void test_atomic_add_init(test_context *ctx) |
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108 | { |
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109 | _Atomic_Init_uint(&ctx->global_uint, 0); |
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110 | } |
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111 | |
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112 | static void test_atomic_add_body(test_context *ctx, size_t worker_index) |
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113 | { |
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114 | uint_fast32_t counter = 0; |
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115 | |
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116 | while (!stop(ctx)) { |
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117 | ++counter; |
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118 | _Atomic_Fetch_add_uint(&ctx->global_uint, 1, ATOMIC_ORDER_RELAXED); |
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119 | } |
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120 | |
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121 | ctx->per_worker_uint[worker_index] = counter; |
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122 | } |
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123 | |
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124 | static void test_atomic_add_fini(test_context *ctx) |
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125 | { |
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126 | uint_fast32_t expected_counter = 0; |
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127 | uint_fast32_t actual_counter; |
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128 | size_t worker_index; |
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129 | |
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130 | printf("=== atomic add test case ==\n"); |
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131 | |
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132 | for (worker_index = 0; worker_index < ctx->worker_count; ++worker_index) { |
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133 | uint_fast32_t worker_counter = ctx->per_worker_uint[worker_index]; |
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134 | |
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135 | expected_counter += worker_counter; |
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136 | |
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137 | printf( |
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138 | "atomic add worker %zu counter: %" PRIuFAST32 "\n", |
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139 | worker_index, |
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140 | worker_counter |
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141 | ); |
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142 | } |
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143 | |
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144 | actual_counter = _Atomic_Load_uint(&ctx->global_uint, ATOMIC_ORDER_RELAXED); |
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145 | |
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146 | printf( |
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147 | "global counter: expected = %" PRIuFAST32 ", actual = %" PRIuFAST32 "\n", |
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148 | expected_counter, |
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149 | actual_counter |
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150 | ); |
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151 | |
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152 | rtems_test_assert(expected_counter == actual_counter); |
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153 | } |
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154 | |
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155 | static void test_atomic_flag_init(test_context *ctx) |
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156 | { |
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157 | _Atomic_Flag_clear(&ctx->global_flag, ATOMIC_ORDER_RELEASE); |
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158 | ctx->flag_counter = 0; |
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159 | } |
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160 | |
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161 | static void test_atomic_flag_body(test_context *ctx, size_t worker_index) |
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162 | { |
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163 | uint_fast32_t counter = 0; |
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164 | |
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165 | while (!stop(ctx)) { |
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166 | while (_Atomic_Flag_test_and_set(&ctx->global_flag, ATOMIC_ORDER_ACQUIRE)) { |
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167 | /* Wait */ |
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168 | } |
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169 | |
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170 | ++counter; |
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171 | ++ctx->flag_counter; |
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172 | |
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173 | _Atomic_Flag_clear(&ctx->global_flag, ATOMIC_ORDER_RELEASE); |
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174 | } |
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175 | |
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176 | ctx->per_worker_uint[worker_index] = counter; |
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177 | } |
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178 | |
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179 | static void test_atomic_flag_fini(test_context *ctx) |
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180 | { |
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181 | uint_fast32_t expected_counter = 0; |
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182 | uint_fast32_t actual_counter; |
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183 | size_t worker_index; |
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184 | |
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185 | printf("=== atomic flag test case ===\n"); |
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186 | |
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187 | for (worker_index = 0; worker_index < ctx->worker_count; ++worker_index) { |
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188 | uint_fast32_t worker_counter = ctx->per_worker_uint[worker_index]; |
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189 | |
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190 | expected_counter += worker_counter; |
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191 | |
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192 | printf( |
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193 | "atomic flag worker %zu counter: %" PRIuFAST32 "\n", |
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194 | worker_index, |
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195 | worker_counter |
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196 | ); |
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197 | } |
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198 | |
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199 | actual_counter = ctx->flag_counter; |
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200 | |
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201 | printf( |
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202 | "global flag counter: expected = %" PRIuFAST32 ", actual = %" PRIuFAST32 "\n", |
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203 | expected_counter, |
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204 | actual_counter |
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205 | ); |
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206 | |
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207 | rtems_test_assert(expected_counter == actual_counter); |
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208 | } |
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209 | |
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210 | static const test_case test_cases[] = { |
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211 | { test_atomic_add_init, test_atomic_add_body, test_atomic_add_fini }, |
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212 | { test_atomic_flag_init, test_atomic_flag_body, test_atomic_flag_fini } |
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213 | }; |
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214 | |
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215 | #define TEST_COUNT RTEMS_ARRAY_SIZE(test_cases) |
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216 | |
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217 | static void stop_worker_timer(rtems_id timer_id, void *arg) |
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218 | { |
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219 | test_context *ctx = arg; |
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220 | |
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221 | _Atomic_Store_uint(&ctx->stop, 1, ATOMIC_ORDER_RELAXED); |
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222 | } |
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223 | |
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224 | static void start_worker_stop_timer(test_context *ctx) |
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225 | { |
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226 | rtems_status_code sc; |
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227 | |
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228 | _Atomic_Store_uint(&ctx->stop, 0, ATOMIC_ORDER_RELEASE); |
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229 | |
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230 | sc = rtems_timer_fire_after( |
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231 | ctx->stop_worker_timer_id, |
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232 | rtems_clock_get_ticks_per_second(), |
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233 | stop_worker_timer, |
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234 | ctx |
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235 | ); |
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236 | rtems_test_assert(sc == RTEMS_SUCCESSFUL); |
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237 | } |
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238 | |
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239 | static void run_tests(test_context *ctx, size_t worker_index) |
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240 | { |
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241 | SMP_barrier_State bs = SMP_BARRIER_STATE_INITIALIZER; |
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242 | size_t test; |
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243 | |
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244 | for (test = 0; test < TEST_COUNT; ++test) { |
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245 | const test_case *tc = &test_cases[test]; |
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246 | |
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247 | if (is_master_worker(worker_index)) { |
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248 | start_worker_stop_timer(ctx); |
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249 | (*tc->init)(ctx); |
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250 | } |
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251 | |
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252 | _SMP_barrier_Wait(&ctx->barrier, &bs, ctx->worker_count); |
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253 | |
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254 | (*tc->body)(ctx, worker_index); |
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255 | |
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256 | _SMP_barrier_Wait(&ctx->barrier, &bs, ctx->worker_count); |
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257 | |
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258 | if (is_master_worker(worker_index)) { |
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259 | (*tc->fini)(ctx); |
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260 | } |
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261 | } |
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262 | } |
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263 | |
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264 | static void worker_task(size_t worker_index) |
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265 | { |
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266 | test_context *ctx = &test_instance; |
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267 | |
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268 | run_tests(ctx, worker_index); |
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269 | |
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270 | (void) rtems_task_suspend(RTEMS_SELF); |
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271 | rtems_test_assert(0); |
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272 | } |
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273 | |
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274 | static void test(void) |
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275 | { |
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276 | test_context *ctx = &test_instance; |
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277 | rtems_status_code sc; |
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278 | size_t worker_index; |
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279 | |
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280 | ctx->worker_count = rtems_smp_get_processor_count(); |
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281 | |
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282 | sc = rtems_timer_create( |
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283 | rtems_build_name('S', 'T', 'O', 'P'), |
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284 | &ctx->stop_worker_timer_id |
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285 | ); |
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286 | rtems_test_assert(sc == RTEMS_SUCCESSFUL); |
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287 | |
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288 | for (worker_index = 1; worker_index < ctx->worker_count; ++worker_index) { |
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289 | rtems_id worker_id; |
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290 | |
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291 | sc = rtems_task_create( |
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292 | rtems_build_name('W', 'O', 'R', 'K'), |
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293 | WORKER_PRIORITY, |
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294 | RTEMS_MINIMUM_STACK_SIZE, |
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295 | RTEMS_DEFAULT_MODES, |
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296 | RTEMS_DEFAULT_ATTRIBUTES, |
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297 | &worker_id |
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298 | ); |
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299 | rtems_test_assert(sc == RTEMS_SUCCESSFUL); |
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300 | |
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301 | sc = rtems_task_start(worker_id, worker_task, worker_index); |
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302 | rtems_test_assert(sc == RTEMS_SUCCESSFUL); |
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303 | } |
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304 | |
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305 | run_tests(ctx, 0); |
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306 | } |
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307 | |
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308 | static void Init(rtems_task_argument arg) |
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309 | { |
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310 | puts("\n\n*** TEST SMPATOMIC 8 ***"); |
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311 | |
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312 | test(); |
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313 | |
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314 | puts("*** END OF TEST SMPATOMIC 8 ***"); |
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315 | |
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316 | rtems_test_exit(0); |
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317 | } |
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318 | |
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319 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER |
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320 | #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER |
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321 | |
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322 | #define CONFIGURE_SMP_APPLICATION |
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323 | |
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324 | #define CONFIGURE_SMP_MAXIMUM_PROCESSORS CPU_COUNT |
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325 | |
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326 | #define CONFIGURE_MAXIMUM_TASKS CPU_COUNT |
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327 | |
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328 | #define CONFIGURE_MAXIMUM_TIMERS 1 |
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329 | |
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330 | #define CONFIGURE_INIT_TASK_PRIORITY MASTER_PRIORITY |
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331 | #define CONFIGURE_INIT_TASK_INITIAL_MODES RTEMS_DEFAULT_MODES |
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332 | #define CONFIGURE_INIT_TASK_ATTRIBUTES RTEMS_DEFAULT_ATTRIBUTES |
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333 | |
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334 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE |
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335 | |
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336 | #define CONFIGURE_INIT |
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337 | |
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338 | #include <rtems/confdefs.h> |
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