[79d03e3] | 1 | /* |
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[a9cc6a84] | 2 | * Copyright (c) 2013, 2016 embedded brains GmbH. All rights reserved. |
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[79d03e3] | 3 | * |
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| 4 | * embedded brains GmbH |
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| 5 | * Dornierstr. 4 |
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| 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <rtems@embedded-brains.de> |
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| 9 | * |
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[fee154be] | 10 | * Copyright (c) 2013 Deng Hengyi. |
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| 11 | * |
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[79d03e3] | 12 | * The license and distribution terms for this file may be |
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| 13 | * found in the file LICENSE in this distribution or at |
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[c499856] | 14 | * http://www.rtems.org/license/LICENSE. |
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[79d03e3] | 15 | */ |
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| 16 | |
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| 17 | #ifdef HAVE_CONFIG_H |
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| 18 | #include "config.h" |
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| 19 | #endif |
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| 20 | |
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| 21 | #include <rtems/score/atomic.h> |
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[a9cc6a84] | 22 | #include <rtems/score/smpbarrier.h> |
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[79d03e3] | 23 | #include <rtems.h> |
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[a9cc6a84] | 24 | #include <rtems/bsd.h> |
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[7f577d3] | 25 | #include <rtems/test.h> |
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[8b50a55] | 26 | #include <limits.h> |
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[4a8c334] | 27 | #include <string.h> |
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[79d03e3] | 28 | |
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| 29 | #include "tmacros.h" |
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| 30 | |
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[ad48ebb] | 31 | const char rtems_test_name[] = "SMPATOMIC 1"; |
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| 32 | |
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[a9cc6a84] | 33 | #define MS_PER_TICK 10 |
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| 34 | |
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[79d03e3] | 35 | #define MASTER_PRIORITY 1 |
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| 36 | |
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| 37 | #define WORKER_PRIORITY 2 |
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| 38 | |
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| 39 | #define CPU_COUNT 32 |
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| 40 | |
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| 41 | typedef struct { |
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[7f577d3] | 42 | rtems_test_parallel_context base; |
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[29f7d317] | 43 | Atomic_Ulong atomic_value; |
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| 44 | unsigned long per_worker_value[CPU_COUNT]; |
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| 45 | unsigned long normal_value; |
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[8b50a55] | 46 | char unused_space_for_cache_line_separation[128]; |
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| 47 | unsigned long second_value; |
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[79d03e3] | 48 | Atomic_Flag global_flag; |
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[a9cc6a84] | 49 | SMP_barrier_Control barrier; |
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| 50 | SMP_barrier_State barrier_state[CPU_COUNT]; |
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| 51 | sbintime_t load_trigger_time; |
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| 52 | sbintime_t load_change_time[CPU_COUNT]; |
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| 53 | int load_count[CPU_COUNT]; |
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| 54 | sbintime_t rmw_trigger_time; |
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| 55 | sbintime_t rmw_change_time[CPU_COUNT]; |
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| 56 | int rmw_count[CPU_COUNT]; |
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[7f577d3] | 57 | } smpatomic01_context; |
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[79d03e3] | 58 | |
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[7f577d3] | 59 | static smpatomic01_context test_instance; |
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[79d03e3] | 60 | |
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[7f577d3] | 61 | static rtems_interval test_duration(void) |
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[79d03e3] | 62 | { |
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[7f577d3] | 63 | return rtems_clock_get_ticks_per_second(); |
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[79d03e3] | 64 | } |
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| 65 | |
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[47b6fad] | 66 | static void test_fini( |
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[7f577d3] | 67 | smpatomic01_context *ctx, |
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[47b6fad] | 68 | const char *test, |
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| 69 | bool atomic |
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| 70 | ) |
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| 71 | { |
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[29f7d317] | 72 | unsigned long expected_value = 0; |
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| 73 | unsigned long actual_value; |
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[47b6fad] | 74 | size_t worker_index; |
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| 75 | |
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[8b50a55] | 76 | printf("=== atomic %s test case ===\n", test); |
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[47b6fad] | 77 | |
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[7f577d3] | 78 | for ( |
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| 79 | worker_index = 0; |
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| 80 | worker_index < ctx->base.worker_count; |
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| 81 | ++worker_index |
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| 82 | ) { |
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[29f7d317] | 83 | unsigned long worker_value = ctx->per_worker_value[worker_index]; |
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[47b6fad] | 84 | |
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| 85 | expected_value += worker_value; |
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| 86 | |
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| 87 | printf( |
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[29f7d317] | 88 | "worker %zu value: %lu\n", |
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[47b6fad] | 89 | worker_index, |
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| 90 | worker_value |
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| 91 | ); |
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| 92 | } |
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| 93 | |
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| 94 | if (atomic) { |
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[29f7d317] | 95 | actual_value = _Atomic_Load_ulong(&ctx->atomic_value, ATOMIC_ORDER_RELAXED); |
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[47b6fad] | 96 | } else { |
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| 97 | actual_value = ctx->normal_value; |
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| 98 | } |
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| 99 | |
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| 100 | printf( |
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[29f7d317] | 101 | "atomic value: expected = %lu, actual = %lu\n", |
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[47b6fad] | 102 | expected_value, |
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| 103 | actual_value |
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| 104 | ); |
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| 105 | |
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| 106 | rtems_test_assert(expected_value == actual_value); |
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| 107 | } |
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| 108 | |
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[7f577d3] | 109 | |
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| 110 | static rtems_interval test_atomic_add_init( |
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| 111 | rtems_test_parallel_context *base, |
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[33b72fd] | 112 | void *arg, |
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| 113 | size_t active_workers |
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[7f577d3] | 114 | ) |
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[79d03e3] | 115 | { |
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[7f577d3] | 116 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 117 | |
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[29f7d317] | 118 | _Atomic_Init_ulong(&ctx->atomic_value, 0); |
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[7f577d3] | 119 | |
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| 120 | return test_duration(); |
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[79d03e3] | 121 | } |
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| 122 | |
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[7f577d3] | 123 | static void test_atomic_add_body( |
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| 124 | rtems_test_parallel_context *base, |
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| 125 | void *arg, |
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[33b72fd] | 126 | size_t active_workers, |
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[7f577d3] | 127 | size_t worker_index |
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| 128 | ) |
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[e127c4c] | 129 | { |
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[7f577d3] | 130 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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[29f7d317] | 131 | unsigned long counter = 0; |
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[e127c4c] | 132 | |
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[7f577d3] | 133 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
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[e127c4c] | 134 | ++counter; |
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[29f7d317] | 135 | _Atomic_Fetch_add_ulong(&ctx->atomic_value, 1, ATOMIC_ORDER_RELAXED); |
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[e127c4c] | 136 | } |
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| 137 | |
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[7136d7f] | 138 | ctx->per_worker_value[worker_index] = counter; |
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[e127c4c] | 139 | } |
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| 140 | |
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[33b72fd] | 141 | static void test_atomic_add_fini( |
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| 142 | rtems_test_parallel_context *base, |
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| 143 | void *arg, |
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| 144 | size_t active_workers |
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| 145 | ) |
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[79d03e3] | 146 | { |
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[7f577d3] | 147 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 148 | |
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[47b6fad] | 149 | test_fini(ctx, "add", true); |
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[79d03e3] | 150 | } |
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| 151 | |
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[7f577d3] | 152 | static rtems_interval test_atomic_flag_init( |
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| 153 | rtems_test_parallel_context *base, |
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[33b72fd] | 154 | void *arg, |
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| 155 | size_t active_workers |
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[7f577d3] | 156 | ) |
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[e127c4c] | 157 | { |
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[7f577d3] | 158 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 159 | |
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[e127c4c] | 160 | _Atomic_Flag_clear(&ctx->global_flag, ATOMIC_ORDER_RELEASE); |
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[7136d7f] | 161 | ctx->normal_value = 0; |
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[7f577d3] | 162 | |
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| 163 | return test_duration(); |
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[e127c4c] | 164 | } |
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| 165 | |
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[7f577d3] | 166 | static void test_atomic_flag_body( |
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| 167 | rtems_test_parallel_context *base, |
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| 168 | void *arg, |
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[33b72fd] | 169 | size_t active_workers, |
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[7f577d3] | 170 | size_t worker_index |
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| 171 | ) |
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[79d03e3] | 172 | { |
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[7f577d3] | 173 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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[29f7d317] | 174 | unsigned long counter = 0; |
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[79d03e3] | 175 | |
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[7f577d3] | 176 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
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[e127c4c] | 177 | while (_Atomic_Flag_test_and_set(&ctx->global_flag, ATOMIC_ORDER_ACQUIRE)) { |
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| 178 | /* Wait */ |
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| 179 | } |
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| 180 | |
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[79d03e3] | 181 | ++counter; |
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[7136d7f] | 182 | ++ctx->normal_value; |
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[e127c4c] | 183 | |
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| 184 | _Atomic_Flag_clear(&ctx->global_flag, ATOMIC_ORDER_RELEASE); |
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[79d03e3] | 185 | } |
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| 186 | |
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[7136d7f] | 187 | ctx->per_worker_value[worker_index] = counter; |
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[79d03e3] | 188 | } |
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| 189 | |
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[33b72fd] | 190 | static void test_atomic_flag_fini( |
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| 191 | rtems_test_parallel_context *base, |
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| 192 | void *arg, |
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| 193 | size_t active_workers |
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| 194 | ) |
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[79d03e3] | 195 | { |
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[7f577d3] | 196 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 197 | |
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[47b6fad] | 198 | test_fini(ctx, "flag", false); |
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[79d03e3] | 199 | } |
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| 200 | |
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[7f577d3] | 201 | static rtems_interval test_atomic_sub_init( |
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| 202 | rtems_test_parallel_context *base, |
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[33b72fd] | 203 | void *arg, |
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| 204 | size_t active_workers |
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[7f577d3] | 205 | ) |
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[4238aff] | 206 | { |
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[7f577d3] | 207 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 208 | |
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[29f7d317] | 209 | _Atomic_Init_ulong(&ctx->atomic_value, 0); |
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[7f577d3] | 210 | |
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| 211 | return test_duration(); |
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[4238aff] | 212 | } |
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| 213 | |
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[7f577d3] | 214 | static void test_atomic_sub_body( |
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| 215 | rtems_test_parallel_context *base, |
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| 216 | void *arg, |
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[33b72fd] | 217 | size_t active_workers, |
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[7f577d3] | 218 | size_t worker_index |
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| 219 | ) |
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[4238aff] | 220 | { |
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[7f577d3] | 221 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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[29f7d317] | 222 | unsigned long counter = 0; |
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[4238aff] | 223 | |
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[7f577d3] | 224 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
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[4238aff] | 225 | --counter; |
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[29f7d317] | 226 | _Atomic_Fetch_sub_ulong(&ctx->atomic_value, 1, ATOMIC_ORDER_RELAXED); |
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[4238aff] | 227 | } |
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| 228 | |
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[47b6fad] | 229 | ctx->per_worker_value[worker_index] = counter; |
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[4238aff] | 230 | } |
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| 231 | |
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[33b72fd] | 232 | static void test_atomic_sub_fini( |
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| 233 | rtems_test_parallel_context *base, |
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| 234 | void *arg, |
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| 235 | size_t active_workers |
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| 236 | ) |
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[4238aff] | 237 | { |
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[7f577d3] | 238 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 239 | |
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[47b6fad] | 240 | test_fini(ctx, "sub", true); |
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[4238aff] | 241 | } |
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| 242 | |
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[7f577d3] | 243 | static rtems_interval test_atomic_compare_exchange_init( |
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| 244 | rtems_test_parallel_context *base, |
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[33b72fd] | 245 | void *arg, |
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| 246 | size_t active_workers |
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[7f577d3] | 247 | ) |
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[4238aff] | 248 | { |
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[7f577d3] | 249 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 250 | |
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[29f7d317] | 251 | _Atomic_Init_ulong(&ctx->atomic_value, 0); |
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[7136d7f] | 252 | ctx->normal_value = 0; |
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[7f577d3] | 253 | |
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| 254 | return test_duration(); |
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[4238aff] | 255 | } |
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| 256 | |
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[7f577d3] | 257 | static void test_atomic_compare_exchange_body( |
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| 258 | rtems_test_parallel_context *base, |
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| 259 | void *arg, |
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[33b72fd] | 260 | size_t active_workers, |
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[7f577d3] | 261 | size_t worker_index |
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| 262 | ) |
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[4238aff] | 263 | { |
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[7f577d3] | 264 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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[29f7d317] | 265 | unsigned long counter = 0; |
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[4238aff] | 266 | |
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[7f577d3] | 267 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
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[d39ccd69] | 268 | bool success; |
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| 269 | |
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| 270 | do { |
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[29f7d317] | 271 | unsigned long zero = 0; |
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[d39ccd69] | 272 | |
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[29f7d317] | 273 | success = _Atomic_Compare_exchange_ulong( |
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[7136d7f] | 274 | &ctx->atomic_value, |
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[d39ccd69] | 275 | &zero, |
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| 276 | 1, |
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| 277 | ATOMIC_ORDER_ACQUIRE, |
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| 278 | ATOMIC_ORDER_RELAXED |
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| 279 | ); |
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| 280 | } while (!success); |
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| 281 | |
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[4238aff] | 282 | ++counter; |
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[7136d7f] | 283 | ++ctx->normal_value; |
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[d39ccd69] | 284 | |
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[29f7d317] | 285 | _Atomic_Store_ulong(&ctx->atomic_value, 0, ATOMIC_ORDER_RELEASE); |
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[4238aff] | 286 | } |
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| 287 | |
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[7136d7f] | 288 | ctx->per_worker_value[worker_index] = counter; |
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[4238aff] | 289 | } |
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| 290 | |
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[7f577d3] | 291 | static void test_atomic_compare_exchange_fini( |
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| 292 | rtems_test_parallel_context *base, |
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[33b72fd] | 293 | void *arg, |
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| 294 | size_t active_workers |
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[7f577d3] | 295 | ) |
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[4238aff] | 296 | { |
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[7f577d3] | 297 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 298 | |
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[47b6fad] | 299 | test_fini(ctx, "compare exchange", false); |
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[4238aff] | 300 | } |
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| 301 | |
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[7f577d3] | 302 | static rtems_interval test_atomic_or_and_init( |
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| 303 | rtems_test_parallel_context *base, |
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[33b72fd] | 304 | void *arg, |
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| 305 | size_t active_workers |
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[7f577d3] | 306 | ) |
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[4238aff] | 307 | { |
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[7f577d3] | 308 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 309 | |
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[29f7d317] | 310 | _Atomic_Init_ulong(&ctx->atomic_value, 0); |
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[7f577d3] | 311 | |
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| 312 | return test_duration(); |
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[4238aff] | 313 | } |
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| 314 | |
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[7f577d3] | 315 | static void test_atomic_or_and_body( |
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| 316 | rtems_test_parallel_context *base, |
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| 317 | void *arg, |
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[33b72fd] | 318 | size_t active_workers, |
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[7f577d3] | 319 | size_t worker_index |
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| 320 | ) |
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[4238aff] | 321 | { |
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[7f577d3] | 322 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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[29f7d317] | 323 | unsigned long the_bit = 1UL << worker_index; |
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| 324 | unsigned long current_bit = 0; |
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[4238aff] | 325 | |
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[7f577d3] | 326 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
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[29f7d317] | 327 | unsigned long previous; |
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[7136d7f] | 328 | |
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| 329 | if (current_bit != 0) { |
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[29f7d317] | 330 | previous = _Atomic_Fetch_and_ulong( |
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[7136d7f] | 331 | &ctx->atomic_value, |
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| 332 | ~the_bit, |
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| 333 | ATOMIC_ORDER_RELAXED |
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| 334 | ); |
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| 335 | current_bit = 0; |
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| 336 | } else { |
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[29f7d317] | 337 | previous = _Atomic_Fetch_or_ulong( |
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[7136d7f] | 338 | &ctx->atomic_value, |
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| 339 | the_bit, |
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| 340 | ATOMIC_ORDER_RELAXED |
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| 341 | ); |
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| 342 | current_bit = the_bit; |
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| 343 | } |
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| 344 | |
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| 345 | rtems_test_assert((previous & the_bit) != current_bit); |
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[4238aff] | 346 | } |
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| 347 | |
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[7136d7f] | 348 | ctx->per_worker_value[worker_index] = current_bit; |
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[4238aff] | 349 | } |
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| 350 | |
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[7f577d3] | 351 | static void test_atomic_or_and_fini( |
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| 352 | rtems_test_parallel_context *base, |
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[33b72fd] | 353 | void *arg, |
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| 354 | size_t active_workers |
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[7f577d3] | 355 | ) |
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[4238aff] | 356 | { |
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[7f577d3] | 357 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 358 | |
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[47b6fad] | 359 | test_fini(ctx, "or/and", true); |
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[4238aff] | 360 | } |
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| 361 | |
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[7f577d3] | 362 | static rtems_interval test_atomic_fence_init( |
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| 363 | rtems_test_parallel_context *base, |
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[33b72fd] | 364 | void *arg, |
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| 365 | size_t active_workers |
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[7f577d3] | 366 | ) |
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[8b50a55] | 367 | { |
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[7f577d3] | 368 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 369 | |
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[8b50a55] | 370 | ctx->normal_value = 0; |
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| 371 | ctx->second_value = 0; |
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| 372 | _Atomic_Fence(ATOMIC_ORDER_RELEASE); |
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[7f577d3] | 373 | |
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| 374 | return test_duration(); |
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[8b50a55] | 375 | } |
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| 376 | |
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[7f577d3] | 377 | static void test_atomic_fence_body( |
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| 378 | rtems_test_parallel_context *base, |
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| 379 | void *arg, |
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[33b72fd] | 380 | size_t active_workers, |
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[7f577d3] | 381 | size_t worker_index |
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| 382 | ) |
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[8b50a55] | 383 | { |
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[7f577d3] | 384 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 385 | |
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| 386 | if (rtems_test_parallel_is_master_worker(worker_index)) { |
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[8b50a55] | 387 | unsigned long counter = 0; |
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| 388 | |
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[7f577d3] | 389 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
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[8b50a55] | 390 | ++counter; |
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| 391 | ctx->normal_value = counter; |
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| 392 | _Atomic_Fence(ATOMIC_ORDER_RELEASE); |
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| 393 | ctx->second_value = counter; |
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| 394 | } |
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| 395 | } else { |
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[7f577d3] | 396 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
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[8b50a55] | 397 | unsigned long n; |
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| 398 | unsigned long s; |
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| 399 | |
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| 400 | s = ctx->second_value; |
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| 401 | _Atomic_Fence(ATOMIC_ORDER_ACQUIRE); |
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| 402 | n = ctx->normal_value; |
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| 403 | |
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| 404 | rtems_test_assert(n - s < LONG_MAX); |
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| 405 | } |
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| 406 | } |
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| 407 | } |
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| 408 | |
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[33b72fd] | 409 | static void test_atomic_fence_fini( |
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| 410 | rtems_test_parallel_context *base, |
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| 411 | void *arg, |
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| 412 | size_t active_workers |
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| 413 | ) |
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[8b50a55] | 414 | { |
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[7f577d3] | 415 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 416 | |
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[8b50a55] | 417 | printf( |
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| 418 | "=== atomic fence test case ===\n" |
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| 419 | "normal value = %lu, second value = %lu\n", |
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| 420 | ctx->normal_value, |
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| 421 | ctx->second_value |
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| 422 | ); |
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| 423 | } |
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| 424 | |
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[a9cc6a84] | 425 | static rtems_interval test_atomic_store_load_rmw_init( |
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| 426 | rtems_test_parallel_context *base, |
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| 427 | void *arg, |
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| 428 | size_t active_workers |
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| 429 | ) |
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| 430 | { |
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| 431 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
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| 432 | size_t i; |
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| 433 | |
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| 434 | _Atomic_Init_ulong(&ctx->atomic_value, 0); |
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| 435 | |
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| 436 | _SMP_barrier_Control_initialize(&ctx->barrier); |
---|
| 437 | |
---|
| 438 | for (i = 0; i < active_workers; ++i) { |
---|
| 439 | _SMP_barrier_State_initialize(&ctx->barrier_state[i]); |
---|
| 440 | } |
---|
| 441 | |
---|
| 442 | return 0; |
---|
| 443 | } |
---|
| 444 | |
---|
| 445 | static sbintime_t now(void) |
---|
| 446 | { |
---|
| 447 | struct bintime bt; |
---|
| 448 | |
---|
| 449 | rtems_bsd_binuptime(&bt); |
---|
| 450 | return bttosbt(bt); |
---|
| 451 | } |
---|
| 452 | |
---|
| 453 | static void test_atomic_store_load_rmw_body( |
---|
| 454 | rtems_test_parallel_context *base, |
---|
| 455 | void *arg, |
---|
| 456 | size_t active_workers, |
---|
| 457 | size_t worker_index |
---|
| 458 | ) |
---|
| 459 | { |
---|
| 460 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
---|
| 461 | uint32_t cpu_self_index; |
---|
| 462 | sbintime_t t; |
---|
| 463 | int counter; |
---|
| 464 | |
---|
| 465 | if (rtems_test_parallel_is_master_worker(worker_index)) { |
---|
| 466 | rtems_status_code sc; |
---|
| 467 | |
---|
| 468 | sc = rtems_task_wake_after(1); |
---|
| 469 | rtems_test_assert(sc == RTEMS_SUCCESSFUL); |
---|
| 470 | |
---|
| 471 | t = now(); |
---|
| 472 | t += (MS_PER_TICK / 2) * SBT_1MS; |
---|
| 473 | ctx->load_trigger_time = t; |
---|
| 474 | t += MS_PER_TICK * SBT_1MS; |
---|
| 475 | ctx->rmw_trigger_time = t; |
---|
| 476 | } |
---|
| 477 | |
---|
| 478 | _Atomic_Fence(ATOMIC_ORDER_SEQ_CST); |
---|
| 479 | |
---|
| 480 | _SMP_barrier_Wait( |
---|
| 481 | &ctx->barrier, |
---|
| 482 | &ctx->barrier_state[worker_index], |
---|
| 483 | active_workers |
---|
| 484 | ); |
---|
| 485 | |
---|
| 486 | /* |
---|
| 487 | * Use the physical processor index, to observe timing differences introduced |
---|
| 488 | * by the system topology. |
---|
| 489 | */ |
---|
[03c9f24] | 490 | cpu_self_index = rtems_scheduler_get_processor(); |
---|
[a9cc6a84] | 491 | |
---|
| 492 | /* Store release and load acquire test case */ |
---|
| 493 | |
---|
| 494 | counter = 0; |
---|
| 495 | t = ctx->load_trigger_time; |
---|
| 496 | |
---|
| 497 | while (now() < t) { |
---|
| 498 | /* Wait */ |
---|
| 499 | } |
---|
| 500 | |
---|
| 501 | if (cpu_self_index == 0) { |
---|
| 502 | _Atomic_Store_ulong(&ctx->atomic_value, 1, ATOMIC_ORDER_RELEASE); |
---|
| 503 | } else { |
---|
| 504 | while (_Atomic_Load_ulong(&ctx->atomic_value, ATOMIC_ORDER_ACQUIRE) == 0) { |
---|
| 505 | ++counter; |
---|
| 506 | } |
---|
| 507 | } |
---|
| 508 | |
---|
| 509 | ctx->load_change_time[cpu_self_index] = now(); |
---|
| 510 | ctx->load_count[cpu_self_index] = counter; |
---|
| 511 | |
---|
| 512 | /* Read-modify-write test case */ |
---|
| 513 | |
---|
| 514 | if (cpu_self_index == 0) { |
---|
| 515 | _Atomic_Store_ulong(&ctx->atomic_value, 0, ATOMIC_ORDER_RELAXED); |
---|
| 516 | } |
---|
| 517 | |
---|
| 518 | counter = 0; |
---|
| 519 | t = ctx->rmw_trigger_time; |
---|
| 520 | |
---|
| 521 | while (now() < t) { |
---|
| 522 | /* Wait */ |
---|
| 523 | } |
---|
| 524 | |
---|
| 525 | if (cpu_self_index == 0) { |
---|
| 526 | _Atomic_Store_ulong(&ctx->atomic_value, 1, ATOMIC_ORDER_RELAXED); |
---|
| 527 | } else { |
---|
| 528 | while ( |
---|
| 529 | (_Atomic_Fetch_or_ulong(&ctx->atomic_value, 2, ATOMIC_ORDER_RELAXED) & 1) |
---|
| 530 | == 0 |
---|
| 531 | ) { |
---|
| 532 | ++counter; |
---|
| 533 | } |
---|
| 534 | } |
---|
| 535 | |
---|
| 536 | ctx->rmw_change_time[cpu_self_index] = now(); |
---|
| 537 | ctx->rmw_count[cpu_self_index] = counter; |
---|
| 538 | } |
---|
| 539 | |
---|
| 540 | static void test_atomic_store_load_rmw_fini( |
---|
| 541 | rtems_test_parallel_context *base, |
---|
| 542 | void *arg, |
---|
| 543 | size_t active_workers |
---|
| 544 | ) |
---|
| 545 | { |
---|
| 546 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
---|
| 547 | size_t i; |
---|
| 548 | struct bintime bt; |
---|
| 549 | struct timespec ts; |
---|
| 550 | |
---|
| 551 | printf("=== atomic store release and load acquire test case ===\n"); |
---|
| 552 | |
---|
| 553 | for (i = 0; i < active_workers; ++i) { |
---|
| 554 | bt = sbttobt(ctx->load_change_time[i] - ctx->load_trigger_time); |
---|
| 555 | bintime2timespec(&bt, &ts); |
---|
| 556 | printf( |
---|
| 557 | "processor %zu delta %lins, load count %i\n", |
---|
| 558 | i, |
---|
| 559 | ts.tv_nsec, |
---|
| 560 | ctx->load_count[i] |
---|
| 561 | ); |
---|
| 562 | } |
---|
| 563 | |
---|
| 564 | printf("=== atomic read-modify-write test case ===\n"); |
---|
| 565 | |
---|
| 566 | for (i = 0; i < active_workers; ++i) { |
---|
| 567 | bt = sbttobt(ctx->rmw_change_time[i] - ctx->rmw_trigger_time); |
---|
| 568 | bintime2timespec(&bt, &ts); |
---|
| 569 | printf( |
---|
| 570 | "processor %zu delta %lins, read-modify-write count %i\n", |
---|
| 571 | i, |
---|
| 572 | ts.tv_nsec, |
---|
| 573 | ctx->rmw_count[i] |
---|
| 574 | ); |
---|
| 575 | } |
---|
| 576 | } |
---|
| 577 | |
---|
[cc8bb9e3] | 578 | /* |
---|
| 579 | * See also Hans-J. Boehm, HP Laboratories, |
---|
| 580 | * "Can Seqlocks Get Along With Programming Language Memory Models?", |
---|
| 581 | * http://www.hpl.hp.com/techreports/2012/HPL-2012-68.pdf |
---|
| 582 | */ |
---|
| 583 | |
---|
| 584 | static rtems_interval test_seqlock_init( |
---|
| 585 | rtems_test_parallel_context *base, |
---|
| 586 | void *arg, |
---|
| 587 | size_t active_workers |
---|
| 588 | ) |
---|
| 589 | { |
---|
| 590 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
---|
| 591 | |
---|
| 592 | ctx->normal_value = 0; |
---|
| 593 | ctx->second_value = 0; |
---|
| 594 | _Atomic_Store_ulong(&ctx->atomic_value, 0, ATOMIC_ORDER_RELEASE); |
---|
| 595 | |
---|
| 596 | return test_duration(); |
---|
| 597 | } |
---|
| 598 | |
---|
| 599 | static unsigned long seqlock_read(smpatomic01_context *ctx) |
---|
| 600 | { |
---|
| 601 | unsigned long counter = 0; |
---|
| 602 | |
---|
| 603 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
---|
| 604 | unsigned long seq0; |
---|
| 605 | unsigned long seq1; |
---|
| 606 | unsigned long a; |
---|
| 607 | unsigned long b; |
---|
| 608 | |
---|
| 609 | do { |
---|
| 610 | seq0 = _Atomic_Load_ulong(&ctx->atomic_value, ATOMIC_ORDER_ACQUIRE); |
---|
| 611 | |
---|
| 612 | a = ctx->normal_value; |
---|
| 613 | b = ctx->second_value; |
---|
| 614 | |
---|
| 615 | seq1 = |
---|
| 616 | _Atomic_Fetch_add_ulong(&ctx->atomic_value, 0, ATOMIC_ORDER_RELEASE); |
---|
| 617 | } while (seq0 != seq1 || seq0 % 2 != 0); |
---|
| 618 | |
---|
| 619 | ++counter; |
---|
| 620 | rtems_test_assert(a == b); |
---|
| 621 | } |
---|
| 622 | |
---|
| 623 | return counter; |
---|
| 624 | } |
---|
| 625 | |
---|
| 626 | static void test_single_writer_seqlock_body( |
---|
| 627 | rtems_test_parallel_context *base, |
---|
| 628 | void *arg, |
---|
| 629 | size_t active_workers, |
---|
| 630 | size_t worker_index |
---|
| 631 | ) |
---|
| 632 | { |
---|
| 633 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
---|
| 634 | uint32_t cpu_self_index; |
---|
| 635 | unsigned long counter; |
---|
| 636 | |
---|
| 637 | /* |
---|
| 638 | * Use the physical processor index, to observe timing differences introduced |
---|
| 639 | * by the system topology. |
---|
| 640 | */ |
---|
[03c9f24] | 641 | cpu_self_index = rtems_scheduler_get_processor(); |
---|
[cc8bb9e3] | 642 | |
---|
| 643 | if (cpu_self_index == 0) { |
---|
| 644 | counter = 0; |
---|
| 645 | |
---|
| 646 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
---|
| 647 | unsigned long seq; |
---|
| 648 | |
---|
| 649 | seq = _Atomic_Load_ulong(&ctx->atomic_value, ATOMIC_ORDER_RELAXED); |
---|
| 650 | _Atomic_Store_ulong(&ctx->atomic_value, seq + 1, ATOMIC_ORDER_RELAXED); |
---|
[4c19e59b] | 651 | |
---|
| 652 | /* There is no atomic store with acquire/release semantics */ |
---|
| 653 | _Atomic_Fence(ATOMIC_ORDER_ACQ_REL); |
---|
[cc8bb9e3] | 654 | |
---|
| 655 | ++counter; |
---|
| 656 | ctx->normal_value = counter; |
---|
| 657 | ctx->second_value = counter; |
---|
| 658 | |
---|
| 659 | _Atomic_Store_ulong(&ctx->atomic_value, seq + 2, ATOMIC_ORDER_RELEASE); |
---|
| 660 | } |
---|
| 661 | } else { |
---|
| 662 | counter = seqlock_read(ctx); |
---|
| 663 | } |
---|
| 664 | |
---|
| 665 | ctx->per_worker_value[cpu_self_index] = counter; |
---|
| 666 | } |
---|
| 667 | |
---|
| 668 | static void test_single_writer_seqlock_fini( |
---|
| 669 | rtems_test_parallel_context *base, |
---|
| 670 | void *arg, |
---|
| 671 | size_t active_workers |
---|
| 672 | ) |
---|
| 673 | { |
---|
| 674 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
---|
| 675 | size_t i; |
---|
| 676 | |
---|
| 677 | printf("=== single writer seqlock test case ===\n"); |
---|
| 678 | |
---|
| 679 | for (i = 0; i < active_workers; ++i) { |
---|
| 680 | printf( |
---|
| 681 | "processor %zu count %lu\n", |
---|
| 682 | i, |
---|
| 683 | ctx->per_worker_value[i] |
---|
| 684 | ); |
---|
| 685 | } |
---|
| 686 | } |
---|
| 687 | |
---|
| 688 | static void test_multi_writer_seqlock_body( |
---|
| 689 | rtems_test_parallel_context *base, |
---|
| 690 | void *arg, |
---|
| 691 | size_t active_workers, |
---|
| 692 | size_t worker_index |
---|
| 693 | ) |
---|
| 694 | { |
---|
| 695 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
---|
| 696 | uint32_t cpu_self_index; |
---|
| 697 | unsigned long counter; |
---|
| 698 | |
---|
| 699 | /* |
---|
| 700 | * Use the physical processor index, to observe timing differences introduced |
---|
| 701 | * by the system topology. |
---|
| 702 | */ |
---|
[03c9f24] | 703 | cpu_self_index = rtems_scheduler_get_processor(); |
---|
[cc8bb9e3] | 704 | |
---|
| 705 | if (cpu_self_index % 2 == 0) { |
---|
| 706 | counter = 0; |
---|
| 707 | |
---|
| 708 | while (!rtems_test_parallel_stop_job(&ctx->base)) { |
---|
| 709 | unsigned long seq; |
---|
| 710 | |
---|
| 711 | do { |
---|
| 712 | seq = _Atomic_Load_ulong(&ctx->atomic_value, ATOMIC_ORDER_RELAXED); |
---|
| 713 | } while ( |
---|
| 714 | seq % 2 != 0 |
---|
| 715 | || !_Atomic_Compare_exchange_ulong( |
---|
| 716 | &ctx->atomic_value, |
---|
| 717 | &seq, |
---|
| 718 | seq + 1, |
---|
| 719 | ATOMIC_ORDER_ACQ_REL, |
---|
| 720 | ATOMIC_ORDER_RELAXED |
---|
| 721 | ) |
---|
| 722 | ); |
---|
| 723 | |
---|
| 724 | ++counter; |
---|
| 725 | ctx->normal_value = counter; |
---|
| 726 | ctx->second_value = counter; |
---|
| 727 | |
---|
| 728 | _Atomic_Store_ulong(&ctx->atomic_value, seq + 2, ATOMIC_ORDER_RELEASE); |
---|
| 729 | } |
---|
| 730 | } else { |
---|
| 731 | counter = seqlock_read(ctx); |
---|
| 732 | } |
---|
| 733 | |
---|
| 734 | ctx->per_worker_value[cpu_self_index] = counter; |
---|
| 735 | } |
---|
| 736 | |
---|
| 737 | static void test_multi_writer_seqlock_fini( |
---|
| 738 | rtems_test_parallel_context *base, |
---|
| 739 | void *arg, |
---|
| 740 | size_t active_workers |
---|
| 741 | ) |
---|
| 742 | { |
---|
| 743 | smpatomic01_context *ctx = (smpatomic01_context *) base; |
---|
| 744 | size_t i; |
---|
| 745 | |
---|
| 746 | printf("=== multi writer seqlock test case ===\n"); |
---|
| 747 | |
---|
| 748 | for (i = 0; i < active_workers; ++i) { |
---|
| 749 | printf( |
---|
| 750 | "processor %zu count %lu\n", |
---|
| 751 | i, |
---|
| 752 | ctx->per_worker_value[i] |
---|
| 753 | ); |
---|
| 754 | } |
---|
| 755 | } |
---|
| 756 | |
---|
[7f577d3] | 757 | static const rtems_test_parallel_job test_jobs[] = { |
---|
[47b6fad] | 758 | { |
---|
[33b72fd] | 759 | .init = test_atomic_add_init, |
---|
| 760 | .body = test_atomic_add_body, |
---|
| 761 | .fini = test_atomic_add_fini |
---|
[47b6fad] | 762 | }, { |
---|
[33b72fd] | 763 | .init = test_atomic_flag_init, |
---|
[8c7eb00] | 764 | .body = test_atomic_flag_body, |
---|
| 765 | .fini = test_atomic_flag_fini |
---|
[47b6fad] | 766 | }, { |
---|
[33b72fd] | 767 | .init = test_atomic_sub_init, |
---|
[8c7eb00] | 768 | .body = test_atomic_sub_body, |
---|
| 769 | .fini = test_atomic_sub_fini |
---|
[47b6fad] | 770 | }, { |
---|
[33b72fd] | 771 | .init = test_atomic_compare_exchange_init, |
---|
[8c7eb00] | 772 | .body = test_atomic_compare_exchange_body, |
---|
| 773 | .fini = test_atomic_compare_exchange_fini |
---|
[47b6fad] | 774 | }, { |
---|
[33b72fd] | 775 | .init = test_atomic_or_and_init, |
---|
[8c7eb00] | 776 | .body = test_atomic_or_and_body, |
---|
| 777 | .fini = test_atomic_or_and_fini |
---|
[8b50a55] | 778 | }, { |
---|
[33b72fd] | 779 | .init = test_atomic_fence_init, |
---|
[8c7eb00] | 780 | .body = test_atomic_fence_body, |
---|
| 781 | .fini = test_atomic_fence_fini |
---|
[a9cc6a84] | 782 | }, { |
---|
| 783 | .init = test_atomic_store_load_rmw_init, |
---|
| 784 | .body = test_atomic_store_load_rmw_body, |
---|
| 785 | .fini = test_atomic_store_load_rmw_fini |
---|
[cc8bb9e3] | 786 | }, { |
---|
| 787 | .init = test_seqlock_init, |
---|
| 788 | .body = test_single_writer_seqlock_body, |
---|
| 789 | .fini = test_single_writer_seqlock_fini |
---|
| 790 | }, { |
---|
| 791 | .init = test_seqlock_init, |
---|
| 792 | .body = test_multi_writer_seqlock_body, |
---|
| 793 | .fini = test_multi_writer_seqlock_fini |
---|
[a9cc6a84] | 794 | } |
---|
[79d03e3] | 795 | }; |
---|
| 796 | |
---|
[8c7eb00] | 797 | static void setup_worker( |
---|
| 798 | rtems_test_parallel_context *base, |
---|
| 799 | size_t worker_index, |
---|
| 800 | rtems_id worker_id |
---|
| 801 | ) |
---|
| 802 | { |
---|
| 803 | rtems_status_code sc; |
---|
| 804 | rtems_task_priority prio; |
---|
| 805 | |
---|
| 806 | sc = rtems_task_set_priority(worker_id, WORKER_PRIORITY, &prio); |
---|
| 807 | rtems_test_assert(sc == RTEMS_SUCCESSFUL); |
---|
| 808 | } |
---|
| 809 | |
---|
[79d03e3] | 810 | static void Init(rtems_task_argument arg) |
---|
| 811 | { |
---|
[7f577d3] | 812 | smpatomic01_context *ctx = &test_instance; |
---|
| 813 | |
---|
[ad48ebb] | 814 | TEST_BEGIN(); |
---|
[79d03e3] | 815 | |
---|
[7f577d3] | 816 | rtems_test_parallel( |
---|
| 817 | &ctx->base, |
---|
[8c7eb00] | 818 | setup_worker, |
---|
[7f577d3] | 819 | &test_jobs[0], |
---|
| 820 | RTEMS_ARRAY_SIZE(test_jobs) |
---|
| 821 | ); |
---|
[79d03e3] | 822 | |
---|
[ad48ebb] | 823 | TEST_END(); |
---|
[79d03e3] | 824 | rtems_test_exit(0); |
---|
| 825 | } |
---|
| 826 | |
---|
| 827 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER |
---|
[c4b8b147] | 828 | #define CONFIGURE_APPLICATION_NEEDS_SIMPLE_CONSOLE_DRIVER |
---|
[79d03e3] | 829 | |
---|
[a9cc6a84] | 830 | #define CONFIGURE_MICROSECONDS_PER_TICK (MS_PER_TICK * 1000) |
---|
| 831 | |
---|
[54835ae] | 832 | #define CONFIGURE_MAXIMUM_PROCESSORS CPU_COUNT |
---|
[79d03e3] | 833 | |
---|
| 834 | #define CONFIGURE_MAXIMUM_TASKS CPU_COUNT |
---|
| 835 | |
---|
| 836 | #define CONFIGURE_MAXIMUM_TIMERS 1 |
---|
| 837 | |
---|
| 838 | #define CONFIGURE_INIT_TASK_PRIORITY MASTER_PRIORITY |
---|
| 839 | #define CONFIGURE_INIT_TASK_INITIAL_MODES RTEMS_DEFAULT_MODES |
---|
| 840 | #define CONFIGURE_INIT_TASK_ATTRIBUTES RTEMS_DEFAULT_ATTRIBUTES |
---|
| 841 | |
---|
[ad48ebb] | 842 | #define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION |
---|
| 843 | |
---|
[79d03e3] | 844 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE |
---|
| 845 | |
---|
| 846 | #define CONFIGURE_INIT |
---|
| 847 | |
---|
| 848 | #include <rtems/confdefs.h> |
---|