1 | /* |
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2 | * Copyright (c) 2016 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Dornierstr. 4 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <rtems@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #ifdef HAVE_CONFIG_H |
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16 | #include "config.h" |
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17 | #endif |
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18 | |
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19 | #include <dev/spi/spi.h> |
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20 | |
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21 | #include <sys/ioctl.h> |
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22 | #include <sys/stat.h> |
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23 | #include <errno.h> |
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24 | #include <fcntl.h> |
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25 | #include <math.h> |
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26 | #include <stdlib.h> |
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27 | #include <string.h> |
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28 | #include <unistd.h> |
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29 | |
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30 | #include <rtems/libcsupport.h> |
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31 | |
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32 | #include "tmacros.h" |
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33 | |
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34 | static uint8_t mode_8 = 0xA5; |
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35 | static uint32_t mode_32 = 0x5A5A5A5A; |
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36 | static uint32_t speed = 12345678; |
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37 | static uint8_t bits_per_word = 12; |
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38 | static uint8_t lsb_first = 1; |
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39 | |
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40 | const char rtems_test_name[] = "SPI 1"; |
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41 | |
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42 | static const char bus_path[] = "/dev/spi-0"; |
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43 | |
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44 | typedef struct test_device test_device; |
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45 | |
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46 | struct test_device { |
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47 | int (*transfer)( |
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48 | spi_bus *bus, |
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49 | const spi_ioc_transfer *msgs, |
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50 | uint32_t msg_count, |
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51 | test_device *dev |
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52 | ); |
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53 | }; |
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54 | |
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55 | typedef struct { |
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56 | test_device base; |
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57 | char buf[3]; |
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58 | } test_device_simple_read_write; |
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59 | |
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60 | typedef struct { |
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61 | spi_bus base; |
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62 | unsigned long clock; |
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63 | test_device *device; |
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64 | uint32_t msg_count; |
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65 | uint32_t max_speed_hz; |
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66 | test_device_simple_read_write simple_read_write; |
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67 | } test_bus; |
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68 | |
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69 | static int test_simple_read_write_transfer( |
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70 | spi_bus *bus, |
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71 | const spi_ioc_transfer *msgs, |
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72 | uint32_t msg_count, |
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73 | test_device *base |
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74 | ) |
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75 | { |
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76 | (void)bus; |
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77 | |
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78 | test_device_simple_read_write *dev = (test_device_simple_read_write *) base; |
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79 | |
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80 | if (msg_count == 1 && msgs[0].len == sizeof(dev->buf)) { |
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81 | if (msgs[0].rx_buf == 0){ |
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82 | memcpy(&dev->buf[0], msgs[0].tx_buf, sizeof(dev->buf)); |
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83 | } else if (msgs[0].tx_buf == 0){ |
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84 | memcpy(msgs[0].rx_buf, &dev->buf[0], sizeof(dev->buf)); |
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85 | } else { |
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86 | return -EIO; |
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87 | } |
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88 | } else { |
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89 | return -EIO; |
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90 | } |
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91 | return 0; |
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92 | } |
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93 | |
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94 | static int test_transfer( |
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95 | spi_bus *base, |
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96 | const spi_ioc_transfer *msgs, |
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97 | uint32_t msg_count |
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98 | ) |
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99 | { |
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100 | test_bus *bus = (test_bus *) base; |
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101 | test_device *dev; |
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102 | |
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103 | dev = bus->device; |
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104 | bus->msg_count = msg_count; |
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105 | |
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106 | return (*dev->transfer)(&bus->base, msgs, msg_count, dev); |
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107 | } |
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108 | |
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109 | static int test_setup(spi_bus *base) |
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110 | { |
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111 | test_bus *bus = (test_bus *) base; |
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112 | |
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113 | if ((base->speed_hz > bus->max_speed_hz) || |
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114 | ((base->bits_per_word < 8) || (base->bits_per_word > 16))) { |
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115 | return 1; |
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116 | } |
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117 | |
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118 | return 0; |
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119 | } |
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120 | |
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121 | static void test_destroy(spi_bus *base) |
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122 | { |
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123 | spi_bus_destroy_and_free(base); |
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124 | } |
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125 | |
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126 | static void test_simple_read_write(test_bus *bus, int fd) |
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127 | { |
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128 | static const char zero[] = { 0, 0, 0 }; |
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129 | static const char abc[] = { 'a', 'b', 'c' }; |
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130 | |
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131 | int rv; |
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132 | char buf[3]; |
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133 | ssize_t n; |
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134 | |
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135 | errno = 0; |
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136 | rv = ioctl(fd, 0xb00b); |
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137 | rtems_test_assert(rv == -1); |
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138 | rtems_test_assert(errno == EINVAL); |
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139 | |
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140 | errno = 0; |
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141 | n = write(fd, &buf[0], 1000); |
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142 | rtems_test_assert(n == -1); |
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143 | rtems_test_assert(errno == EIO); |
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144 | |
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145 | errno = 0; |
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146 | n = read(fd, &buf[0], 1000); |
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147 | rtems_test_assert(n == -1); |
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148 | rtems_test_assert(errno == EIO); |
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149 | |
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150 | rtems_test_assert( |
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151 | memcmp(&bus->simple_read_write.buf[0], &zero[0], sizeof(buf)) == 0 |
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152 | ); |
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153 | |
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154 | n = write(fd, &abc[0], sizeof(buf)); |
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155 | rtems_test_assert(n == (ssize_t) sizeof(buf)); |
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156 | |
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157 | rtems_test_assert( |
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158 | memcmp(&bus->simple_read_write.buf[0], &abc[0], sizeof(buf)) == 0 |
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159 | ); |
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160 | |
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161 | n = read(fd, &buf[0], sizeof(buf)); |
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162 | rtems_test_assert(n == (ssize_t) sizeof(buf)); |
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163 | |
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164 | rtems_test_assert(memcmp(&buf[0], &abc[0], sizeof(buf)) == 0); |
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165 | } |
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166 | |
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167 | static void test(void) |
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168 | { |
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169 | rtems_resource_snapshot snapshot; |
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170 | test_bus *bus; |
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171 | int rv; |
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172 | int fd; |
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173 | uint8_t read_mode_8; |
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174 | uint32_t read_mode_32; |
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175 | uint32_t read_speed; |
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176 | uint8_t read_bits_per_word; |
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177 | uint8_t read_lsb_first; |
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178 | spi_ioc_transfer msg; |
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179 | |
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180 | rtems_resource_snapshot_take(&snapshot); |
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181 | |
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182 | bus = (test_bus *) spi_bus_alloc_and_init(sizeof(*bus)); |
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183 | rtems_test_assert(bus != NULL); |
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184 | |
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185 | bus->base.transfer = test_transfer; |
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186 | bus->base.destroy = test_destroy; |
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187 | bus->base.setup = test_setup; |
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188 | |
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189 | bus->simple_read_write.base.transfer = test_simple_read_write_transfer; |
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190 | bus->device = &bus->simple_read_write.base; |
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191 | |
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192 | bus->max_speed_hz = 50000000; |
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193 | |
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194 | rv = spi_bus_register(&bus->base, &bus_path[0]); |
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195 | rtems_test_assert(rv == 0); |
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196 | |
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197 | fd = open(&bus_path[0], O_RDWR); |
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198 | rtems_test_assert(fd >= 0); |
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199 | |
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200 | rv = ioctl(fd, SPI_BUS_OBTAIN); |
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201 | rtems_test_assert(rv == 0); |
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202 | |
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203 | rv = ioctl(fd, SPI_BUS_RELEASE); |
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204 | rtems_test_assert(rv == 0); |
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205 | |
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206 | rv = ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed); |
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207 | rtems_test_assert(rv == 0); |
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208 | rv = ioctl(fd, SPI_IOC_RD_MAX_SPEED_HZ, &read_speed); |
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209 | rtems_test_assert(rv == 0); |
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210 | rtems_test_assert(read_speed == speed); |
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211 | |
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212 | speed = 60000000; |
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213 | rv = ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed); |
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214 | rtems_test_assert(rv == -1); |
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215 | |
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216 | rv = ioctl(fd, SPI_IOC_WR_LSB_FIRST, &lsb_first); |
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217 | rtems_test_assert(rv == 0); |
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218 | rv = ioctl(fd, SPI_IOC_RD_LSB_FIRST, &read_lsb_first); |
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219 | rtems_test_assert(rv == 0); |
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220 | rtems_test_assert(read_lsb_first == lsb_first); |
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221 | |
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222 | rv = ioctl(fd, SPI_IOC_WR_MODE, &mode_8); |
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223 | rtems_test_assert(rv == 0); |
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224 | rv = ioctl(fd, SPI_IOC_RD_MODE, &read_mode_8); |
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225 | rtems_test_assert(rv == 0); |
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226 | rtems_test_assert(read_mode_8 == mode_8); |
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227 | |
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228 | rv = ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits_per_word); |
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229 | rtems_test_assert(rv == 0); |
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230 | rv = ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &read_bits_per_word); |
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231 | rtems_test_assert(rv == 0); |
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232 | rtems_test_assert(read_bits_per_word == bits_per_word); |
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233 | |
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234 | bits_per_word = 7; |
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235 | rv = ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits_per_word); |
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236 | rtems_test_assert(rv == -1); |
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237 | |
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238 | rv = ioctl(fd, SPI_IOC_WR_MODE32, &mode_32); |
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239 | rtems_test_assert(rv == 0); |
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240 | rv = ioctl(fd, SPI_IOC_RD_MODE32, &read_mode_32); |
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241 | rtems_test_assert(rv == 0); |
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242 | rtems_test_assert(read_mode_32 == mode_32); |
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243 | |
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244 | bus->msg_count = 1; |
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245 | ioctl(fd, SPI_IOC_MESSAGE(8192), &msg); |
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246 | rtems_test_assert(bus->msg_count == 0); |
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247 | |
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248 | test_simple_read_write(bus, fd); |
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249 | |
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250 | rv = close(fd); |
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251 | rtems_test_assert(rv == 0); |
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252 | |
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253 | rv = unlink(&bus_path[0]); |
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254 | rtems_test_assert(rv == 0); |
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255 | |
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256 | rtems_test_assert(rtems_resource_snapshot_check(&snapshot)); |
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257 | } |
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258 | |
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259 | static void Init(rtems_task_argument arg) |
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260 | { |
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261 | (void)arg; |
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262 | |
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263 | TEST_BEGIN(); |
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264 | |
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265 | test(); |
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266 | |
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267 | TEST_END(); |
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268 | rtems_test_exit(0); |
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269 | } |
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270 | |
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271 | #define CONFIGURE_MICROSECONDS_PER_TICK 2000 |
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272 | |
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273 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER |
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274 | #define CONFIGURE_APPLICATION_NEEDS_SIMPLE_CONSOLE_DRIVER |
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275 | |
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276 | #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 7 |
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277 | |
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278 | #define CONFIGURE_MAXIMUM_TASKS 1 |
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279 | |
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280 | #define CONFIGURE_MAXIMUM_SEMAPHORES 1 |
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281 | |
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282 | #define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION |
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283 | |
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284 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE |
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285 | |
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286 | #define CONFIGURE_INIT |
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287 | |
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288 | #include <rtems/confdefs.h> |
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