[41c5f1b7] | 1 | /* |
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| 2 | * Copyright (c) 2014 embedded brains GmbH. All rights reserved. |
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| 3 | * |
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| 4 | * embedded brains GmbH |
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| 5 | * Dornierstr. 4 |
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| 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <rtems@embedded-brains.de> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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| 12 | * http://www.rtems.org/license/LICENSE. |
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| 13 | */ |
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| 14 | |
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| 15 | #ifdef HAVE_CONFIG_H |
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[80cf60e] | 16 | #include "config.h" |
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[41c5f1b7] | 17 | #endif |
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| 18 | |
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| 19 | #include <dev/i2c/i2c.h> |
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[cce46780] | 20 | #include <dev/i2c/eeprom.h> |
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[67ac69fc] | 21 | #include <dev/i2c/gpio-nxp-pca9535.h> |
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[0510cfd8] | 22 | #include <dev/i2c/switch-nxp-pca9548a.h> |
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[41c5f1b7] | 23 | |
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| 24 | #include <sys/ioctl.h> |
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| 25 | #include <sys/stat.h> |
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| 26 | #include <errno.h> |
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| 27 | #include <fcntl.h> |
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| 28 | #include <stdlib.h> |
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| 29 | #include <string.h> |
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| 30 | #include <unistd.h> |
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| 31 | |
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| 32 | #include <rtems/libcsupport.h> |
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| 33 | |
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| 34 | #include "tmacros.h" |
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| 35 | |
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| 36 | const char rtems_test_name[] = "I2C 1"; |
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| 37 | |
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| 38 | #define SPARE_ADDRESS_BITS 3 |
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| 39 | |
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| 40 | #define DEVICE_SIMPLE_READ_WRITE (0UL << SPARE_ADDRESS_BITS) |
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| 41 | |
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[cce46780] | 42 | #define DEVICE_EEPROM (1UL << SPARE_ADDRESS_BITS) |
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| 43 | |
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[67ac69fc] | 44 | #define DEVICE_GPIO_NXP_PCA9535 (2UL << SPARE_ADDRESS_BITS) |
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| 45 | |
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[0510cfd8] | 46 | #define DEVICE_SWITCH_NXP_PCA9548A (3UL << SPARE_ADDRESS_BITS) |
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| 47 | |
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[cce46780] | 48 | #define EEPROM_SIZE 512 |
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| 49 | |
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[41c5f1b7] | 50 | typedef struct test_device test_device; |
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| 51 | |
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| 52 | struct test_device { |
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| 53 | int (*transfer)( |
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| 54 | i2c_bus *bus, |
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| 55 | i2c_msg *msgs, |
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| 56 | uint32_t msg_count, |
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| 57 | test_device *dev |
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| 58 | ); |
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| 59 | }; |
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| 60 | |
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| 61 | typedef struct { |
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| 62 | test_device base; |
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| 63 | char buf[3]; |
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| 64 | } test_device_simple_read_write; |
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| 65 | |
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[67ac69fc] | 66 | typedef struct { |
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| 67 | test_device base; |
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| 68 | unsigned current_reg; |
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| 69 | uint8_t regs[8]; |
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| 70 | } test_device_gpio_nxp_pca9535; |
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| 71 | |
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[cce46780] | 72 | typedef struct { |
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| 73 | test_device base; |
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[08135c85] | 74 | bool eio; |
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[cce46780] | 75 | unsigned current_address; |
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| 76 | uint8_t data[EEPROM_SIZE]; |
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| 77 | } test_device_eeprom; |
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| 78 | |
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[0510cfd8] | 79 | typedef struct { |
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| 80 | test_device base; |
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| 81 | uint8_t control; |
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| 82 | } test_device_switch_nxp_pca9548a; |
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| 83 | |
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[41c5f1b7] | 84 | typedef struct { |
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| 85 | i2c_bus base; |
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| 86 | unsigned long clock; |
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[0510cfd8] | 87 | test_device *devices[4]; |
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[41c5f1b7] | 88 | test_device_simple_read_write simple_read_write; |
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[67ac69fc] | 89 | test_device_gpio_nxp_pca9535 gpio_nxp_pca9535; |
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[cce46780] | 90 | test_device_eeprom eeprom; |
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[0510cfd8] | 91 | test_device_switch_nxp_pca9548a switch_nxp_pca9548a; |
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[41c5f1b7] | 92 | } test_bus; |
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| 93 | |
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| 94 | static const char bus_path[] = "/dev/i2c-0"; |
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| 95 | |
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[67ac69fc] | 96 | static const char gpio_nxp_pca9535_path[] = "/dev/i2c-0.gpio-nxp-pc9535-0"; |
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| 97 | |
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[cce46780] | 98 | static const char eeprom_path[] = "/dev/i2c-0.eeprom-0"; |
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| 99 | |
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[0510cfd8] | 100 | static const char switch_nxp_pca9548a_path[] = |
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| 101 | "/dev/i2c-0.switch-nxp-pca9548a-0"; |
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| 102 | |
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[cce46780] | 103 | static void cyclic_inc(unsigned *val, unsigned cycle) |
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| 104 | { |
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| 105 | unsigned v = *val; |
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| 106 | unsigned m = cycle - 1U; |
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| 107 | |
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| 108 | *val = (v & ~m) + ((v + 1U) & m); |
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| 109 | } |
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| 110 | |
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[41c5f1b7] | 111 | static int test_simple_read_write_transfer( |
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| 112 | i2c_bus *bus, |
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| 113 | i2c_msg *msgs, |
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| 114 | uint32_t msg_count, |
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| 115 | test_device *base |
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| 116 | ) |
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| 117 | { |
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| 118 | test_device_simple_read_write *dev = (test_device_simple_read_write *) base; |
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| 119 | |
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| 120 | if (msg_count == 1 && msgs[0].len == sizeof(dev->buf)) { |
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| 121 | if ((msgs[0].flags & I2C_M_RD) != 0) { |
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| 122 | memcpy(msgs[0].buf, &dev->buf[0], sizeof(dev->buf)); |
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| 123 | } else { |
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| 124 | memcpy(&dev->buf[0], msgs[0].buf, sizeof(dev->buf)); |
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| 125 | } |
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| 126 | |
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| 127 | return 0; |
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| 128 | } else { |
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| 129 | return -EIO; |
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| 130 | } |
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| 131 | } |
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| 132 | |
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[67ac69fc] | 133 | static int test_gpio_nxp_pca9535_transfer( |
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| 134 | i2c_bus *bus, |
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| 135 | i2c_msg *msgs, |
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| 136 | uint32_t msg_count, |
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| 137 | test_device *base |
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| 138 | ) |
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| 139 | { |
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| 140 | test_device_gpio_nxp_pca9535 *dev = (test_device_gpio_nxp_pca9535 *) base; |
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| 141 | i2c_msg *first = &msgs[0]; |
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| 142 | i2c_msg *second = &msgs[1]; |
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| 143 | int i; |
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| 144 | |
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| 145 | /* Get command byte */ |
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| 146 | if ( |
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| 147 | msg_count < 1 |
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| 148 | || (first->flags & I2C_M_RD) != 0 |
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| 149 | || first->len < 1 |
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| 150 | ) { |
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| 151 | return -EIO; |
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| 152 | } |
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| 153 | |
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| 154 | dev->current_reg = first->buf[0]; |
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| 155 | |
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| 156 | if (first->len > 1) { |
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| 157 | /* Write */ |
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| 158 | |
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| 159 | if (msg_count != 1) { |
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| 160 | return -EIO; |
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| 161 | } |
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| 162 | |
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| 163 | for (i = 1; i < first->len; ++i) { |
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| 164 | dev->regs[dev->current_reg] = first->buf[i]; |
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| 165 | |
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| 166 | /* Output is input */ |
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| 167 | if (dev->current_reg == 2) { |
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| 168 | dev->regs[0] = first->buf[i]; |
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| 169 | } else if (dev->current_reg == 3) { |
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| 170 | dev->regs[1] = first->buf[i]; |
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| 171 | } |
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| 172 | |
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| 173 | cyclic_inc(&dev->current_reg, 2); |
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| 174 | } |
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| 175 | } else { |
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| 176 | /* Read */ |
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| 177 | |
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| 178 | if (msg_count != 2) { |
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| 179 | return -EIO; |
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| 180 | } |
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| 181 | |
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| 182 | for (i = 0; i < second->len; ++i) { |
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| 183 | second->buf[i] = dev->regs[dev->current_reg]; |
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| 184 | cyclic_inc(&dev->current_reg, 2); |
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| 185 | } |
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| 186 | } |
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| 187 | |
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| 188 | return 0; |
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| 189 | } |
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| 190 | |
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[cce46780] | 191 | static int test_eeprom_transfer( |
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| 192 | i2c_bus *bus, |
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| 193 | i2c_msg *msgs, |
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| 194 | uint32_t msg_count, |
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| 195 | test_device *base |
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| 196 | ) |
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| 197 | { |
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| 198 | test_device_eeprom *dev = (test_device_eeprom *) base; |
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| 199 | i2c_msg *msg = &msgs[0]; |
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| 200 | uint32_t i; |
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| 201 | |
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[08135c85] | 202 | if (dev->eio) { |
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| 203 | return -EIO; |
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| 204 | } |
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| 205 | |
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[cce46780] | 206 | if (msg_count > 0 && (msg->flags & I2C_M_RD) == 0) { |
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| 207 | if (msg->len < 1) { |
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| 208 | return -EIO; |
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| 209 | } |
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| 210 | |
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| 211 | dev->current_address = msg->buf[0] | ((msg->addr & 0x1) << 8); |
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| 212 | --msg->len; |
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| 213 | ++msg->buf; |
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| 214 | } |
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| 215 | |
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| 216 | for (i = 0; i < msg_count; ++i) { |
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| 217 | int j; |
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| 218 | |
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| 219 | msg = &msgs[i]; |
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| 220 | |
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| 221 | if ((msg->flags & I2C_M_RD) != 0) { |
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| 222 | for (j = 0; j < msg->len; ++j) { |
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| 223 | msg->buf[j] = dev->data[dev->current_address]; |
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| 224 | cyclic_inc(&dev->current_address, sizeof(dev->data)); |
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| 225 | } |
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| 226 | } else { |
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| 227 | for (j = 0; j < msg->len; ++j) { |
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| 228 | dev->data[dev->current_address] = msg->buf[j]; |
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| 229 | cyclic_inc(&dev->current_address, 8); |
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| 230 | } |
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| 231 | } |
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| 232 | } |
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| 233 | |
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| 234 | return 0; |
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| 235 | } |
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| 236 | |
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[0510cfd8] | 237 | static int test_switch_nxp_pca9548a_transfer( |
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| 238 | i2c_bus *bus, |
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| 239 | i2c_msg *msgs, |
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| 240 | uint32_t msg_count, |
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| 241 | test_device *base |
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| 242 | ) |
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| 243 | { |
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| 244 | test_device_switch_nxp_pca9548a *dev = (test_device_switch_nxp_pca9548a *) base; |
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| 245 | uint32_t i; |
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| 246 | |
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| 247 | for (i = 0; i < msg_count; ++i) { |
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| 248 | i2c_msg *msg = &msgs[i]; |
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| 249 | int j; |
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| 250 | |
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| 251 | if ((msg->flags & I2C_M_RD) != 0) { |
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| 252 | for (j = 0; j < msg->len; ++j) { |
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| 253 | msg->buf[j] = dev->control; |
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| 254 | } |
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| 255 | } else { |
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| 256 | for (j = 0; j < msg->len; ++j) { |
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| 257 | dev->control = msg->buf[j]; |
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| 258 | } |
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| 259 | } |
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| 260 | } |
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| 261 | |
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| 262 | return 0; |
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| 263 | } |
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| 264 | |
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[41c5f1b7] | 265 | static int test_transfer(i2c_bus *base, i2c_msg *msgs, uint32_t msg_count) |
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| 266 | { |
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| 267 | test_bus *bus = (test_bus *) base; |
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| 268 | uint16_t addr; |
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| 269 | test_device *dev; |
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| 270 | |
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| 271 | addr = msgs[0].addr >> SPARE_ADDRESS_BITS; |
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| 272 | if (addr >= RTEMS_ARRAY_SIZE(bus->devices)) { |
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| 273 | return -EIO; |
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| 274 | } |
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| 275 | |
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| 276 | dev = bus->devices[addr]; |
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| 277 | |
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| 278 | return (*dev->transfer)(&bus->base, msgs, msg_count, dev); |
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| 279 | } |
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| 280 | |
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| 281 | static int test_set_clock(i2c_bus *base, unsigned long clock) |
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| 282 | { |
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| 283 | test_bus *bus = (test_bus *) base; |
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| 284 | |
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| 285 | bus->clock = clock; |
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| 286 | |
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| 287 | return 0; |
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| 288 | } |
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| 289 | |
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| 290 | static void test_destroy(i2c_bus *base) |
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| 291 | { |
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| 292 | i2c_bus_destroy_and_free(base); |
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| 293 | } |
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| 294 | |
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| 295 | static void test_simple_read_write(test_bus *bus, int fd) |
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| 296 | { |
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| 297 | static const char zero[] = { 0, 0, 0 }; |
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| 298 | static const char abc[] = { 'a', 'b', 'c' }; |
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| 299 | |
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| 300 | int rv; |
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| 301 | char buf[3]; |
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| 302 | ssize_t n; |
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| 303 | |
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| 304 | rv = ioctl(fd, I2C_SLAVE, DEVICE_SIMPLE_READ_WRITE); |
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| 305 | rtems_test_assert(rv == 0); |
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| 306 | |
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| 307 | errno = 0; |
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| 308 | rv = ioctl(fd, 0xb00b); |
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| 309 | rtems_test_assert(rv == -1); |
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| 310 | rtems_test_assert(errno == ENOTTY); |
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| 311 | |
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| 312 | errno = 0; |
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| 313 | n = write(fd, &buf[0], 1000); |
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| 314 | rtems_test_assert(n == -1); |
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| 315 | rtems_test_assert(errno == EIO); |
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| 316 | |
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| 317 | errno = 0; |
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| 318 | n = read(fd, &buf[0], 1000); |
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| 319 | rtems_test_assert(n == -1); |
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| 320 | rtems_test_assert(errno == EIO); |
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| 321 | |
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| 322 | rtems_test_assert( |
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| 323 | memcmp(&bus->simple_read_write.buf[0], &zero[0], sizeof(buf)) == 0 |
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| 324 | ); |
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| 325 | |
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| 326 | n = write(fd, &abc[0], sizeof(buf)); |
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| 327 | rtems_test_assert(n == (ssize_t) sizeof(buf)); |
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| 328 | |
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| 329 | rtems_test_assert( |
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| 330 | memcmp(&bus->simple_read_write.buf[0], &abc[0], sizeof(buf)) == 0 |
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| 331 | ); |
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| 332 | |
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| 333 | n = read(fd, &buf[0], sizeof(buf)); |
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| 334 | rtems_test_assert(n == (ssize_t) sizeof(buf)); |
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| 335 | |
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| 336 | rtems_test_assert(memcmp(&buf[0], &abc[0], sizeof(buf)) == 0); |
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| 337 | } |
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| 338 | |
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[67ac69fc] | 339 | static void test_gpio_nxp_pca9535(void) |
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| 340 | { |
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| 341 | int rv; |
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| 342 | int fd; |
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| 343 | uint16_t val; |
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| 344 | |
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| 345 | rv = i2c_dev_register_gpio_nxp_pca9535( |
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| 346 | &bus_path[0], |
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| 347 | &gpio_nxp_pca9535_path[0], |
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| 348 | DEVICE_GPIO_NXP_PCA9535 |
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| 349 | ); |
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| 350 | rtems_test_assert(rv == 0); |
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| 351 | |
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| 352 | fd = open(&gpio_nxp_pca9535_path[0], O_RDWR); |
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| 353 | rtems_test_assert(fd >= 0); |
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| 354 | |
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| 355 | rv = gpio_nxp_pca9535_get_input(fd, &val); |
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| 356 | rtems_test_assert(rv == 0); |
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| 357 | rtems_test_assert(val == 0); |
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| 358 | |
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| 359 | rv = gpio_nxp_pca9535_get_output(fd, &val); |
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| 360 | rtems_test_assert(rv == 0); |
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| 361 | rtems_test_assert(val == 0); |
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| 362 | |
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| 363 | rv = gpio_nxp_pca9535_set_output(fd, 0xa5ef); |
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| 364 | rtems_test_assert(rv == 0); |
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| 365 | |
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| 366 | rv = gpio_nxp_pca9535_get_input(fd, &val); |
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| 367 | rtems_test_assert(rv == 0); |
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| 368 | rtems_test_assert(val == 0xa5ef); |
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| 369 | |
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| 370 | rv = gpio_nxp_pca9535_get_output(fd, &val); |
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| 371 | rtems_test_assert(rv == 0); |
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| 372 | rtems_test_assert(val == 0xa5ef); |
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| 373 | |
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| 374 | rv = gpio_nxp_pca9535_clear_and_set_output(fd, 0x0ff0, 0x0170); |
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| 375 | rtems_test_assert(rv == 0); |
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| 376 | |
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| 377 | rv = gpio_nxp_pca9535_get_polarity_inversion(fd, &val); |
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| 378 | rtems_test_assert(rv == 0); |
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| 379 | rtems_test_assert(val == 0); |
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| 380 | |
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| 381 | rv = gpio_nxp_pca9535_set_polarity_inversion(fd, 0x5afe); |
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| 382 | rtems_test_assert(rv == 0); |
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| 383 | |
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| 384 | rv = gpio_nxp_pca9535_get_config(fd, &val); |
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| 385 | rtems_test_assert(rv == 0); |
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| 386 | rtems_test_assert(val == 0); |
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| 387 | |
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| 388 | rv = gpio_nxp_pca9535_set_config(fd, 0x2bcd); |
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| 389 | rtems_test_assert(rv == 0); |
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| 390 | |
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| 391 | rv = gpio_nxp_pca9535_get_input(fd, &val); |
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| 392 | rtems_test_assert(rv == 0); |
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| 393 | rtems_test_assert(val == 0xa17f); |
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| 394 | |
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| 395 | rv = gpio_nxp_pca9535_get_output(fd, &val); |
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| 396 | rtems_test_assert(rv == 0); |
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| 397 | rtems_test_assert(val == 0xa17f); |
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| 398 | |
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| 399 | rv = gpio_nxp_pca9535_get_polarity_inversion(fd, &val); |
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| 400 | rtems_test_assert(rv == 0); |
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| 401 | rtems_test_assert(val == 0x5afe); |
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| 402 | |
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| 403 | rv = gpio_nxp_pca9535_get_config(fd, &val); |
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| 404 | rtems_test_assert(rv == 0); |
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| 405 | rtems_test_assert(val == 0x2bcd); |
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| 406 | |
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| 407 | rv = close(fd); |
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| 408 | rtems_test_assert(rv == 0); |
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| 409 | |
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| 410 | rv = unlink(&gpio_nxp_pca9535_path[0]); |
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| 411 | rtems_test_assert(rv == 0); |
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| 412 | } |
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| 413 | |
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[08135c85] | 414 | static void test_eeprom(test_bus *bus) |
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[cce46780] | 415 | { |
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| 416 | int rv; |
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| 417 | int fd_in; |
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| 418 | int fd_out; |
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| 419 | struct stat st; |
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| 420 | uint8_t in[EEPROM_SIZE]; |
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| 421 | uint8_t out[EEPROM_SIZE]; |
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| 422 | ssize_t n; |
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| 423 | off_t off; |
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| 424 | size_t i; |
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| 425 | |
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| 426 | rv = i2c_dev_register_eeprom( |
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| 427 | &bus_path[0], |
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| 428 | &eeprom_path[0], |
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| 429 | DEVICE_EEPROM, |
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| 430 | 1, |
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| 431 | 8, |
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| 432 | sizeof(out), |
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| 433 | 0 |
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| 434 | ); |
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| 435 | rtems_test_assert(rv == 0); |
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| 436 | |
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| 437 | fd_in = open(&eeprom_path[0], O_RDWR); |
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| 438 | rtems_test_assert(fd_in >= 0); |
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| 439 | |
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| 440 | fd_out = open(&eeprom_path[0], O_RDWR); |
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| 441 | rtems_test_assert(fd_out >= 0); |
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| 442 | |
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| 443 | rv = fstat(fd_in, &st); |
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| 444 | rtems_test_assert(rv == 0); |
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| 445 | rtems_test_assert(st.st_blksize == 8); |
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| 446 | rtems_test_assert(st.st_size == sizeof(out)); |
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| 447 | |
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| 448 | memset(&out[0], 0, sizeof(out)); |
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| 449 | |
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[08135c85] | 450 | bus->eeprom.eio = true; |
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| 451 | |
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| 452 | errno = 0; |
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| 453 | n = read(fd_in, &in[0], 1); |
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| 454 | rtems_test_assert(n == -1); |
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| 455 | rtems_test_assert(errno == EIO); |
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| 456 | |
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| 457 | errno = 0; |
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| 458 | n = write(fd_out, &out[0], 1); |
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| 459 | rtems_test_assert(n == -1); |
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| 460 | rtems_test_assert(errno == EIO); |
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| 461 | |
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| 462 | bus->eeprom.eio = false; |
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| 463 | |
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[cce46780] | 464 | n = read(fd_in, &in[0], sizeof(in) + 1); |
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| 465 | rtems_test_assert(n == (ssize_t) sizeof(in)); |
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| 466 | |
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| 467 | rtems_test_assert(memcmp(&in[0], &out[0], sizeof(in)) == 0); |
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| 468 | |
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| 469 | off = lseek(fd_in, 0, SEEK_CUR); |
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| 470 | rtems_test_assert(off == sizeof(out)); |
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| 471 | |
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| 472 | for (i = 0; i < sizeof(out); ++i) { |
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| 473 | off = lseek(fd_out, 0, SEEK_CUR); |
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| 474 | rtems_test_assert(off == i); |
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| 475 | |
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| 476 | out[i] = (uint8_t) i; |
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| 477 | |
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| 478 | n = write(fd_out, &out[i], sizeof(out[i])); |
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| 479 | rtems_test_assert(n == (ssize_t) sizeof(out[i])); |
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| 480 | |
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| 481 | off = lseek(fd_in, 0, SEEK_SET); |
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| 482 | rtems_test_assert(off == 0); |
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| 483 | |
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| 484 | n = read(fd_in, &in[0], sizeof(in)); |
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| 485 | rtems_test_assert(n == (ssize_t) sizeof(in)); |
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| 486 | |
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| 487 | rtems_test_assert(memcmp(&in[0], &out[0], sizeof(in)) == 0); |
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| 488 | } |
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| 489 | |
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| 490 | rv = close(fd_in); |
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| 491 | rtems_test_assert(rv == 0); |
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| 492 | |
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| 493 | rv = close(fd_out); |
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| 494 | rtems_test_assert(rv == 0); |
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| 495 | |
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| 496 | rv = unlink(&eeprom_path[0]); |
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| 497 | rtems_test_assert(rv == 0); |
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| 498 | } |
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| 499 | |
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[0510cfd8] | 500 | static void test_switch_nxp_pca9548a(void) |
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| 501 | { |
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| 502 | int rv; |
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| 503 | int fd; |
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| 504 | uint8_t val; |
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| 505 | |
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| 506 | rv = i2c_dev_register_switch_nxp_pca9548a( |
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| 507 | &bus_path[0], |
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| 508 | &switch_nxp_pca9548a_path[0], |
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| 509 | DEVICE_SWITCH_NXP_PCA9548A |
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| 510 | ); |
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| 511 | rtems_test_assert(rv == 0); |
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| 512 | |
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| 513 | fd = open(&switch_nxp_pca9548a_path[0], O_RDWR); |
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| 514 | rtems_test_assert(fd >= 0); |
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| 515 | |
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| 516 | rv = switch_nxp_pca9548a_get_control(fd, &val); |
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| 517 | rtems_test_assert(rv == 0); |
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| 518 | rtems_test_assert(val == 0); |
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| 519 | |
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| 520 | rv = switch_nxp_pca9548a_set_control(fd, 0xa5); |
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| 521 | rtems_test_assert(rv == 0); |
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| 522 | |
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| 523 | rv = switch_nxp_pca9548a_get_control(fd, &val); |
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| 524 | rtems_test_assert(rv == 0); |
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| 525 | rtems_test_assert(val == 0xa5); |
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| 526 | |
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| 527 | rv = close(fd); |
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| 528 | rtems_test_assert(rv == 0); |
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| 529 | |
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| 530 | rv = unlink(&switch_nxp_pca9548a_path[0]); |
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| 531 | rtems_test_assert(rv == 0); |
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| 532 | } |
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| 533 | |
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[41c5f1b7] | 534 | static void test(void) |
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| 535 | { |
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| 536 | rtems_resource_snapshot snapshot; |
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| 537 | test_bus *bus; |
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| 538 | int rv; |
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| 539 | int fd; |
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| 540 | |
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| 541 | rtems_resource_snapshot_take(&snapshot); |
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| 542 | |
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| 543 | bus = (test_bus *) i2c_bus_alloc_and_init(sizeof(*bus)); |
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| 544 | rtems_test_assert(bus != NULL); |
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| 545 | |
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| 546 | bus->base.transfer = test_transfer; |
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| 547 | bus->base.set_clock = test_set_clock; |
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| 548 | bus->base.destroy = test_destroy; |
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| 549 | bus->base.functionality = I2C_FUNC_I2C | I2C_FUNC_PROTOCOL_MANGLING |
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| 550 | | I2C_FUNC_NOSTART; |
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| 551 | |
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| 552 | bus->simple_read_write.base.transfer = test_simple_read_write_transfer; |
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| 553 | bus->devices[0] = &bus->simple_read_write.base; |
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| 554 | |
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[cce46780] | 555 | bus->eeprom.base.transfer = test_eeprom_transfer; |
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| 556 | bus->devices[1] = &bus->eeprom.base; |
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| 557 | |
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[67ac69fc] | 558 | bus->gpio_nxp_pca9535.base.transfer = test_gpio_nxp_pca9535_transfer; |
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| 559 | bus->devices[2] = &bus->gpio_nxp_pca9535.base; |
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| 560 | |
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[0510cfd8] | 561 | bus->switch_nxp_pca9548a.base.transfer = test_switch_nxp_pca9548a_transfer; |
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| 562 | bus->devices[3] = &bus->switch_nxp_pca9548a.base; |
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| 563 | |
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[41c5f1b7] | 564 | rv = i2c_bus_register(&bus->base, &bus_path[0]); |
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| 565 | rtems_test_assert(rv == 0); |
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| 566 | |
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| 567 | fd = open(&bus_path[0], O_RDWR); |
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| 568 | rtems_test_assert(fd >= 0); |
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| 569 | |
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| 570 | rtems_test_assert(bus->clock == 0); |
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| 571 | rv = ioctl(fd, I2C_BUS_SET_CLOCK, 0xdeadbeefUL); |
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| 572 | rtems_test_assert(rv == 0); |
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| 573 | rtems_test_assert(bus->clock == 0xdeadbeef); |
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| 574 | |
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| 575 | rv = ioctl(fd, I2C_BUS_OBTAIN); |
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| 576 | rtems_test_assert(rv == 0); |
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| 577 | |
---|
| 578 | rv = ioctl(fd, I2C_BUS_RELEASE); |
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| 579 | rtems_test_assert(rv == 0); |
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| 580 | |
---|
| 581 | rtems_test_assert(!bus->base.ten_bit_address); |
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| 582 | |
---|
| 583 | rv = ioctl(fd, I2C_TENBIT, 1UL); |
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| 584 | rtems_test_assert(rv == 0); |
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| 585 | rtems_test_assert(bus->base.ten_bit_address); |
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| 586 | |
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| 587 | rv = ioctl(fd, I2C_TENBIT, 0UL); |
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| 588 | rtems_test_assert(rv == 0); |
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| 589 | rtems_test_assert(!bus->base.ten_bit_address); |
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| 590 | |
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| 591 | rtems_test_assert(!bus->base.use_pec); |
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| 592 | |
---|
| 593 | rv = ioctl(fd, I2C_PEC, 1UL); |
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| 594 | rtems_test_assert(rv == 0); |
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| 595 | rtems_test_assert(bus->base.use_pec); |
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| 596 | |
---|
| 597 | rv = ioctl(fd, I2C_PEC, 0UL); |
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| 598 | rtems_test_assert(rv == 0); |
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| 599 | rtems_test_assert(!bus->base.use_pec); |
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| 600 | |
---|
| 601 | rv = ioctl(fd, I2C_SLAVE, 123UL); |
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| 602 | rtems_test_assert(rv == 0); |
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| 603 | rtems_test_assert(bus->base.default_address == 123); |
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| 604 | |
---|
| 605 | rv = ioctl(fd, I2C_SLAVE_FORCE, 456UL); |
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| 606 | rtems_test_assert(rv == 0); |
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| 607 | rtems_test_assert(bus->base.default_address == 456); |
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| 608 | |
---|
| 609 | rtems_test_assert(bus->base.retries == 0); |
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| 610 | |
---|
| 611 | rv = ioctl(fd, I2C_RETRIES, 1UL); |
---|
| 612 | rtems_test_assert(rv == 0); |
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| 613 | rtems_test_assert(bus->base.retries == 1); |
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| 614 | |
---|
| 615 | rv = ioctl(fd, I2C_RETRIES, 0UL); |
---|
| 616 | rtems_test_assert(rv == 0); |
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| 617 | rtems_test_assert(bus->base.retries == 0); |
---|
| 618 | |
---|
| 619 | rtems_test_assert(bus->base.timeout == 0); |
---|
| 620 | |
---|
| 621 | rv = ioctl(fd, I2C_TIMEOUT, 1UL); |
---|
| 622 | rtems_test_assert(rv == 0); |
---|
| 623 | rtems_test_assert(bus->base.timeout == 5); |
---|
| 624 | |
---|
| 625 | rv = ioctl(fd, I2C_TIMEOUT, 0UL); |
---|
| 626 | rtems_test_assert(rv == 0); |
---|
| 627 | rtems_test_assert(bus->base.timeout == 0); |
---|
| 628 | |
---|
| 629 | test_simple_read_write(bus, fd); |
---|
[08135c85] | 630 | test_eeprom(bus); |
---|
[67ac69fc] | 631 | test_gpio_nxp_pca9535(); |
---|
[0510cfd8] | 632 | test_switch_nxp_pca9548a(); |
---|
[41c5f1b7] | 633 | |
---|
| 634 | rv = close(fd); |
---|
| 635 | rtems_test_assert(rv == 0); |
---|
| 636 | |
---|
| 637 | rv = unlink(&bus_path[0]); |
---|
| 638 | rtems_test_assert(rv == 0); |
---|
| 639 | |
---|
| 640 | rtems_test_assert(rtems_resource_snapshot_check(&snapshot)); |
---|
| 641 | } |
---|
| 642 | |
---|
| 643 | static void Init(rtems_task_argument arg) |
---|
| 644 | { |
---|
| 645 | TEST_BEGIN(); |
---|
| 646 | |
---|
| 647 | test(); |
---|
| 648 | |
---|
| 649 | TEST_END(); |
---|
| 650 | rtems_test_exit(0); |
---|
| 651 | } |
---|
| 652 | |
---|
| 653 | #define CONFIGURE_MICROSECONDS_PER_TICK 2000 |
---|
| 654 | |
---|
| 655 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER |
---|
[c4b8b147] | 656 | #define CONFIGURE_APPLICATION_NEEDS_SIMPLE_CONSOLE_DRIVER |
---|
[41c5f1b7] | 657 | |
---|
[3cec2df] | 658 | #define CONFIGURE_MAXIMUM_FILE_DESCRIPTORS 7 |
---|
[41c5f1b7] | 659 | |
---|
| 660 | #define CONFIGURE_MAXIMUM_TASKS 1 |
---|
| 661 | |
---|
| 662 | #define CONFIGURE_MAXIMUM_SEMAPHORES 1 |
---|
| 663 | |
---|
[9d0913d1] | 664 | #define CONFIGURE_INIT_TASK_STACK_SIZE (RTEMS_MINIMUM_STACK_SIZE + 2 * EEPROM_SIZE) |
---|
| 665 | |
---|
[41c5f1b7] | 666 | #define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION |
---|
| 667 | |
---|
| 668 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE |
---|
| 669 | |
---|
| 670 | #define CONFIGURE_INIT |
---|
| 671 | |
---|
| 672 | #include <rtems/confdefs.h> |
---|