Last change
on this file since a92d4ae was
a92d4ae,
checked in by Kinsey Moore <kinsey.moore@…>, on 11/16/20 at 19:36:51
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Add AArch64 ZynpMP BSP
This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC
(ZynqMP) family of chips. It is configured to be usable on the Qemu
ZCU102 machine definition and should be almost trivially portable to
ZynqMP development boards and custom hardware. It is also configured to
be usable with libbsd.
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Property mode set to
100644
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File size:
446 bytes
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1 | SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause |
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2 | actions: |
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3 | - get-integer: null |
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4 | - define: null |
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5 | build-type: option |
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6 | copyrights: |
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7 | - Copyright (C) 2020 On-Line Applications Research (OAR) |
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8 | default: 100000000 |
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9 | default-by-variant: |
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10 | - value: 100000000 |
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11 | variants: |
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12 | - aarch64/xilinx_zynqmp_ilp32.* |
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13 | - aarch64/xilinx_zynqmp_lp64.* |
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14 | description: | |
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15 | Zynq UART clock frequency in Hz |
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16 | enabled-by: true |
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17 | format: '{}' |
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18 | links: [] |
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19 | name: ZYNQ_CLOCK_UART |
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20 | type: build |
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