source: rtems/make/custom/mbx8xx.cfg @ bfc86bcb

4.104.114.84.95
Last change on this file since bfc86bcb was bfc86bcb, checked in by Joel Sherrill <joel.sherrill@…>, on Jul 12, 2000 at 7:28:27 PM

Removed references to stack checker defines since it is dynamically
enabled now at configure time.

  • Property mode set to 100644
File size: 6.7 KB
Line 
1#
2#  Config file for a PowerPC MPC821- or MPC860-based MBX card
3#
4#  This file is derived from:
5#
6#  Config file for a PowerPC 403 based helas403 card
7#  Config file for MPC860 based Ethernet Comm Board
8#
9
10include $(RTEMS_ROOT)/make/custom/default.cfg
11
12RTEMS_CPU=powerpc
13RTEMS_CPU_MODEL=mpc8xx
14
15# This is the actual bsp directory used during the build process.
16RTEMS_BSP_FAMILY=mbx8xx
17
18# The value assigned to RTEMS_CPU, RTEMS_CPU_MODEL and RTEMS_BSP get
19# #defined in targopts.h. Source code can switch on these values with #ifdef
20# to select what code to compile for a specific CPU family member and specific
21# board. The RTEMS_CPU_MODEL is also used as the name of the libcpu directory,
22# while the RTEMS_BSP_FAMILY is used as the name of the libbsp directory.
23# For the MBX860 and MBX821, the boards and processors are sufficiently
24# similar that the ports are unified and use RTEMS_CPU_MODEL=mpc8xx and
25# RTEMS_BSP_FAMILY=mbx8xx. Because there are minor differences in the CPUs
26# and the boards, it is necessary to specify them fully during the build.
27# Do a "make RTEMS_BSP=<your_board> <target>" See below for a list of valid
28# values for <your_board>.
29
30ifeq ($(findstring mbx821,$(RTEMS_MBX_MODEL)),mbx821)
31CPU_TYPE=821
32else
33ifeq ($(findstring mbx860,$(RTEMS_MBX_MODEL)),mbx860)
34CPU_TYPE=860
35else
36RTEMS_BSP = mbx860_002
37RTEMS_MBX_MODEL = mbx860_002
38TARGET_ARCH=o-mbx860_002
39CPU_TYPE=860
40endif # mbx860
41endif # mbx821
42
43#  This section makes the target dependent options file.
44#
45#  Note that RTEMS_BSP matches the RTEMS_MBX_MODEL. Its value must be
46#  defined in targopts.h, so the few places that require different code
47#  for different MBX models can be distinguished. The value of
48#  RTEMS_BSP is already defined in targopts.h and is one of:
49#     mbx860_001    mbx821_001
50#     mbx860_002    mbx821_002
51#     mbx860_003    mbx821_003
52#     mbx860_004    mbx821_004
53#     mbx860_005    mbx821_005
54#     mbx860_001b   mbx821_001b
55#     mbx860_002b   mbx821_002b
56#     mbx860_003b   mbx821_003b
57#     mbx860_004b   mbx821_004b
58#     mbx860_005b   mbx821_005b
59#     mbx860_006b   mbx821_006b
60
61#  The specific CPU model is defined, so the few places that require
62#  different code for the MPC860 and MPC821 can be distinguished.
63#  Either mpc860 or mpc821 is defined.
64#
65#  MBX8xx-specific options:
66#
67#  CONSOLE_MINOR (BSP--console driver)
68#    Must be defined to be one of SMC1_MINOR, SMC2_MINOR, SCC2_MINOR,
69#    SCC3_MINOR, or SCC4_MINOR. Determines which device will be registered
70#    as /dev/console.
71#
72#  UARTS_USE_INTERRUPTS (BSP--console driver)
73#    Define if you want interrupt-driven I/O instead of polling. Superceeded
74#    by EPPCBUG_SMC1 on SMC1.
75#
76#  EPPCBUG_SMC1 (BSP--console driver)
77#    If defined, the I/O through the SCM1 is done through the EPPCBug firmware.
78#    Because of limitations in revision 1.1 of the firmware, EPPCBug must be
79#    configured to use SMC1 as its console. If not defined, I/O through SMC1
80#    is done through a RTEMS device driver.
81#
82#  EPPCBUG_VECTORS (BSP--RTEMS)
83#    If defined, the most vectors branch to EPPCBug, except the following:
84#    0x500 (external interrupt), 0x900 (decrementer).
85#
86#  INSTRUCTION_CACHE_ENABLE (BSP--RTEMS)
87#    If defined, the instruction cache will be enabled after address translation
88#    is turned on.
89#
90#  DATA_CACHE_ENABLE (BSP--RTEMS)
91#    If defined, the data cache will be enabled after address translation
92#    is turned on.
93#   
94#  PowerPC-specific options:
95#       
96#  PPC_USE_SPRG (RTEMS PowerPC port)
97#     If defined (=1), then the PowerPC specific code in RTEMS will use some
98#     of the special purpose registers to slightly optimize interrupt
99#     response time.  The use of these registers can conflict with
100#     other tools like debuggers.  This should be 0 when using EPPCBug
101#     because its uses most SPRGs (don't believe the documentation!).
102#
103#  PPC_USE_DATA_CACHE (RTEMS PowerPC port)
104#     If defined, then the PowerPC specific code in RTEMS will use
105#     data cache instructions to optimize the context switch code.
106#     This code can conflict with debuggers or emulators.
107#
108#  RTEMS generic options:
109#
110#  NDEBUG (C library)
111#     If defined, asserts do not generate code.  This is commonly used
112#     as a command line option.
113#
114#  RTEMS_TEST_NO_PAUSE (RTEMS tests)
115#     If defined, do not pause between screens of output in the rtems tests.
116
117define make-target-options
118        @echo "#ifdef mpc$(CPU_TYPE)"                       >>$@
119        @echo "#undef mpc$(CPU_TYPE)"                       >>$@
120        @echo "#endif"                                      >>$@
121        @echo "#define mpc$(CPU_TYPE) 1"                    >>$@
122        @echo                                               >>$@
123        @echo "#define CONSOLE_MINOR SMC2_MINOR"            >>$@
124        @echo "#define UARTS_USE_INTERRUPTS 1"              >>$@
125        @echo "#define EPPCBUG_SMC1 1"                      >>$@
126        @echo "#define EPPCBUG_VECTORS 1"                   >>$@
127        @echo "#define INSTRUCTION_CACHE_ENABLE 1"          >>$@
128        @echo "#define DATA_CACHE_ENABLE 1"                 >>$@
129        @echo                                               >>$@
130        @echo "#define PPC_VECTOR_FILE_BASE 0x0000"         >>$@
131        @echo "#define PPC_USE_SPRG 0"                      >>$@
132        @echo "/* #define PPC_USE_DATA_CACHE 1" */          >>$@
133        @echo                                               >>$@
134        @echo "/* #define NDEBUG 1 */ "                     >>$@
135        @echo "#define RTEMS_TEST_NO_PAUSE 1"               >>$@
136endef
137
138#  This contains the compiler options necessary to select the CPU model
139#  and (hopefully) optimize for it.
140#
141CPU_CFLAGS = -mcpu=$(CPU_TYPE)
142
143CFLAGS_DEBUG_V += -ggdb
144CXXFLAGS_DEBUG_V += -ggdb
145
146# optimize flag: typically -O, could use -O4 or -fast
147# -O4 is ok for RTEMS
148# NOTE: some level of -O may be actually required by inline assembler
149# CFLAGS_OPTIMIZE_V=-O4 -fno-keep-inline-functions
150CFLAGS_OPTIMIZE_V=-O4 -fno-keep-inline-functions
151CXXFLAGS_OPTIMIZE_V=-O4
152
153# The following are definitions of make-exe which will work using ld as
154# is currently required.  It is expected that as of gcc 2.8, the end user
155# will be able to override parts of the compilers specs and link using gcc.
156
157ifeq ($(RTEMS_USE_GCC272),yes)
158# The --defsym arguments define arguments which are required by the linkcmds
159# file which is designed for gcc 2.8
160define make-exe
161        $(LD) $(XLDFLAGS) -T $(LINKCMDS) \
162            --defsym __fini=0 --defsym __init=0 \
163            -o $@ -u atexit -u __vectors -u start \
164            $(START_FILE) $(LINK_OBJS) --start-group $(LINK_LIBS) --end-group
165        $(NM) -g -n $@ > $(basename $@).num
166        $(STRIP) -o $(basename $@).elf $@
167        $(SIZE) $@
168endef
169else
170define make-exe
171        $(LINK.c) $(AM_CFLAGS) $(AM_LDFLAGS) $(MBX8xx_LDFLAGS) \
172            -o $(basename $@).exe $(LINK_OBJS) $(LINK_LIBS)
173        $(NM) -g -n $@ > $(basename $@).nm
174        $(STRIP) -o $(basename $@) $@
175        $(SIZE) $@
176endef
177endif
178
179# Miscellaneous additions go here
180
181# Override default start file
182START_BASE=
183
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