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1@c
2@c  COPYRIGHT (c) 1988-2008.
3@c  On-Line Applications Research Corporation (OAR).
4@c  All rights reserved.
5
6@chapter Interrupt Manager
7
8@section Introduction
9
10Any real-time executive must provide a mechanism for
11quick response to externally generated interrupts to satisfy the
12critical time constraints of the application.  The interrupt
13manager provides this mechanism for RTEMS.  This manager permits
14quick interrupt response times by providing the critical ability
15to alter task execution which allows a task to be preempted upon
16exit from an ISR.  The interrupt manager includes the following
17directive:
18
19@itemize @bullet
20@item @code{@value{DIRPREFIX}interrupt_catch} - Establish an ISR
21@item @code{@value{DIRPREFIX}interrupt_disable} - Disable Interrupts
22@item @code{@value{DIRPREFIX}interrupt_enable} - Enable Interrupts
23@item @code{@value{DIRPREFIX}interrupt_flash} - Flash Interrupt
24@item @code{@value{DIRPREFIX}interrupt_is_in_progress} - Is an ISR in Progress
25@end itemize
26
27@section Background
28
29@subsection Processing an Interrupt
30
31@cindex interrupt processing
32
33The interrupt manager allows the application to
34connect a function to a hardware interrupt vector.  When an
35interrupt occurs, the processor will automatically vector to
36RTEMS.  RTEMS saves and restores all registers which are not
37preserved by the normal @value{LANGUAGE} calling convention
38for the target
39processor and invokes the user's ISR.  The user's ISR is
40responsible for processing the interrupt, clearing the interrupt
41if necessary, and device specific manipulation.
42
43@findex rtems_vector_number
44
45The @code{@value{DIRPREFIX}interrupt_catch}
46directive connects a procedure to
47an interrupt vector.  The vector number is managed using
48the @code{@value{DIRPREFIX}vector_number} data type.
49
50The interrupt service routine is assumed
51to abide by these conventions and have a prototype similar to
52the following:
53
54@ifset is-C
55@findex rtems_isr
56
57@example
58rtems_isr user_isr(
59  rtems_vector_number vector
60);
61@end example
62@end ifset
63
64@ifset is-Ada
65@example
66NOT SUPPORTED FROM Ada BINDING
67@end example
68@end ifset
69
70The vector number argument is provided by RTEMS to
71allow the application to identify the interrupt source.  This
72could be used to allow a single routine to service interrupts
73from multiple instances of the same device.  For example, a
74single routine could service interrupts from multiple serial
75ports and use the vector number to identify which port requires
76servicing.
77
78To minimize the masking of lower or equal priority
79level interrupts, the ISR should perform the minimum actions
80required to service the interrupt.  Other non-essential actions
81should be handled by application tasks.  Once the user's ISR has
82completed, it returns control to the RTEMS interrupt manager
83which will perform task dispatching and restore the registers
84saved before the ISR was invoked.
85
86The RTEMS interrupt manager guarantees that proper
87task scheduling and dispatching are performed at the conclusion
88of an ISR.  A system call made by the ISR may have readied a
89task of higher priority than the interrupted task.  Therefore,
90when the ISR completes, the postponed dispatch processing must
91be performed.  No dispatch processing is performed as part of
92directives which have been invoked by an ISR.
93
94Applications must adhere to the following rule if
95proper task scheduling and dispatching is to be performed:
96
97@itemize @b{ }
98
99@item @b{The interrupt manager must be used for all ISRs which
100may be interrupted by the highest priority ISR which invokes an
101RTEMS directive.}
102
103@end itemize
104
105Consider a processor which allows a numerically low
106interrupt level to interrupt a numerically greater interrupt
107level.  In this example, if an RTEMS directive is used in a
108level 4 ISR, then all ISRs which execute at levels 0 through 4
109must use the interrupt manager.
110
111Interrupts are nested whenever an interrupt occurs
112during the execution of another ISR.  RTEMS supports efficient
113interrupt nesting by allowing the nested ISRs to terminate
114without performing any dispatch processing.  Only when the
115outermost ISR terminates will the postponed dispatching occur.
116
117@subsection RTEMS Interrupt Levels
118
119@cindex interrupt levels
120
121Many processors support multiple interrupt levels or
122priorities.  The exact number of interrupt levels is processor
123dependent.  RTEMS internally supports 256 interrupt levels which
124are mapped to the processor's interrupt levels.  For specific
125information on the mapping between RTEMS and the target
126processor's interrupt levels, refer to the Interrupt Processing
127chapter of the Applications Supplement document for a specific
128target processor.
129
130@subsection Disabling of Interrupts by RTEMS
131
132@cindex disabling interrupts
133
134During the execution of directive calls, critical
135sections of code may be executed.  When these sections are
136encountered, RTEMS disables all maskable interrupts before the
137execution of the section and restores them to the previous level
138upon completion of the section.  RTEMS has been optimized to
139ensure that interrupts are disabled for a minimum length of
140time.  The maximum length of time interrupts are disabled by
141RTEMS is processor dependent and is detailed in the Timing
142Specification chapter of the Applications Supplement document
143for a specific target processor.
144
145Non-maskable interrupts (NMI) cannot be disabled, and
146ISRs which execute at this level MUST NEVER issue RTEMS system
147calls.  If a directive is invoked, unpredictable results may
148occur due to the inability of RTEMS to protect its critical
149sections.  However, ISRs that make no system calls may safely
150execute as non-maskable interrupts.
151
152@section Operations
153
154@subsection Establishing an ISR
155
156The @code{@value{DIRPREFIX}interrupt_catch}
157directive establishes an ISR for
158the system.  The address of the ISR and its associated CPU
159vector number are specified to this directive.  This directive
160installs the RTEMS interrupt wrapper in the processor's
161Interrupt Vector Table and the address of the user's ISR in the
162RTEMS' Vector Table.  This directive returns the previous
163contents of the specified vector in the RTEMS' Vector Table.
164
165@subsection Directives Allowed from an ISR
166
167Using the interrupt manager ensures that RTEMS knows
168when a directive is being called from an ISR.  The ISR may then
169use system calls to synchronize itself with an application task.
170The synchronization may involve messages, events or signals
171being passed by the ISR to the desired task.  Directives invoked
172by an ISR must operate only on objects which reside on the local
173node.  The following is a list of RTEMS system calls that may be
174made from an ISR:
175
176@itemize @bullet
177@item Task Management
178
179Although it is acceptable to operate on the RTEMS_SELF task (e.g.
180the currently executing task), while in an ISR, this will refer
181to the interrupted task.  Most of the time, it is an application
182implementation error to use RTEMS_SELF from an ISR.
183
184@itemize -
185@item rtems_task_get_note
186@item rtems_task_set_note
187@item rtems_task_suspend
188@item rtems_task_resume
189@end itemize
190
191@item Interrupt Management
192
193@itemize -
194@item rtems_interrupt_enable
195@item rtems_interrupt_disable
196@item rtems_interrupt_flash
197@item rtems_interrupt_is_in_progress
198@item rtems_interrupt_catch
199@end itemize
200
201@item Clock Management
202
203@itemize
204@item rtems_clock_set
205@item rtems_clock_get
206@item rtems_clock_get_tod
207@item rtems_clock_get_tod_timeval
208@item rtems_clock_get_seconds_since_epoch
209@item rtems_clock_get_ticks_per_second
210@item rtems_clock_get_ticks_since_boot
211@item rtems_clock_get_uptime
212@item rtems_clock_set_nanoseconds_extension
213@item rtems_clock_tick
214@end itemize
215
216@item Message, Event, and Signal Management
217
218@itemize -
219@item rtems_message_queue_send
220@item rtems_message_queue_urgent
221@item rtems_event_send
222@item rtems_signal_send
223@end itemize
224
225@item Semaphore Management
226
227@itemize -
228@item rtems_semaphore_release
229@end itemize
230
231@item Dual-Ported Memory Management
232
233@itemize -
234@item rtems_port_external_to_internal
235@item rtems_port_internal_to_external
236@end itemize
237
238@item IO Management
239
240The following services are safe to call from an ISR if and only if
241the device driver service invoked is also safe.  The IO Manager itself
242is safe but the invoked driver entry point may or may not be.
243@itemize -
244@item rtems_io_initialize
245@item rtems_io_open
246@item rtems_io_close
247@item rtems_io_read
248@item rtems_io_write
249@item rtems_io_control
250@end itemize
251
252@item Fatal Error Management
253
254@itemize -
255@item rtems_fatal_error_occurred
256@end itemize
257
258@item Multiprocessing
259
260@itemize -
261@item rtems_multiprocessing_announce
262@end itemize
263@end itemize
264
265@section Directives
266
267This section details the interrupt manager's
268directives.  A subsection is dedicated to each of this manager's
269directives and describes the calling sequence, related
270constants, usage, and status codes.
271
272@c
273@c
274@c
275@page
276@subsection INTERRUPT_CATCH - Establish an ISR
277
278@cindex establish an ISR
279@cindex install an ISR
280
281@subheading CALLING SEQUENCE:
282
283@ifset is-C
284@findex rtems_interrupt_catch
285@example
286rtems_status_code rtems_interrupt_catch(
287  rtems_isr_entry      new_isr_handler,
288  rtems_vector_number  vector,
289  rtems_isr_entry     *old_isr_handler
290);
291@end example
292@end ifset
293
294@ifset is-Ada
295@example
296NOT SUPPORTED FROM Ada BINDING
297@end example
298@end ifset
299
300@subheading DIRECTIVE STATUS CODES:
301@code{@value{RPREFIX}SUCCESSFUL} - ISR established successfully@*
302@code{@value{RPREFIX}INVALID_NUMBER} - illegal vector number@*
303@code{@value{RPREFIX}INVALID_ADDRESS} - illegal ISR entry point or invalid @code{old_isr_handler}
304
305@subheading DESCRIPTION:
306
307This directive establishes an interrupt service
308routine (ISR) for the specified interrupt vector number.  The
309@code{new_isr_handler} parameter specifies the entry point of the ISR.
310The entry point of the previous ISR for the specified vector is
311returned in @code{old_isr_handler}.
312
313To release an interrupt vector, pass the old handler's address obtained
314when the vector was first capture.
315
316@subheading NOTES:
317
318This directive will not cause the calling task to be preempted.
319
320@c
321@c
322@c
323@page
324@subsection INTERRUPT_DISABLE - Disable Interrupts
325
326@cindex disable interrupts
327
328@subheading CALLING SEQUENCE:
329
330@ifset is-C
331@findex rtems_interrupt_disable
332@example
333void rtems_interrupt_disable(
334  rtems_interrupt_level  level
335);
336
337/* this is implemented as a macro and sets level as a side-effect */
338@end example
339@end ifset
340
341@ifset is-Ada
342@example
343function Interrupt_Disable return RTEMS.ISR_Level;
344@end example
345@end ifset
346
347@subheading DIRECTIVE STATUS CODES:
348
349NONE
350
351@subheading DESCRIPTION:
352
353This directive disables all maskable interrupts and returns
354the previous @code{level}.  A later invocation of the
355@code{@value{DIRPREFIX}interrupt_enable} directive should be used to
356restore the interrupt level.
357
358@subheading NOTES:
359
360This directive will not cause the calling task to be preempted.
361
362@ifset is-C
363@b{This directive is implemented as a macro which modifies the @code{level}
364parameter.}
365@end ifset
366
367@c
368@c
369@c
370@page
371@subsection INTERRUPT_ENABLE - Enable Interrupts
372
373@cindex enable interrupts
374
375@subheading CALLING SEQUENCE:
376
377@ifset is-C
378@findex rtems_interrupt_enable
379@example
380void rtems_interrupt_enable(
381  rtems_interrupt_level  level
382);
383@end example
384@end ifset
385
386@ifset is-Ada
387@example
388procedure Interrupt_Enable (
389   Level : in     RTEMS.ISR_Level
390);
391@end example
392@end ifset
393
394@subheading DIRECTIVE STATUS CODES:
395
396NONE
397
398@subheading DESCRIPTION:
399
400This directive enables maskable interrupts to the @code{level}
401which was returned by a previous call to
402@code{@value{DIRPREFIX}interrupt_disable}.
403Immediately prior to invoking this directive, maskable interrupts should
404be disabled by a call to @code{@value{DIRPREFIX}interrupt_disable}
405and will be enabled when this directive returns to the caller.
406
407@subheading NOTES:
408
409This directive will not cause the calling task to be preempted.
410
411
412@c
413@c
414@c
415@page
416@subsection INTERRUPT_FLASH - Flash Interrupts
417
418@cindex flash interrupts
419
420@subheading CALLING SEQUENCE:
421
422@ifset is-C
423@findex rtems_interrupt_flash
424@example
425void rtems_interrupt_flash(
426  rtems_interrupt_level level
427);
428@end example
429@end ifset
430
431@ifset is-Ada
432@example
433procedure Interrupt_Flash (
434   Level : in     RTEMS.ISR_Level
435);
436@end example
437@end ifset
438
439@subheading DIRECTIVE STATUS CODES:
440
441NONE
442
443@subheading DESCRIPTION:
444
445This directive temporarily enables maskable interrupts to the @code{level}
446which was returned by a previous call to
447@code{@value{DIRPREFIX}interrupt_disable}. 
448Immediately prior to invoking this directive, maskable interrupts should
449be disabled by a call to @code{@value{DIRPREFIX}interrupt_disable}
450and will be redisabled when this directive returns to the caller.
451
452@subheading NOTES:
453
454This directive will not cause the calling task to be preempted.
455
456@c
457@c
458@c
459@page
460@subsection INTERRUPT_IS_IN_PROGRESS - Is an ISR in Progress
461
462@cindex is interrupt in progress
463
464@subheading CALLING SEQUENCE:
465
466@ifset is-C
467@findex rtems_interrupt_is_in_progress
468@example
469bool rtems_interrupt_is_in_progress( void );
470@end example
471@end ifset
472
473@ifset is-Ada
474@example
475function Interrupt_Is_In_Progress return RTEMS.Boolean;
476@end example
477@end ifset
478
479@subheading DIRECTIVE STATUS CODES:
480
481NONE
482
483@subheading DESCRIPTION:
484
485This directive returns @code{TRUE} if the processor is currently
486servicing an interrupt and @code{FALSE} otherwise.  A return value
487of @code{TRUE} indicates that the caller is an interrupt service
488routine, @b{NOT} a task.  The directives available to an interrupt
489service routine are restricted.
490
491@subheading NOTES:
492
493This directive will not cause the calling task to be preempted.
494
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