source: rtems/doc/tools/bmenu/testdoc.texi @ 87926ab

4.104.114.84.95
Last change on this file since 87926ab was 87926ab, checked in by Joel Sherrill <joel.sherrill@…>, on 10/31/97 at 19:44:42

Test document.
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1@ifinfo
2@node Avenger Control Electronics System, Avenger Control Electronics System General System, DOCS PREV, DOCS UP
3@end ifinfo
4@chapter Avenger Control Electronics System
5@ifinfo
6@menu
7* Avenger Control Electronics System General System::
8* Avenger Control Electronics System System Modes::
9* Avenger Control Electronics System System BIT::
10@end menu
11@end ifinfo
12
13@ifinfo
14@node General System, Avenger Control Electronics System Monitor and Control Avenger, Avenger Control Electronics System, DOCS UP
15@end ifinfo
16@section General System
17@ifinfo
18@menu
19* Avenger Control Electronics System Monitor and Control Avenger::
20* Avenger Control Electronics System Control Weapons::
21* Avenger Control Electronics System Handle Tone Signals::
22* Avenger Control Electronics System Provide AVDAS::
23* Avenger Control Electronics System Perform Initial Power-On Sequence::
24* Avenger Control Electronics System Perform Post-power-on Initialization -- Deleted::
25* Avenger Control Electronics System Update AVDAS Port::
26* Avenger Control Electronics System Handle Minor Faults::
27* Avenger Control Electronics System General Mode::
28* Avenger Control Electronics System Mode Transition::
29* Avenger Control Electronics System Boot BIT::
30* Avenger Control Electronics System Background BIT::
31@end menu
32@end ifinfo
33
34@ifinfo
35@node Monitor and Control Avenger, Avenger Control Electronics System Control Weapons, General System, Avenger Control Electronics System System Modes
36@end ifinfo
37@subsection Monitor and Control Avenger
38
39The AFCC shall be the main computer that monitors and controls all AVENGER
40system functions.  [MNTMN 1-21.b, MNTMN 11-3]
41
42@ifinfo
43@node Control Weapons, Avenger Control Electronics System Handle Tone Signals, Monitor and Control Avenger, Avenger Control Electronics System System Modes
44@end ifinfo
45@subsection Control Weapons
46
47The AFCC shall be capable of tracking a single target, and controlling the
48missile and machine-gun systems.  [FUNCTIONAL]
49
50@ifinfo
51@node Handle Tone Signals, Avenger Control Electronics System Provide AVDAS, Control Weapons, Avenger Control Electronics System System Modes
52@end ifinfo
53@subsection Handle Tone Signals
54
55The AFCC shall receive a tone signal from the IEA and IFF system.  [MNTMN
5611-3.a(3), MNTMN 11-3.b(1)] The AFCC shall generate a test tone.  [MNTMN
5711-3.a(3), MNTMN 11-3.b(2)] The AFCC shall also amplify the tone signals
58(target acquisition tone and IFF tone) from the IEA and IFF system and
59apply them to the communications system via the gunner's control box to
60the CVC helmet.  [MNTMN 11-3.a(3), MNTMN 11-3.b(2)] The IFF audio tone
61shall be mixed with the missile acquisition tone and built-in-test tone
62inside the AFCC.  [MNTMN 11-3.a(3), MNTMN 12-5.b(3&4)].
63
64@ifinfo
65@node Provide AVDAS, Avenger Control Electronics System Perform Initial Power-On Sequence, Handle Tone Signals, Avenger Control Electronics System System Modes
66@end ifinfo
67@subsection Provide AVDAS
68
69The AFCC shall provide system status information on the AVDAS serial test
70port.  [FUNCTIONAL]
71
72@ifinfo
73@node Perform Initial Power-On Sequence, Avenger Control Electronics System Perform Post-power-on Initialization -- Deleted, Provide AVDAS, Avenger Control Electronics System System Modes
74@end ifinfo
75@subsection Perform Initial Power-On Sequence
76
77During power-on, the AFCC shall perform the following:
78
79@itemize @bullet
80
81@item initialize all software programmable peripherals,
82
83@item set all A/D output values to zero,
84
85@item safe the laser range finder by setting both first return and last return to a high state,
86
87@item safe the machine-gun system,
88
89@item set the turret drive to high speed mode,
90
91@item set the following outputs inactive
92
93@enumerate 1
94@item  FLIR fire permit, missile active, RSO authorize, and uncage verify
95
96@item  sight fire permit, missile active, RSO authorize, and uncage verify
97
98@item  sight display active, and driven reticle
99
100@item  power interlock
101
102@item  FLIR field of view
103
104@item  IFF challenge
105
106@item  gunner palm grips and drift switch
107
108@item  fire command
109
110@item  uncage command
111
112@item  BIT initiate command
113
114@item  ATAS power on
115
116@item  sequence command
117
118@item  arm command
119
120@item  activate command
121
122@item  autotrack lock on command
123
124@item  laser fire command,
125
126@end enumerate
127
128@item set the following inputs to the indicated state
129
130@enumerate 1
131@item  uncage mode to AUTO
132
133@item  helicopter mode to OFF
134
135@item  track mode to MANUAL
136
137@item  turret drive mode to STAB.
138@end enumerate
139
140@item initialize the missile range tables in RAM from values in EPROM,
141
142@item clear the north reference value and fire permit limits.  [FUNCTIONAL]
143@end itemize
144
145@ifinfo
146@node Perform Post-power-on Initialization -- Deleted, Avenger Control Electronics System Update AVDAS Port, Perform Initial Power-On Sequence, Avenger Control Electronics System System Modes
147@end ifinfo
148@subsection Perform Post-power-on Initialization -- Deleted
149
150Requirement was deleted.
151
152@ifinfo
153@node Update AVDAS Port, Avenger Control Electronics System Handle Minor Faults, Perform Post-power-on Initialization -- Deleted, Avenger Control Electronics System System Modes
154@end ifinfo
155@subsection Update AVDAS Port
156
157The AFCC shall update the AVDAS port every 100ms.  [FUNCTIONAL]
158
159@ifinfo
160@node Handle Minor Faults, Avenger Control Electronics System System Modes, Update AVDAS Port, Avenger Control Electronics System System Modes
161@end ifinfo
162@subsection Handle Minor Faults
163
164Detection of a minor fault shall cause an error message to be displayed on
165the CDT and the system fault light to be lit.
166
167
168@ifinfo
169@node System Modes, Avenger Control Electronics System General Mode, Handle Minor Faults, DOCS UP
170@end ifinfo
171@section System Modes
172@ifinfo
173@menu
174* Avenger Control Electronics System General Mode::
175* Avenger Control Electronics System Mode Transition::
176* Avenger Control Electronics System Boot BIT::
177* Avenger Control Electronics System Background BIT::
178@end menu
179@end ifinfo
180
181
182@ifinfo
183@node General Mode, Avenger Control Electronics System Process System Mode Periodically -- Deleted, System Modes, Avenger Control Electronics System System BIT
184@end ifinfo
185@subsection General Mode
186@ifinfo
187@menu
188* Avenger Control Electronics System Process System Mode Periodically -- Deleted::
189* Avenger Control Electronics System Determine System Mode::
190* Avenger Control Electronics System OFF Mode::
191* Avenger Control Electronics System COMM Mode::
192* Avenger Control Electronics System SAFE Mode::
193* Avenger Control Electronics System RUN Mode::
194* Avenger Control Electronics System ENGAGE Mode::
195* Avenger Control Electronics System Mode Fault::
196* Avenger Control Electronics System ENGAGE Mode Processing::
197* Avenger Control Electronics System Process Transition to OFF Mode::
198* Avenger Control Electronics System Process Transition to COMM Mode::
199* Avenger Control Electronics System Process Transition to SAFE Mode::
200* Avenger Control Electronics System Process Transition to RUN Mode::
201* Avenger Control Electronics System Process Transition to ENGAGE Mode::
202@end menu
203@end ifinfo
204
205
206@ifinfo
207@node Process System Mode Periodically -- Deleted, Avenger Control Electronics System Determine System Mode, General Mode, Avenger Control Electronics System Mode Transition
208@end ifinfo
209@subsubsection Process System Mode Periodically -- Deleted
210
211Requirement was deleted.
212
213@ifinfo
214@node Determine System Mode, Avenger Control Electronics System OFF Mode, Process System Mode Periodically -- Deleted, Avenger Control Electronics System Mode Transition
215@end ifinfo
216@subsubsection Determine System Mode
217
218The AFCC shall determine the system mode from the state of the system mode
219switch on the gunner's console and the remote mode indication from the
220remote terminal.  [FUNCTIONAL]
221
222@ifinfo
223@node OFF Mode, Avenger Control Electronics System COMM Mode, Determine System Mode, Avenger Control Electronics System Mode Transition
224@end ifinfo
225@subsubsection OFF Mode
226
227If the system mode switch is in the OFF position, the system mode shall be
228OFF.  [FUNCTIONAL]
229
230@ifinfo
231@node COMM Mode, Avenger Control Electronics System SAFE Mode, OFF Mode, Avenger Control Electronics System Mode Transition
232@end ifinfo
233@subsubsection COMM Mode
234
235If the system mode switch is in the COMM position, the system mode shall
236be COMM.  [FUNCTIONAL]
237
238@ifinfo
239@node SAFE Mode, Avenger Control Electronics System RUN Mode, COMM Mode, Avenger Control Electronics System Mode Transition
240@end ifinfo
241@subsubsection SAFE Mode
242
243If the system mode switch is in the SAFE position, the system mode shall
244be SAFE.  [FUNCTIONAL]
245
246@ifinfo
247@node RUN Mode, Avenger Control Electronics System ENGAGE Mode, SAFE Mode, Avenger Control Electronics System Mode Transition
248@end ifinfo
249@subsubsection RUN Mode
250
251If the system mode switch is in the RUN position, the system mode shall be
252RUN.  [FUNCTIONAL]
253
254@ifinfo
255@node ENGAGE Mode, Avenger Control Electronics System Mode Fault, RUN Mode, Avenger Control Electronics System Mode Transition
256@end ifinfo
257@subsubsection ENGAGE Mode
258
259If the system mode switch is in the ENGAGE position, the system mode shall
260be ENGAGE or REMOTE.  [FUNCTIONAL]
261
262@ifinfo
263@node Mode Fault, Avenger Control Electronics System ENGAGE Mode Processing, ENGAGE Mode, Avenger Control Electronics System Mode Transition
264@end ifinfo
265@subsubsection Mode Fault
266
267If the system mode switch is not in a valid position, the system mode
268shall remain unchanged and the AFCC shall output 'MODE FAULT' to the CDT.
269[FUNCTIONAL]
270
271@ifinfo
272@node ENGAGE Mode Processing, Avenger Control Electronics System Mode Transition, Mode Fault, Avenger Control Electronics System Mode Transition
273@end ifinfo
274@subsubsection ENGAGE Mode Processing
275
276When the system is in the ENGAGE mode, the AFCC shall:
277
278@itemize @bullet
279
280@item perform auto slew processing,
281
282@item perform lead angle processing,
283
284@item perform autotrack processing,
285
286@item output rate commands to the turret drive system,
287
288@item control the firing of the weapons systems.  [FUNCTIONAL]
289
290@end itemize
291
292@ifinfo
293@node Mode Transition, Avenger Control Electronics System Process Transition to OFF Mode, ENGAGE Mode Processing, Avenger Control Electronics System System BIT
294@end ifinfo
295@subsection Mode Transition
296@ifinfo
297@menu
298* Avenger Control Electronics System Process Transition to OFF Mode::
299* Avenger Control Electronics System Process Transition to COMM Mode::
300* Avenger Control Electronics System Process Transition to SAFE Mode::
301* Avenger Control Electronics System Process Transition to RUN Mode::
302* Avenger Control Electronics System Process Transition to ENGAGE Mode::
303@end menu
304@end ifinfo
305
306The AFCC can operate in one of the following modes:  OFF, COMM, SAFE, RUN,
307or ENGAGE.  The mode transitions are depicted in Figure 3-1.
308
309@ifhtml
310@html
311<CENTER>
312<IMG SRC="modes.gif" ALT="Figure 3-1 Mode Transitions">
313</CENTER>
314@end html
315@end ifhtml
316
317@ifset use-ascii
318@example
319Figure 3-1 Mode Transitions - modes.gif
320@end example
321@end ifset
322
323@ifset use-tex
324@example
325Figure 3-1 Mode Transitions - modes.gif
326@end example
327@end ifset
328
329
330@ifinfo
331@node Process Transition to OFF Mode, Avenger Control Electronics System Process Transition to COMM Mode, Mode Transition, Avenger Control Electronics System Boot BIT
332@end ifinfo
333@subsubsection Process Transition to OFF Mode
334
335When the AFCC detects a valid transition to the OFF mode, the following
336actions shall be performed:
337
338@itemize @bullet
339
340@item update the elapsed time counter for the last mode the system was in,
341
342@item output 'OFF MODE' to the CDT,
343
344@item safe the laser by setting the last and first return to a high state,
345
346@item disable the turret drive system,
347
348@item disable the missile system,
349
350@item disable the machine-gun system,
351
352@item deactivate the sight and reticle,
353
354@item update the EEPROM with the current elapsed time and count values,
355
356@item disable continuous BIT,
357
358@item insure that the machine-gun cool down has completed before clearing the power hold circuit.  [FUNCTIONAL]
359
360@end itemize
361
362
363@ifinfo
364@node Process Transition to COMM Mode, Avenger Control Electronics System Process Transition to SAFE Mode, Process Transition to OFF Mode, Avenger Control Electronics System Boot BIT
365@end ifinfo
366@subsubsection Process Transition to COMM Mode
367
368When the AFCC detects a valid transition to the COMM mode, the following
369actions shall be performed:
370
371@itemize @bullet
372
373@item update the elapsed time counter for the last mode the system was in,
374
375@item output `COMM MODE' to the CDT,
376
377@item safe the laser by setting the last and first return to a high state,
378
379@item disable the turret drive system,
380
381@item disable the missile system,
382
383@item disable the machine-gun system,
384
385@item deactivate the sight and reticle,
386
387@item reset the power hold circuit to insure power if the system is put in the OFF mode,
388
389@item enable current monitoring.  [OPMAN 2-27.b(2), FUNCTIONAL]
390
391@end itemize
392
393@ifinfo
394@node Process Transition to SAFE Mode, Avenger Control Electronics System Process Transition to RUN Mode, Process Transition to COMM Mode, Avenger Control Electronics System Boot BIT
395@end ifinfo
396@subsubsection Process Transition to SAFE Mode
397
398When the AFCC detects a valid transition to the SAFE mode, the following
399actions shall be performed:
400
401@itemize @bullet
402
403@item update the elapsed time counter for the last mode the system was in,
404
405@item output `SAFE MODE' to the CDT,
406
407@item safe the laser by setting the last and first return to a high state,
408
409@item disable the turret drive system,
410
411@item disable the missile system,
412
413@item disable the machine-gun system,
414
415@item deactivate the sight and reticle,
416
417@item reset the power hold circuit to insure power if the system is put in the OFF mode,
418
419@item enable current monitoring.  [FUNCTIONAL]
420
421@end itemize
422
423@ifinfo
424@node Process Transition to RUN Mode, Avenger Control Electronics System Process Transition to ENGAGE Mode, Process Transition to SAFE Mode, Avenger Control Electronics System Boot BIT
425@end ifinfo
426@subsubsection Process Transition to RUN Mode
427
428When the AFCC detects a valid transition to the RUN mode, the following
429actions shall be performed:
430
431@itemize @bullet
432
433@item update the elapsed time counter for the last mode the system was in,
434
435@item output `RUN MODE' to the CDT,
436
437@item safe the laser by setting the last and first return to a high state,
438
439@item enable the turret drive system,
440
441@item disable the missile system,
442
443@item disable the machine-gun system,
444
445@item deactivate the sight and reticle,
446
447@item reset the power hold circuit to insure power if the system is put in the OFF mode,
448
449@item enable current monitoring.  [FUNCTIONAL]
450
451@end itemize
452
453@ifinfo
454@node Process Transition to ENGAGE Mode, Avenger Control Electronics System System BIT, Process Transition to RUN Mode, Avenger Control Electronics System Boot BIT
455@end ifinfo
456@subsubsection Process Transition to ENGAGE Mode
457
458When the AFCC detects a valid transition to the ENGAGE mode, the following
459actions shall be performed:
460
461@itemize @bullet
462
463@item update the elapsed time counter for the last mode the system was in,
464
465@item output `ENGAGE MODE' to the CDT,
466
467@item enable the turret drive system,
468
469@item enable the missile system power,
470
471@item reset the power hold circuit to insure power if the system is put in the OFF mode,
472
473@item enable current monitoring.  [FUNCTIONAL]
474
475@end itemize
476
477@ifinfo
478@node System BIT, Avenger Control Electronics System Boot BIT, Process Transition to ENGAGE Mode, DOCS UP
479@end ifinfo
480@section System BIT
481@ifinfo
482@menu
483* Avenger Control Electronics System Boot BIT::
484* Avenger Control Electronics System Background BIT::
485@end menu
486@end ifinfo
487
488
489@ifinfo
490@node Boot BIT, Avenger Control Electronics System Perform ROM Checksum, System BIT, DOCS UP
491@end ifinfo
492@subsection Boot BIT
493@ifinfo
494@menu
495* Avenger Control Electronics System Perform ROM Checksum::
496* Avenger Control Electronics System Boot Test AFCC Boards::
497* Avenger Control Electronics System Boot Test CPU Board::
498* Avenger Control Electronics System Boot Test AFCC Controller Board DAC's::
499* Avenger Control Electronics System Boot Test Interface Board Discrete Inputs::
500* Avenger Control Electronics System Boot Test AFCC Controller Board Relay and Discrete Outputs::
501* Avenger Control Electronics System Boot Check Voltages::
502* Avenger Control Electronics System Boot Handle Fatal Error::
503* Avenger Control Electronics System Perform Background BIT::
504* Avenger Control Electronics System Background Process CPU and Software Exceptions::
505* Avenger Control Electronics System Background Test AFCC Controller Board DAC's::
506* Avenger Control Electronics System Background Test AFCC Controller Board Relay and Discrete Outputs::
507* Avenger Control Electronics System Perform RAM Checksum::
508* Avenger Control Electronics System Background Monitor Voltages::
509* Avenger Control Electronics System Background Handle Fatal Error::
510@end menu
511@end ifinfo
512
513
514@ifinfo
515@node Perform ROM Checksum, Avenger Control Electronics System Boot Test AFCC Boards, Boot BIT, Avenger Control Electronics System Background BIT
516@end ifinfo
517@subsubsection Perform ROM Checksum
518
519During initialization of the AFCC, the AFCC shall checksum the code image
520stored in ROM to insure that it is correct.  If the checksum does not
521match the code image, the system shall halt.
522
523@ifinfo
524@node Boot Test AFCC Boards, Avenger Control Electronics System Boot Test CPU Board, Perform ROM Checksum, Avenger Control Electronics System Background BIT
525@end ifinfo
526@subsubsection Boot Test AFCC Boards
527
528During initialization of the AFCC, all boards shall be tested to determine
529their functional state.  If all tests performed on a board pass, the board
530shall have a functional state of passed.  If any test performed on a board
531fails, the board shall have a functional state of failed.
532
533@ifinfo
534@node Boot Test CPU Board, Avenger Control Electronics System Boot Test AFCC Controller Board DAC's, Boot Test AFCC Boards, Avenger Control Electronics System Background BIT
535@end ifinfo
536@subsubsection Boot Test CPU Board
537
538During initialization of the AFCC, the AFCC shall test the following CPU
539board components by invoking all non-destructive card-level diagnostic
540tests provided by the CPU board vendor.  If any CPU board component fails
541diagnostic testing, a fatal error shall occur.
542
543@ifinfo
544@node Boot Test AFCC Controller Board DAC's, Avenger Control Electronics System Boot Test Interface Board Discrete Inputs, Boot Test CPU Board, Avenger Control Electronics System Background BIT
545@end ifinfo
546@subsubsection Boot Test AFCC Controller Board DAC's
547
548During initialization of the AFCC, the AFCC shall utilize the DAC test
549capability of the AFCC Controller board to verify that the DAC components
550of the AFCC Controller board are set to their initial values.  If any DAC
551component is not properly set, a fatal error shall occur.
552
553@ifinfo
554@node Boot Test Interface Board Discrete Inputs, Avenger Control Electronics System Boot Test AFCC Controller Board Relay and Discrete Outputs, Boot Test AFCC Controller Board DAC's, Avenger Control Electronics System Background BIT
555@end ifinfo
556@subsubsection Boot Test Interface Board Discrete Inputs
557
558During initialization of the AFCC, the AFCC shall utilize the discrete
559input loopback capability of the AFCC Interface board to test that the
560discrete input components of the AFCC Interface board are working
561properly.  If any discrete input component does not function properly, a
562fatal error shall occur.
563
564@ifinfo
565@node Boot Test AFCC Controller Board Relay and Discrete Outputs, Avenger Control Electronics System Boot Check Voltages, Boot Test Interface Board Discrete Inputs, Avenger Control Electronics System Background BIT
566@end ifinfo
567@subsubsection Boot Test AFCC Controller Board Relay and Discrete Outputs
568
569During initialization of the AFCC, the AFCC shall utilize the relay and
570discrete output test capability of the AFCC Controller board to verify
571that the relay and discrete output components of the AFCC Controller board
572are set to their initial values.  If any relay or discrete output
573component is not properly set, a fatal error shall occur.
574
575@ifinfo
576@node Boot Check Voltages, Avenger Control Electronics System Boot Handle Fatal Error, Boot Test AFCC Controller Board Relay and Discrete Outputs, Avenger Control Electronics System Background BIT
577@end ifinfo
578@subsubsection Boot Check Voltages
579
580During initialization of the AFCC, the +5 volt, +15 volt, -15 volt, and
581+28 volt power supplies shall be checked to insure that they are within
582tolerance.  If any of the power supplies are out of tolerance, a fatal
583error shall occur.
584
585@ifinfo
586@node Boot Handle Fatal Error, Avenger Control Electronics System Background BIT, Boot Check Voltages, Avenger Control Electronics System Background BIT
587@end ifinfo
588@subsubsection Boot Handle Fatal Error
589
590If a fatal error occurs during initialization, the AFCC shall attempt to
591output a diagnostic message to the CDT and halt initialization.
592
593@ifinfo
594@node Background BIT, Avenger Control Electronics System Perform Background BIT, Boot Handle Fatal Error, DOCS UP
595@end ifinfo
596@subsection Background BIT
597@ifinfo
598@menu
599* Avenger Control Electronics System Perform Background BIT::
600* Avenger Control Electronics System Background Process CPU and Software Exceptions::
601* Avenger Control Electronics System Background Test AFCC Controller Board DAC's::
602* Avenger Control Electronics System Background Test AFCC Controller Board Relay and Discrete Outputs::
603* Avenger Control Electronics System Perform RAM Checksum::
604* Avenger Control Electronics System Background Monitor Voltages::
605* Avenger Control Electronics System Background Handle Fatal Error::
606@end menu
607@end ifinfo
608
609
610@ifinfo
611@node Perform Background BIT, Avenger Control Electronics System Background Process CPU and Software Exceptions, Background BIT, DOCS UP
612@end ifinfo
613@subsubsection Perform Background BIT
614
615During normal operation of the AFCC, the AFCC shall perform background BIT
616of various system components.  Background BIT shall be performed during
617system idle time.
618
619@ifinfo
620@node Background Process CPU and Software Exceptions, Avenger Control Electronics System Background Test AFCC Controller Board DAC's, Perform Background BIT, DOCS UP
621@end ifinfo
622@subsubsection Background Process CPU and Software Exceptions
623
624During normal operation of the AFCC, the AFCC shall recognize all CPU and
625software exceptions.  If any exception occurs, a fatal error shall occur.
626
627@ifinfo
628@node Background Test AFCC Controller Board DAC's, Avenger Control Electronics System Background Test AFCC Controller Board Relay and Discrete Outputs, Background Process CPU and Software Exceptions, DOCS UP
629@end ifinfo
630@subsubsection Background Test AFCC Controller Board DAC's
631
632During background BIT, the AFCC shall utilize the DAC test capability of
633the AFCC Controller board to verify that the DAC components of the AFCC
634Controller board are set to their last written values.  If any DAC
635component is not properly set, a fatal error shall occur.
636
637@ifinfo
638@node Background Test AFCC Controller Board Relay and Discrete Outputs, Avenger Control Electronics System Perform RAM Checksum, Background Test AFCC Controller Board DAC's, DOCS UP
639@end ifinfo
640@subsubsection Background Test AFCC Controller Board Relay and Discrete Outputs
641
642During background BIT, the AFCC shall utilize the relay and discrete
643output test capability of the AFCC Controller board to verify that the
644relay and discrete output components of the AFCC Controller board are set
645to their last written values.  If any relay or discrete output component
646is not properly set, a fatal error shall occur.
647
648@ifinfo
649@node Perform RAM Checksum, Avenger Control Electronics System Background Monitor Voltages, Background Test AFCC Controller Board Relay and Discrete Outputs, DOCS UP
650@end ifinfo
651@subsubsection Perform RAM Checksum
652
653During background BIT, the AFCC shall checksum the code image to insure
654that it is correct.  If the checksum does not match the code image, a
655fatal error shall occur.
656
657@ifinfo
658@node Background Monitor Voltages, Avenger Control Electronics System Background Handle Fatal Error, Perform RAM Checksum, DOCS UP
659@end ifinfo
660@subsubsection Background Monitor Voltages
661
662During background BIT, the AFCC shall monitor the +5 volt, +15 volt, -15
663volt, and +28 volt power supplies to insure that they are within
664tolerance.  If any of the power supplies are out of tolerance, a fatal
665error shall occur.
666
667@ifinfo
668@node Background Handle Fatal Error, DOCS NEXT, Background Monitor Voltages, DOCS UP
669@end ifinfo
670@subsubsection Background Handle Fatal Error
671
672When the AFCC detects a fatal error, the following shall be attempted:
673
674@enumerate a
675
676@item light the fault light on the gunner console,
677
678@item stop the execution of all tasks,
679
680@item reset all hardware outputs to a safe state,
681
682@item store a failure code or message in the EEPROM,
683
684@item output a diagnostic message to the CDT and Console port,
685
686@item halt the system.
687
688@end enumerate
689
690
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