1 | @c |
---|
2 | @c COPYRIGHT (c) 1988-1998. |
---|
3 | @c On-Line Applications Research Corporation (OAR). |
---|
4 | @c All rights reserved. |
---|
5 | @c |
---|
6 | @c $Id$ |
---|
7 | @c |
---|
8 | |
---|
9 | @ifinfo |
---|
10 | @node Board Support Packages, Board Support Packages Introduction, Default Fatal Error Processing Default Fatal Error Handler Operations, Top |
---|
11 | @end ifinfo |
---|
12 | @chapter Board Support Packages |
---|
13 | @ifinfo |
---|
14 | @menu |
---|
15 | * Board Support Packages Introduction:: |
---|
16 | * Board Support Packages System Reset:: |
---|
17 | * Board Support Packages Processor Initialization:: |
---|
18 | @end menu |
---|
19 | @end ifinfo |
---|
20 | |
---|
21 | @ifinfo |
---|
22 | @node Board Support Packages Introduction, Board Support Packages System Reset, Board Support Packages, Board Support Packages |
---|
23 | @end ifinfo |
---|
24 | @section Introduction |
---|
25 | |
---|
26 | An RTEMS Board Support Package (BSP) must be designed |
---|
27 | to support a particular processor and target board combination. |
---|
28 | This chapter presents a discussion of PowerPC specific BSP issues. |
---|
29 | For more information on developing a BSP, refer to the chapter |
---|
30 | titled Board Support Packages in the RTEMS |
---|
31 | Applications User's Guide. |
---|
32 | |
---|
33 | @ifinfo |
---|
34 | @node Board Support Packages System Reset, Board Support Packages Processor Initialization, Board Support Packages Introduction, Board Support Packages |
---|
35 | @end ifinfo |
---|
36 | @section System Reset |
---|
37 | |
---|
38 | An RTEMS based application is initiated or |
---|
39 | re-initiated when the PowerPC processor is reset. The PowerPC |
---|
40 | architecture defines a Reset Exception, but leaves the |
---|
41 | details of the CPU state as implementation specific. Please |
---|
42 | refer to the User's Manual for the CPU model in question. |
---|
43 | |
---|
44 | In general, at power-up the PowerPC begin execution at address |
---|
45 | 0xFFF00100 in supervisor mode with all exceptions disabled. For |
---|
46 | soft resets, the CPU will vector to either 0xFFF00100 or 0x00000100 |
---|
47 | depending upon the setting of the Exception Prefix bit in the MSR. |
---|
48 | If during a soft reset, a Machine Check Exception occurs, then the |
---|
49 | CPU may execute a hard reset. |
---|
50 | |
---|
51 | @ifinfo |
---|
52 | @node Board Support Packages Processor Initialization, Processor Dependent Information Table, Board Support Packages System Reset, Board Support Packages |
---|
53 | @end ifinfo |
---|
54 | @section Processor Initialization |
---|
55 | |
---|
56 | It is the responsibility of the application's |
---|
57 | initialization code to initialize the CPU and board |
---|
58 | to a quiescent state before invoking the @code{rtems_initialize_executive} |
---|
59 | directive. It is recommended that the BSP utilize the @code{predriver_hook} |
---|
60 | to install default handlers for all exceptions. These default handlers |
---|
61 | may be overwritten as various device drivers and subsystems install |
---|
62 | their own exception handlers. Upon completion of RTEMS executive |
---|
63 | initialization, all interrupts are enabled. |
---|
64 | |
---|
65 | If this PowerPC implementation supports on-chip caching |
---|
66 | and this is to be utilized, then it should be enabled during the |
---|
67 | reset application initialization code. On-chip caching has been |
---|
68 | observed to prevent some emulators from working properly, so it |
---|
69 | may be necessary to run with caching disabled to use these emulators. |
---|
70 | |
---|
71 | In addition to the requirements described in the |
---|
72 | @b{Board Support Packages} chapter of the @b{@value{LANGUAGE} |
---|
73 | Applications User's Manual} for the reset code |
---|
74 | which is executed before the call to @code{rtems_initialize_executive}, |
---|
75 | the PowrePC version has the following specific requirements: |
---|
76 | |
---|
77 | @itemize @bullet |
---|
78 | @item Must leave the PR bit of the Machine State Register (MSR) set |
---|
79 | to 0 so the PowerPC remains in the supervisor state. |
---|
80 | |
---|
81 | @item Must set stack pointer (sp or r1) such that a minimum stack |
---|
82 | size of MINIMUM_STACK_SIZE bytes is provided for the |
---|
83 | @code{rtems_initialize_executive} directive. |
---|
84 | |
---|
85 | @item Must disable all external interrupts (i.e. clear the EI (EE) |
---|
86 | bit of the machine state register). |
---|
87 | |
---|
88 | @item Must enable traps so window overflow and underflow |
---|
89 | conditions can be properly handled. |
---|
90 | |
---|
91 | @item Must initialize the PowerPC's initial Exception Table with default |
---|
92 | handlers. |
---|
93 | |
---|
94 | @end itemize |
---|
95 | |
---|