1 | @c |
---|
2 | @c COPYRIGHT (c) 1988-2002. |
---|
3 | @c On-Line Applications Research Corporation (OAR). |
---|
4 | @c All rights reserved. |
---|
5 | @c |
---|
6 | @c $Id$ |
---|
7 | @c |
---|
8 | |
---|
9 | @chapter Memory Model |
---|
10 | |
---|
11 | @section Introduction |
---|
12 | |
---|
13 | A processor may support any combination of memory |
---|
14 | models ranging from pure physical addressing to complex demand |
---|
15 | paged virtual memory systems. RTEMS supports a flat memory |
---|
16 | model which ranges contiguously over the processor's allowable |
---|
17 | address space. RTEMS does not support segmentation or virtual |
---|
18 | memory of any kind. The appropriate memory model for RTEMS |
---|
19 | provided by the targeted processor and related characteristics |
---|
20 | of that model are described in this chapter. |
---|
21 | |
---|
22 | @section Flat Memory Model |
---|
23 | |
---|
24 | The XXX family supports a flat 32-bit address |
---|
25 | space with addresses ranging from 0x00000000 to 0xFFFFFFFF (4 |
---|
26 | gigabytes). Each address is represented by a 32-bit value and |
---|
27 | is byte addressable. The address may be used to reference a |
---|
28 | single byte, word (2-bytes), or long word (4 bytes). Memory |
---|
29 | accesses within this address space are performed in big endian |
---|
30 | fashion by the processors in this family. |
---|
31 | |
---|
32 | Some of the XXX family members such as the |
---|
33 | XXX, XXX, and XXX support virtual memory and |
---|
34 | segmentation. The XXX requires external hardware support |
---|
35 | such as the XXX Paged Memory Management Unit coprocessor |
---|
36 | which is typically used to perform address translations for |
---|
37 | these systems. RTEMS does not support virtual memory or |
---|
38 | segmentation on any of the XXX family members. |
---|
39 | |
---|