1 | @c |
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2 | @c COPYRIGHT (c) 1988-1998. |
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3 | @c On-Line Applications Research Corporation (OAR). |
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4 | @c All rights reserved. |
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5 | @c |
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6 | @c $Id$ |
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7 | @c |
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8 | |
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9 | @ifinfo |
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10 | @node HP-7100 Timing Data, HP-7100 Timing Data Introduction, Timing Specification Terminology, Top |
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11 | @end ifinfo |
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12 | @chapter HP-7100 Timing Data |
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13 | @ifinfo |
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14 | @menu |
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15 | * HP-7100 Timing Data Introduction:: |
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16 | * HP-7100 Timing Data Hardware Platform:: |
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17 | * HP-7100 Timing Data Interrupt Latency:: |
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18 | * HP-7100 Timing Data Context Switch:: |
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19 | * HP-7100 Timing Data Directive Times:: |
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20 | @end menu |
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21 | @end ifinfo |
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22 | |
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23 | @ifinfo |
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24 | @node HP-7100 Timing Data Introduction, HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data, HP-7100 Timing Data |
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25 | @end ifinfo |
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26 | @section Introduction |
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27 | |
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28 | The timing data for the PA-RISC version of RTEMS is |
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29 | provided along with the target dependent aspects concerning the |
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30 | gathering of the timing data. The hardware platform used to |
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31 | gather the times is described to give the reader a better |
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32 | understanding of each directive time provided. Also, provided |
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33 | is a description of the interrupt latency and the context |
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34 | switch times as they pertain to the PA-RISC version of RTEMS. |
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35 | |
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36 | @ifinfo |
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37 | @node HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data Introduction, HP-7100 Timing Data |
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38 | @end ifinfo |
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39 | @section Hardware Platform |
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40 | |
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41 | No directive execution times are reported for the |
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42 | HP-7100 because the target platform was proprietary and |
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43 | executions times could not be released. |
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44 | |
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45 | @ifinfo |
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46 | @node HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data Context Switch, HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data |
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47 | @end ifinfo |
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48 | @section Interrupt Latency |
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49 | |
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50 | The maximum period with traps disabled or the |
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51 | processor interrupt level set to it's highest value inside RTEMS |
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52 | is less than RTEMS_MAXIMUM_DISABLE_PERIOD |
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53 | microseconds including the instructions which |
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54 | disable and re-enable interrupts. The time required for the |
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55 | HP-7100 to vector an interrupt and for the RTEMS entry overhead |
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56 | before invoking the user's trap handler are a total of |
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57 | RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK |
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58 | microseconds. These combine to yield a worst case interrupt |
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59 | latency of less than RTEMS_MAXIMUM_DISABLE_PERIOD + |
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60 | RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK microseconds at 15 Mhz. |
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61 | [NOTE: The maximum period with interrupts disabled was last |
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62 | determined for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.] |
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63 | |
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64 | It should be noted again that the maximum period with |
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65 | interrupts disabled within RTEMS for the HP-7100 is hand calculated. |
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66 | |
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67 | @ifinfo |
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68 | @node HP-7100 Timing Data Context Switch, HP-7100 Timing Data Directive Times, HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data |
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69 | @end ifinfo |
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70 | @section Context Switch |
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71 | |
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72 | The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS |
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73 | microsections for the HP-7100 when no floating point context |
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74 | switch is saved or restored. Saving and restoring the floating |
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75 | point context adds additional time to the context |
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76 | switch procedure. Additional execution time is required when a |
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77 | TASK_SWITCH user extension is configured. The use of the |
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78 | TASK_SWITCH extension is application dependent. Thus, its |
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79 | execution time is not considered part of the raw context switch |
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80 | time. |
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81 | |
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82 | Since RTEMS was designed specifically for embedded |
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83 | missile applications which are floating point intensive, the |
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84 | executive is optimized to avoid unnecessarily saving and |
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85 | restoring the state of the numeric coprocessor. On many |
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86 | processors, the state of the numeric coprocessor is only saved |
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87 | when an FLOATING_POINT task is dispatched and that task was not |
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88 | the last task to utilize the coprocessor. In a system with only |
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89 | one FLOATING_POINT task, the state of the numeric coprocessor |
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90 | will never be saved or restored. When the first FLOATING_POINT |
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91 | task is dispatched, RTEMS does not need to save the current |
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92 | state of the numeric coprocessor. As discussed in the Register |
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93 | Usage section, on the HP-7100 the every task is considered to be |
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94 | floating point registers and , as a rsule, every context switch |
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95 | involves saving and restoring the state of the floating point |
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96 | unit. |
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97 | |
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98 | The following table summarizes the context switch |
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99 | times for the HP-7100 processor: |
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100 | |
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101 | @example |
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102 | no times are available for the HP-7100 |
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103 | @end example |
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104 | |
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105 | @ifinfo |
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106 | @node HP-7100 Timing Data Directive Times, Command and Variable Index, HP-7100 Timing Data Context Switch, HP-7100 Timing Data |
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107 | @end ifinfo |
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108 | @section Directive Times |
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109 | |
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110 | No execution times are available for the HP-7100 |
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111 | because the target platform was proprietary and no timing |
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112 | information could be released. |
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113 | |
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