source: rtems/doc/supplements/hppa1_1/timedata.t @ ae68ff0

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Last change on this file since ae68ff0 was ae68ff0, checked in by Joel Sherrill <joel.sherrill@…>, on 05/27/97 at 12:40:11

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1@ifinfo
2@node HP-7100 Timing Data, HP-7100 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top
3@end ifinfo
4@chapter HP-7100 Timing Data
5@ifinfo
6@menu
7* HP-7100 Timing Data Introduction::
8* HP-7100 Timing Data Hardware Platform::
9* HP-7100 Timing Data Interrupt Latency::
10* HP-7100 Timing Data Context Switch::
11* HP-7100 Timing Data Directive Times::
12@end menu
13@end ifinfo
14
15@ifinfo
16@node HP-7100 Timing Data Introduction, HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data, HP-7100 Timing Data
17@end ifinfo
18@section Introduction
19
20The timing data for the PA-RISC version of RTEMS is
21provided along with the target dependent aspects concerning the
22gathering of the timing data.  The hardware platform used to
23gather the times is described to give the reader a better
24understanding of each directive time provided.  Also, provided
25is a description of the  interrupt latency and the context
26switch times as they pertain to the PA-RISC version of RTEMS.
27
28@ifinfo
29@node HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data Introduction, HP-7100 Timing Data
30@end ifinfo
31@section Hardware Platform
32
33No directive execution times are reported for the
34HP-7100 because the target platform was proprietary and
35executions times could not be released.
36
37@ifinfo
38@node HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data Context Switch, HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data
39@end ifinfo
40@section Interrupt Latency
41
42The maximum period with traps disabled or the
43processor interrupt level set to it's highest value inside RTEMS
44is less than RTEMS_MAXIMUM_DISABLE_PERIOD
45microseconds including the instructions which
46disable and re-enable interrupts.  The time required for the
47HP-7100 to vector an interrupt and for the RTEMS entry overhead
48before invoking the user's trap handler are a total of
49RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK
50microseconds.  These combine to yield a worst case interrupt
51latency of less than RTEMS_MAXIMUM_DISABLE_PERIOD +
52RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK microseconds at 15 Mhz.
53[NOTE:  The maximum period with interrupts disabled was last
54determined for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.]
55
56It should be noted again that the maximum period with
57interrupts disabled within RTEMS for the HP-7100 is hand calculated.
58
59@ifinfo
60@node HP-7100 Timing Data Context Switch, HP-7100 Timing Data Directive Times, HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data
61@end ifinfo
62@section Context Switch
63
64The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS
65microsections for the HP-7100 when no floating point context
66switch is saved or restored.  Saving and restoring the floating
67point context adds additional time to the context
68switch procedure.  Additional execution time is required when a
69TASK_SWITCH user extension is configured.  The use of the
70TASK_SWITCH extension is application dependent.  Thus, its
71execution time is not considered part of the raw context switch
72time.
73
74Since RTEMS was designed specifically for embedded
75missile applications which are floating point intensive, the
76executive is optimized to avoid unnecessarily saving and
77restoring the state of the numeric coprocessor.  On many
78processors, the state of the numeric coprocessor is only saved
79when an FLOATING_POINT task is dispatched and that task was not
80the last task to utilize the coprocessor.  In a system with only
81one FLOATING_POINT task, the state of the numeric coprocessor
82will never be saved or restored.  When the first FLOATING_POINT
83task is dispatched, RTEMS does not need to save the current
84state of the numeric coprocessor.  As discussed in the Register
85Usage section, on the HP-7100 the every task is considered to be
86floating point registers and , as a rsule, every context switch
87involves saving and restoring the state of the floating point
88unit.
89
90The following table summarizes the context switch
91times for the HP-7100 processor:
92
93@example
94no times are available for the HP-7100
95@end example
96
97@ifinfo
98@node HP-7100 Timing Data Directive Times, Command and Variable Index, HP-7100 Timing Data Context Switch, HP-7100 Timing Data
99@end ifinfo
100@section Directive Times
101
102No execution times are available for the HP-7100
103because the target platform was proprietary and no timing
104information could be released.
105
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